/external/llvm/lib/CodeGen/ |
D | AllocationOrder.cpp | 32 const RegisterClassInfo &RegClassInfo, in AllocationOrder()
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D | CriticalAntiDepBreaker.h | 37 const RegisterClassInfo &RegClassInfo; variable
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D | RegAllocBase.h | 66 RegisterClassInfo RegClassInfo; variable
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D | AggressiveAntiDepBreaker.h | 117 const RegisterClassInfo &RegClassInfo; variable
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D | PostRASchedulerList.cpp | 82 RegisterClassInfo RegClassInfo; member in __anonaa0758ef0111::PostRAScheduler
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D | RegAllocFast.cpp | 59 RegisterClassInfo RegClassInfo; member in __anon7e78a8920111::RAFast
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D | MachinePipeliner.cpp | 157 RegisterClassInfo RegClassInfo; member in __anon06a972380111::MachinePipeliner 204 const RegisterClassInfo &RegClassInfo; member in __anon06a972380111::SwingSchedulerDAG
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D | RegisterCoalescer.cpp | 91 RegisterClassInfo RegClassInfo; member in __anon40bdeb910111::RegisterCoalescer
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | AllocationOrder.cpp | 31 const RegisterClassInfo &RegClassInfo, in AllocationOrder()
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D | RegAllocBase.h | 69 RegisterClassInfo RegClassInfo; variable
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D | CriticalAntiDepBreaker.h | 41 const RegisterClassInfo &RegClassInfo; variable
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D | AggressiveAntiDepBreaker.h | 122 const RegisterClassInfo &RegClassInfo; variable
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D | BreakFalseDeps.cpp | 38 RegisterClassInfo RegClassInfo; member in llvm::BreakFalseDeps
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D | PostRASchedulerList.cpp | 82 RegisterClassInfo RegClassInfo; member in __anon8e00ae110111::PostRAScheduler
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D | RegAllocFast.cpp | 75 RegisterClassInfo RegClassInfo; member in __anonac325ff40111::RegAllocFast
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D | RegisterCoalescer.cpp | 134 RegisterClassInfo RegClassInfo; member in __anonaebb90330111::RegisterCoalescer
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
D | TargetRegisterInfo.h | 232 struct RegClassInfo { struct 244 const RegClassInfo *const RCInfos; argument
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D | MachinePipeliner.h | 67 RegisterClassInfo RegClassInfo; variable 122 const RegisterClassInfo &RegClassInfo; variable
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D | MachineScheduler.h | 127 RegisterClassInfo *RegClassInfo; member
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SIPreAllocateWWMRegs.cpp | 44 RegisterClassInfo RegClassInfo; member in __anon972ffdb00111::SIPreAllocateWWMRegs
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/external/llvm/lib/CodeGen/MIRParser/ |
D | MIRParser.cpp | 745 auto RegClassInfo = Names2RegClasses.find(Name); in getRegClass() local
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/external/llvm/include/llvm/CodeGen/ |
D | MachineScheduler.h | 108 RegisterClassInfo *RegClassInfo; member
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/external/llvm/lib/Target/ARM/ |
D | ARMLoadStoreOptimizer.cpp | 94 RegisterClassInfo RegClassInfo; member
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMLoadStoreOptimizer.cpp | 109 RegisterClassInfo RegClassInfo; member
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/MIRParser/ |
D | MIParser.cpp | 306 auto RegClassInfo = Names2RegClasses.find(Name); in getRegClass() local
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