| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | DetectDeadLanes.cpp | 112 void PutInWorklist(unsigned RegIdx) { in PutInWorklist()
363 unsigned RegIdx = Register::virtReg2Index(Reg); in determineInitialDefinedLanes() local
496 for (unsigned RegIdx = 0; RegIdx < NumVirtRegs; ++RegIdx) { in runOnce() local
507 unsigned RegIdx = Worklist.front(); in runOnce() local
542 unsigned RegIdx = Register::virtReg2Index(Reg); in runOnce() local
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| D | SplitKit.cpp | 456 VNInfo *SplitEditor::defValue(unsigned RegIdx, in defValue()
493 void SplitEditor::forceRecompute(unsigned RegIdx, const VNInfo &ParentVNI) { in forceRecompute()
540 MachineBasicBlock::iterator InsertBefore, bool Late, unsigned RegIdx) { in buildCopy()
627 VNInfo *SplitEditor::defFromParent(unsigned RegIdx, in defFromParent()
877 unsigned RegIdx = AssignI.value(); in removeBackCopies() local
1132 unsigned RegIdx; in transferValues() local
1271 unsigned RegIdx = RegAssign.lookup(V->def); in extendPHIKillRanges() local
1286 unsigned RegIdx = RegAssign.lookup(V->def); in extendPHIKillRanges() local
1309 unsigned RegIdx; in rewriteAssigned() member
1335 unsigned RegIdx = RegAssign.lookup(Idx); in rewriteAssigned() local
[all …]
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| D | SplitKit.h | 343 LiveRangeCalc &getLRCalc(unsigned RegIdx) { in getLRCalc()
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| D | LiveVariables.cpp | 85 LiveVariables::VarInfo &LiveVariables::getVarInfo(unsigned RegIdx) { in getVarInfo()
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| /external/llvm/lib/CodeGen/ |
| D | DetectDeadLanes.cpp | 114 void PutInWorklist(unsigned RegIdx) { in PutInWorklist()
366 unsigned RegIdx = TargetRegisterInfo::virtReg2Index(Reg); in determineInitialDefinedLanes() local
499 for (unsigned RegIdx = 0; RegIdx < NumVirtRegs; ++RegIdx) { in runOnce() local
510 unsigned RegIdx = Worklist.front(); in runOnce() local
547 unsigned RegIdx = TargetRegisterInfo::virtReg2Index(Reg); in runOnce() local
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| D | SplitKit.cpp | 384 VNInfo *SplitEditor::defValue(unsigned RegIdx, in defValue()
420 void SplitEditor::forceRecompute(unsigned RegIdx, const VNInfo *ParentVNI) { in forceRecompute()
441 VNInfo *SplitEditor::defFromParent(unsigned RegIdx, in defFromParent()
680 unsigned RegIdx = AssignI.value(); in removeBackCopies() local
931 unsigned RegIdx; in transferValues() local
1033 unsigned RegIdx = RegAssign.lookup(PHIVNI->def); in extendPHIKillRanges() local
1084 unsigned RegIdx = RegAssign.lookup(Idx); in rewriteAssigned() local
1148 unsigned RegIdx = RegAssign.lookup(ParentVNI->def); in finish() local
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| D | SplitKit.h | 324 LiveRangeCalc &getLRCalc(unsigned RegIdx) { in getLRCalc()
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| D | LiveVariables.cpp | 85 LiveVariables::VarInfo &LiveVariables::getVarInfo(unsigned RegIdx) { in getVarInfo()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMCallingConv.h | 210 unsigned RegIdx = State.getFirstUnallocated(RegList); in CC_ARM_AAPCS_Custom_Aggregate() local
251 unsigned RegIdx = State.getFirstUnallocated(RegList); in CC_ARM_AAPCS_Custom_Aggregate() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMCallingConv.cpp | 203 unsigned RegIdx = State.getFirstUnallocated(RegList); in CC_ARM_AAPCS_Custom_Aggregate() local
247 unsigned RegIdx = State.getFirstUnallocated(RegList); in CC_ARM_AAPCS_Custom_Aggregate() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRAsmPrinter.cpp | 115 unsigned RegIdx = ByteNumber / BytesPerReg; in PrintAsmOperand() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64CollectLOH.cpp | 517 int RegIdx = mapRegToGPRIndex(LI.PhysReg); in runOnMachineFunction() local
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelDAGToDAG.cpp | 821 SDValue RegIdx = Node->getOperand(2); in trySelect() local
854 SDValue RegIdx = Node->getOperand(2); in trySelect() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsSEISelDAGToDAG.cpp | 842 SDValue RegIdx = Node->getOperand(2); in trySelect() local
875 SDValue RegIdx = Node->getOperand(2); in trySelect() local
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SILowerControlFlow.cpp | 615 int RegIdx = BaseRegIdx + Offset; in computeIndirectRegAndOffset() local
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| /external/llvm/lib/Target/AMDGPU/InstPrinter/ |
| D | AMDGPUInstPrinter.cpp | 236 unsigned RegIdx = MRI.getEncodingValue(reg) & ((1 << 8) - 1); in printRegOperand() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86SpeculativeLoadHardening.cpp | 2244 unsigned RegIdx = Log2_32(RegBytes); in canHardenRegister() local
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| D | X86FastISel.cpp | 2644 unsigned RegIdx = X86::sub_16bit; in fastLowerIntrinsicCall() local
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| /external/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 2480 unsigned RegIdx = X86::sub_16bit; in fastLowerIntrinsicCall() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVISelLowering.cpp | 1522 unsigned RegIdx = State.getFirstUnallocated(ArgGPRs); in CC_RISCV() local
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| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 626 struct RegIdxOp RegIdx; member
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 1666 unsigned RegIdx = CCInfo.getFirstUnallocated(ArgVGPRs); in allocateVGPR32Input() local
1688 unsigned RegIdx = CCInfo.getFirstUnallocated(ArgSGPRs); in allocateSGPR32InputImpl() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/AsmParser/ |
| D | AMDGPUAsmParser.cpp | 2129 unsigned RegIdx = RegNum / AlignSize; in getRegularReg() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 863 struct RegIdxOp RegIdx; member
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 5745 unsigned RegIdx = 3; in shouldOmitPredicateOperand() local
|