| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstrFoldTables.cpp | 5515 lookupFoldTableImpl(ArrayRef<X86MemoryFoldTableEntry> Table, unsigned RegOp) { in lookupFoldTableImpl()
5580 llvm::lookupTwoAddrFoldTable(unsigned RegOp) { in lookupTwoAddrFoldTable()
5585 llvm::lookupFoldTable(unsigned RegOp, unsigned OpNum) { in lookupFoldTable()
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| /external/llvm/lib/Target/Lanai/InstPrinter/ |
| D | LanaiInstPrinter.cpp | 211 const MCOperand &RegOp) { in printMemoryBaseRegister()
237 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemRiOperand() local
252 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemRrOperand() local
273 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemSplsOperand() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/MCTargetDesc/ |
| D | LanaiInstPrinter.cpp | 214 const MCOperand &RegOp) { in printMemoryBaseRegister()
240 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemRiOperand() local
255 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemRrOperand() local
276 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemSplsOperand() local
|
| /external/llvm/lib/Target/BPF/InstPrinter/ |
| D | BPFInstPrinter.cpp | 68 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemOperand() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/MCTargetDesc/ |
| D | BPFInstPrinter.cpp | 67 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemOperand() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRAsmPrinter.cpp | 96 const MachineOperand &RegOp = MI->getOperand(OpNum); in PrintAsmOperand() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiAsmPrinter.cpp | 130 unsigned RegOp = OpNo + 1; in PrintAsmOperand() local
|
| /external/llvm/lib/Target/Lanai/ |
| D | LanaiAsmPrinter.cpp | 132 unsigned RegOp = OpNo + 1; in PrintAsmOperand() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/AsmParser/ |
| D | BPFAsmParser.cpp | 87 struct RegOp { struct
88 unsigned RegNum;
|
| /external/llvm/lib/Target/Sparc/AsmParser/ |
| D | SparcAsmParser.cpp | 201 struct RegOp { struct in __anon81f5e7190111::SparcOperand
202 unsigned RegNum;
203 RegisterKind Kind;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/AsmParser/ |
| D | SparcAsmParser.cpp | 230 struct RegOp { struct in __anonefad8ebb0211::SparcOperand
231 unsigned RegNum;
232 RegisterKind Kind;
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| /external/llvm/lib/Target/AMDGPU/AsmParser/ |
| D | AMDGPUAsmParser.cpp | 145 struct RegOp { struct in __anonb1c965e30111::AMDGPUOperand
146 unsigned RegNo;
147 Modifiers Mods;
148 const MCRegisterInfo *TRI;
149 const MCSubtargetInfo *STI;
150 bool IsForcedVOP3;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/MCTargetDesc/ |
| D | AVRMCCodeEmitter.cpp | 137 auto RegOp = MI.getOperand(OpNo); in encodeMemri() local
|
| /external/llvm/lib/Target/SystemZ/AsmParser/ |
| D | SystemZAsmParser.cpp | 86 struct RegOp { struct in __anon1e4944a50111::SystemZOperand
87 RegisterKind Kind;
88 unsigned Num;
|
| /external/llvm/lib/Target/X86/AsmParser/ |
| D | X86Operand.h | 44 struct RegOp { struct
45 unsigned RegNo;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCCodeEmitter.cpp | 1606 unsigned RegOp = CurOp++; in encodeInstruction() local
1619 unsigned RegOp = CurOp++; in encodeInstruction() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/AsmParser/ |
| D | X86Operand.h | 46 struct RegOp { struct
47 unsigned RegNo;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/AsmParser/ |
| D | SystemZAsmParser.cpp | 105 struct RegOp { struct in __anon68efed470111::SystemZOperand
106 RegisterKind Kind;
107 unsigned Num;
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| /external/llvm/lib/Target/Lanai/AsmParser/ |
| D | LanaiAsmParser.cpp | 105 struct RegOp { struct
106 unsigned RegNum;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/AsmParser/ |
| D | LanaiAsmParser.cpp | 120 struct RegOp { struct
121 unsigned RegNum;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIFoldOperands.cpp | 1388 const MachineOperand *RegOp = nullptr; in isOMod() local
1439 const MachineOperand *RegOp; in tryFoldOMod() local
|
| /external/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBuilder.h | 395 inline unsigned getRegState(const MachineOperand &RegOp) { in getRegState()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 310 struct RegOp { struct in __anonfde77fdb0111::AArch64Operand
311 unsigned RegNum;
312 RegKind Kind;
313 int ElementWidth;
317 RegConstraintEqualityTy EqualityTy;
333 ShiftExtendOp ShiftExtend;
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBuilder.h | 496 inline unsigned getRegState(const MachineOperand &RegOp) { in getRegState()
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| /external/llvm/lib/CodeGen/AsmPrinter/ |
| D | DwarfCompileUnit.cpp | 511 const MachineOperand RegOp = DVInsn->getOperand(0); in constructVariableDIEImpl() local
|