| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ | 
| D | AArch64FastISel.cpp | 368     unsigned ResultReg = createResultReg(&AArch64::GPR64spRegClass);  in fastMaterializeAlloca()  local 391   unsigned ResultReg = createResultReg(RC);  in materializeInt()  local 427     unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT));  in materializeFP()  local 447   unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT));  in materializeFP()  local 471   unsigned ResultReg;  in materializeGV()  local 1056     unsigned ResultReg = createResultReg(&AArch64::GPR64spRegClass);  in simplifyAddress()  local 1067     unsigned ResultReg = 0;  in simplifyAddress()  local 1105     unsigned ResultReg;  in simplifyAddress()  local 1212   unsigned ResultReg = 0;  in emitAddSub()  local 1337   unsigned ResultReg;  in emitAddSub_rr()  local [all …] 
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| D | AArch64InstrInfo.cpp | 4178   Register ResultReg = Root.getOperand(0).getReg();  in genFusedMultiply()  local 4329   Register ResultReg = Root.getOperand(0).getReg();  in genMaddR()  local
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| /external/llvm/lib/Target/AArch64/ | 
| D | AArch64FastISel.cpp | 323     unsigned ResultReg = createResultReg(&AArch64::GPR64spRegClass);  in fastMaterializeAlloca()  local 346   unsigned ResultReg = createResultReg(RC);  in materializeInt()  local 383     unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT));  in materializeFP()  local 403   unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT));  in materializeFP()  local 427   unsigned ResultReg;  in materializeGV()  local 977     unsigned ResultReg = createResultReg(&AArch64::GPR64spRegClass);  in simplifyAddress()  local 988     unsigned ResultReg = 0;  in simplifyAddress()  local 1026     unsigned ResultReg;  in simplifyAddress()  local 1133   unsigned ResultReg = 0;  in emitAddSub()  local 1254   unsigned ResultReg;  in emitAddSub_rr()  local [all …] 
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| D | AArch64InstrInfo.cpp | 3289   unsigned ResultReg = Root.getOperand(0).getReg();  in genFusedMultiply()  local 3353   unsigned ResultReg = Root.getOperand(0).getReg();  in genMaddR()  local
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| /external/llvm/lib/Target/X86/ | 
| D | X86FastISel.cpp | 349                                   MachineMemOperand *MMO, unsigned &ResultReg,  in X86FastEmitLoad() 697                                     unsigned &ResultReg) {  in X86FastEmitExtend() 1319   unsigned ResultReg = 0;  in X86SelectLoad()  local 1420   unsigned ResultReg = 0;  in X86SelectCmp()  local 1510   unsigned ResultReg = getRegForValue(I->getOperand(0));  in X86SelectZExt()  local 1763   unsigned ResultReg = createResultReg(RC);  in X86SelectShift()  local 1906   unsigned ResultReg = 0;  in X86SelectDivRem()  local 2045   unsigned ResultReg = fastEmitInst_rr(Opc, RC, RHSReg, RHSIsKill,  in X86FastEmitCMoveSelect()  local 2123   unsigned ResultReg;  in X86FastEmitSSESelect()  local 2218   unsigned ResultReg =  in X86FastEmitPseudoSelect()  local [all …] 
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| /external/llvm/lib/CodeGen/SelectionDAG/ | 
| D | FastISel.cpp | 414       unsigned ResultReg =  in selectBinaryOp()  local 448     unsigned ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0,  in selectBinaryOp()  local 460     unsigned ResultReg = fastEmit_rf(VT.getSimpleVT(), VT.getSimpleVT(),  in selectBinaryOp()  local 475   unsigned ResultReg = fastEmit_rr(VT.getSimpleVT(), VT.getSimpleVT(),  in selectBinaryOp()  local 1222     unsigned ResultReg = getRegForValue(ResCI);  in selectIntrinsicCall()  local 1229     unsigned ResultReg = getRegForValue(II->getArgOperand(0));  in selectIntrinsicCall()  local 1269   unsigned ResultReg = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(),  in selectCast()  local 1304   unsigned ResultReg = 0;  in selectBitCast()  local 1485   unsigned ResultReg = fastEmit_r(VT.getSimpleVT(), VT.getSimpleVT(), ISD::FNEG,  in selectFNeg()  local 1538   unsigned ResultReg;  in selectExtractValue()  local [all …] 
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ | 
| D | X86FastISel.cpp | 319                                   MachineMemOperand *MMO, unsigned &ResultReg,  in X86FastEmitLoad() 707                                     unsigned &ResultReg) {  in X86FastEmitExtend() 1330   unsigned ResultReg = 0;  in X86SelectLoad()  local 1435   unsigned ResultReg = 0;  in X86SelectCmp()  local 1525   unsigned ResultReg = getRegForValue(I->getOperand(0));  in X86SelectZExt()  local 1584   unsigned ResultReg = getRegForValue(I->getOperand(0));  in X86SelectSExt()  local 1842   unsigned ResultReg = createResultReg(RC);  in X86SelectShift()  local 1985   unsigned ResultReg = 0;  in X86SelectDivRem()  local 2136   unsigned ResultReg = fastEmitInst_rri(Opc, RC, RHSReg, RHSIsKill,  in X86FastEmitCMoveSelect()  local 2201   unsigned ResultReg;  in X86FastEmitSSESelect()  local [all …] 
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| D | X86FlagsCopyLowering.cpp | 1079   Register ResultReg = MRI->createVirtualRegister(&SetBRC);  in rewriteSetCarryExtended()  local
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| D | X86InstructionSelector.cpp | 1028   Register ResultReg = I.getOperand(0).getReg();  in selectFCmp()  local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ | 
| D | ARMFastISel.cpp | 304   Register ResultReg = createResultReg(RC);  in fastEmitInst_r()  local 327   unsigned ResultReg = createResultReg(RC);  in fastEmitInst_rr()  local 355   unsigned ResultReg = createResultReg(RC);  in fastEmitInst_ri()  local 380   unsigned ResultReg = createResultReg(RC);  in fastEmitInst_i()  local 499   unsigned ResultReg = 0;  in ARMMaterializeInt()  local 676     unsigned ResultReg = createResultReg(RC);  in fastMaterializeAlloca()  local 851     unsigned ResultReg = createResultReg(RC);  in ARMSimplifyAddress()  local 916 bool ARMFastISel::ARMEmitLoad(MVT VT, Register &ResultReg, Address &Addr,  in ARMEmitLoad() 1048   Register ResultReg;  in SelectLoad()  local 1575   unsigned ResultReg = createResultReg(TLI.getRegClassFor(DstVT));  in SelectIToFP()  local [all …] 
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| D | ARMInstructionSelector.cpp | 690         auto ResultReg = MIB->getOperand(0).getReg();  in selectGlobal()  local
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| /external/llvm/lib/Target/WebAssembly/ | 
| D | WebAssemblyFastISel.cpp | 516   unsigned ResultReg = createResultReg(MRI.getRegClass(Reg));  in copyValue()  local 528     unsigned ResultReg = createResultReg(Subtarget->hasAddr64() ?  in fastMaterializeAlloca()  local 544     unsigned ResultReg = createResultReg(Subtarget->hasAddr64() ?  in fastMaterializeConstant()  local 606     unsigned ResultReg = createResultReg(RC);  in fastLowerArguments()  local 638   unsigned ResultReg;  in selectCall()  local 761   unsigned ResultReg = createResultReg(RC);  in selectSelect()  local 870   unsigned ResultReg = createResultReg(&WebAssembly::I32RegClass);  in selectICmp()  local 931   unsigned ResultReg = createResultReg(&WebAssembly::I32RegClass);  in selectFCmp()  local 1016   unsigned ResultReg = createResultReg(RC);  in selectLoad()  local 1074   unsigned ResultReg = createResultReg(RC);  in selectStore()  local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ | 
| D | FastISel.cpp | 613       unsigned ResultReg =  in selectBinaryOp()  local 647     unsigned ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0,  in selectBinaryOp()  local 663   unsigned ResultReg = fastEmit_rr(VT.getSimpleVT(), VT.getSimpleVT(),  in selectBinaryOp()  local 1470     unsigned ResultReg = getRegForValue(II->getArgOperand(0));  in selectIntrinsicCall()  local 1515   unsigned ResultReg = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(),  in selectCast()  local 1550   unsigned ResultReg = 0;  in selectBitCast()  local 1718   unsigned ResultReg = fastEmit_r(VT.getSimpleVT(), VT.getSimpleVT(), ISD::FNEG,  in selectFNeg()  local 1771   unsigned ResultReg;  in selectExtractValue()  local 1995   unsigned ResultReg = fastEmit_ri(VT, VT, Opcode, Op0, Op0IsKill, Imm);  in fastEmit_ri_()  local 2042   unsigned ResultReg = createResultReg(RC);  in fastEmitInst_()  local [all …] 
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| /external/llvm/lib/Target/ARM/ | 
| D | ARMFastISel.cpp | 281   unsigned ResultReg = createResultReg(RC);  in fastEmitInst_r()  local 304   unsigned ResultReg = createResultReg(RC);  in fastEmitInst_rr()  local 332   unsigned ResultReg = createResultReg(RC);  in fastEmitInst_ri()  local 359   unsigned ResultReg = createResultReg(RC);  in fastEmitInst_rri()  local 387   unsigned ResultReg = createResultReg(RC);  in fastEmitInst_i()  local 507   unsigned ResultReg = 0;  in ARMMaterializeInt()  local 680     unsigned ResultReg = createResultReg(RC);  in fastMaterializeAlloca()  local 855     unsigned ResultReg = createResultReg(RC);  in ARMSimplifyAddress()  local 919 bool ARMFastISel::ARMEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr,  in ARMEmitLoad() 1050   unsigned ResultReg;  in SelectLoad()  local [all …] 
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ | 
| D | WebAssemblyFastISel.cpp | 590   unsigned ResultReg = createResultReg(MRI.getRegClass(Reg));  in copyValue()  local 602     unsigned ResultReg =  in fastMaterializeAlloca()  local 621     unsigned ResultReg =  in fastMaterializeConstant()  local 712     unsigned ResultReg = createResultReg(RC);  in fastLowerArguments()  local 764   unsigned ResultReg;  in selectCall()  local 936   unsigned ResultReg = createResultReg(RC);  in selectSelect()  local 1052   unsigned ResultReg = createResultReg(&WebAssembly::I32RegClass);  in selectICmp()  local 1113   unsigned ResultReg = createResultReg(&WebAssembly::I32RegClass);  in selectFCmp()  local 1203   unsigned ResultReg = createResultReg(RC);  in selectLoad()  local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ | 
| D | MipsFastISel.cpp | 329   unsigned ResultReg = createResultReg(&Mips::GPR32RegClass);  in emitLogicalOp()  local 345     unsigned ResultReg = createResultReg(&Mips::GPR32RegClass);  in fastMaterializeAlloca()  local 366   unsigned ResultReg = createResultReg(RC);  in materialize32BitInt()  local 638 bool MipsFastISel::emitCmp(unsigned ResultReg, const CmpInst *CI) {  in emitCmp() 757 bool MipsFastISel::emitLoad(MVT VT, unsigned &ResultReg, Address &Addr,  in emitLoad() 870   unsigned ResultReg;  in selectLogicalOp()  local 907   unsigned ResultReg;  in selectLoad()  local 988   unsigned ResultReg = createResultReg(&Mips::GPR32RegClass);  in selectCmp()  local 1061   unsigned ResultReg = createResultReg(RC);  in selectSelect()  local 1300     unsigned ResultReg = createResultReg(TLI.getRegClassFor(CopyVT));  in finishCall()  local [all …] 
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| /external/llvm/lib/Target/Mips/ | 
| D | MipsFastISel.cpp | 279   unsigned ResultReg = createResultReg(&Mips::GPR32RegClass);  in emitLogicalOp()  local 298     unsigned ResultReg = createResultReg(&Mips::GPR32RegClass);  in fastMaterializeAlloca()  local 319   unsigned ResultReg = createResultReg(RC);  in materialize32BitInt()  local 595 bool MipsFastISel::emitCmp(unsigned ResultReg, const CmpInst *CI) {  in emitCmp() 717 bool MipsFastISel::emitLoad(MVT VT, unsigned &ResultReg, Address &Addr,  in emitLoad() 835   unsigned ResultReg;  in selectLogicalOp()  local 872   unsigned ResultReg;  in selectLoad()  local 940   unsigned ResultReg = createResultReg(&Mips::GPR32RegClass);  in selectCmp()  local 1008   unsigned ResultReg = createResultReg(RC);  in selectSelect()  local 1238     unsigned ResultReg = createResultReg(TLI.getRegClassFor(CopyVT));  in finishCall()  local [all …] 
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| /external/llvm/lib/Target/PowerPC/ | 
| D | PPCFastISel.cpp | 443     unsigned ResultReg = createResultReg(&PPC::G8RC_and_G8RC_NOX0RegClass);  in PPCSimplifyAddress()  local 462 bool PPCFastISel::PPCEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr,  in PPCEmitLoad() 612   unsigned ResultReg = 0;  in SelectLoad()  local 989   unsigned ResultReg = 0;  in PPCMoveToFPReg()  local 1098   unsigned ResultReg = 0;  in PPCMoveToIntReg()  local 1203   unsigned ResultReg = createResultReg(RC ? RC : &PPC::G8RCRegClass);  in SelectBinaryIntOp()  local 1421     unsigned ResultReg = 0;  in finishCall()  local 1800     unsigned ResultReg = createResultReg(&PPC::GPRCRegClass);  in SelectTrunc()  local 1841   unsigned ResultReg = createResultReg(RC);  in SelectIntExt()  local 2011   unsigned ResultReg = createResultReg(RC);  in PPCMaterialize32BitInt()  local [all …] 
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ | 
| D | PPCFastISel.cpp | 435     unsigned ResultReg = createResultReg(&PPC::G8RC_and_G8RC_NOX0RegClass);  in PPCSimplifyAddress()  local 454 bool PPCFastISel::PPCEmitLoad(MVT VT, Register &ResultReg, Address &Addr,  in PPCEmitLoad() 615   Register ResultReg = 0;  in SelectLoad()  local 1054   Register ResultReg = 0;  in PPCMoveToFPReg()  local 1179   Register ResultReg = 0;  in PPCMoveToIntReg()  local 1300   unsigned ResultReg = createResultReg(RC ? RC : &PPC::G8RCRegClass);  in SelectBinaryIntOp()  local 1518     unsigned ResultReg = 0;  in finishCall()  local 1926   unsigned ResultReg = createResultReg(RC);  in SelectIntExt()  local 2116   unsigned ResultReg = createResultReg(RC);  in PPCMaterialize32BitInt()  local 2188     unsigned ResultReg = createResultReg(RC);  in PPCMaterialize64BitInt()  local [all …] 
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| /external/llvm/include/llvm/CodeGen/ | 
| D | FastISel.h | 80     unsigned ResultReg;  member
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ | 
| D | FastISel.h | 91     unsigned ResultReg = 0;  member
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| /external/llvm/lib/Target/AMDGPU/ | 
| D | SIInstrInfo.cpp | 2682   unsigned ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in lowerScalarAbs()  local 2833   unsigned ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitBCNT()  local 2878     unsigned ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in splitScalar64BitBFE()  local 2902   unsigned ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in splitScalar64BitBFE()  local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ | 
| D | SIInstrInfo.cpp | 5121     Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in moveScalarAddSub()  local 5155   Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in lowerScalarAbs()  local 5544   Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitBCNT()  local 5585     Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in splitScalar64BitBFE()  local 5609   Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in splitScalar64BitBFE()  local 5664   Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()  local
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| D | SIRegisterInfo.cpp | 1092         Register ResultReg = IsCopy ?  in eliminateFrameIndex()  local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ | 
| D | MachineIRBuilder.cpp | 669   for (unsigned ResultReg : ResultRegs)  in buildIntrinsic()  local
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