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Searched defs:Rm (Results 1 – 14 of 14) sorted by relevance

/external/vogar/src/vogar/commands/
DRm.java25 public final class Rm { class
28 public Rm(Log log) { in Rm() method in Rm
/external/capstone/arch/ARM/
DARMDisassembler.c1172 unsigned Rm = fieldFromInstruction_4(Val, 0, 4); in DecodeSORegImmOperand() local
1211 unsigned Rm = fieldFromInstruction_4(Val, 0, 4); in DecodeSORegRegOperand() local
1527 unsigned Rm = fieldFromInstruction_4(Insn, 0, 4); in DecodeAddrMode2IdxInstruction() local
1633 unsigned Rm = fieldFromInstruction_4(Val, 0, 4); in DecodeSORegMemOperand() local
1677 unsigned Rm = fieldFromInstruction_4(Insn, 0, 4); in DecodeAddrMode3Instruction() local
1899 unsigned Rm = fieldFromInstruction_4(Insn, 0, 4); in DecodeQADDInstruction() local
2156 unsigned Rm = fieldFromInstruction_4(Insn, 8, 4); in DecodeSMLAInstruction() local
2278 unsigned Rm = fieldFromInstruction_4(Val, 0, 4); in DecodeAddrMode6Operand() local
2295 unsigned wb, Rn, Rm; in DecodeVLDInstruction() local
2629 unsigned wb, Rn, Rm; in DecodeVSTInstruction() local
[all …]
/external/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp1140 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegImmOperand() local
1177 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegRegOperand() local
1477 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeAddrMode2IdxInstruction() local
1581 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegMemOperand() local
1626 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeAddrMode3Instruction() local
1845 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeQADDInstruction() local
2123 unsigned Rm = fieldFromInstruction(Insn, 8, 4); in DecodeSMLAInstruction() local
2151 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeTSTInstruction() local
2317 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeAddrMode6Operand() local
2339 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeVLDInstruction() local
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp1453 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegImmOperand() local
1490 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegRegOperand() local
1829 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeAddrMode2IdxInstruction() local
1933 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegMemOperand() local
1978 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeAddrMode3Instruction() local
2197 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeQADDInstruction() local
2475 unsigned Rm = fieldFromInstruction(Insn, 8, 4); in DecodeSMLAInstruction() local
2503 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeTSTInstruction() local
2668 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeAddrMode6Operand() local
2690 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeVLDInstruction() local
[all …]
/external/swiftshader/third_party/subzero/src/
DIceAssemblerARM32.cpp334 IValueT encodeShiftRotateImm5(IValueT Rm, OperandARM32::ShiftKind Shift, in encodeShiftRotateImm5()
343 IValueT encodeShiftRotateReg(IValueT Rm, OperandARM32::ShiftKind Shift, in encodeShiftRotateReg()
389 IValueT Rm; in encodeOperand() local
985 RegARM32::GPRRegister Rm = getGPRReg(kRmShift, Address); in emitMemOp() local
1062 IValueT Rn, IValueT Rm) { in emitDivOp()
1129 IValueT Rn, IValueT Rm, IValueT Rs, in emitMulOp()
1159 IValueT Rm = encodeGPRegister(OpSrc0, "Rm", InstName); in emitSignExtend() local
1435 IValueT Rm = encodeGPRegister(Target, "Rm", BlxName); in blx() local
1443 void AssemblerARM32::bx(RegARM32::GPRRegister Rm, CondARM32::Cond Cond) { in bx()
1467 IValueT Rm = encodeGPRegister(OpSrc, RmName, ClzName); in clz() local
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DIceAssemblerX8664.h986 void emitRexRB(const Type Ty, const RegType Reg, const RmType Rm) { in emitRexRB()
992 const RmType Rm) { in emitRexRB()
999 template <typename RmType> void emitRexB(const Type Ty, const RmType Rm) { in emitRexB()
/external/llvm/lib/Target/ARM/
DARMBaseInstrInfo.cpp2821 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
2828 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
2858 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
2870 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
2889 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
2909 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
2917 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
2935 unsigned Rm = MI.getOperand(4).getReg(); in getNumMicroOpsSwiftLdSt() local
2949 unsigned Rm = MI.getOperand(4).getReg(); in getNumMicroOpsSwiftLdSt() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMBaseInstrInfo.cpp3375 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3382 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3412 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3424 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3443 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3463 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3471 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3489 Register Rm = MI.getOperand(4).getReg(); in getNumMicroOpsSwiftLdSt() local
3503 Register Rm = MI.getOperand(4).getReg(); in getNumMicroOpsSwiftLdSt() local
/external/capstone/arch/AArch64/
DAArch64Disassembler.c837 unsigned Rm = fieldFromInstruction(insn, 16, 5); in DecodeThreeAddrSRegInstruction() local
1390 unsigned Rd, Rn, Rm; in DecodeAddSubERegInstruction() local
/external/llvm/lib/Target/AArch64/Disassembler/
DAArch64Disassembler.cpp745 unsigned Rm = fieldFromInstruction(insn, 16, 5); in DecodeThreeAddrSRegInstruction() local
1298 unsigned Rm = fieldFromInstruction(insn, 16, 5); in DecodeAddSubERegInstruction() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Disassembler/
DAArch64Disassembler.cpp938 unsigned Rm = fieldFromInstruction(insn, 16, 5); in DecodeThreeAddrSRegInstruction() local
1509 unsigned Rm = fieldFromInstruction(insn, 16, 5); in DecodeAddSubERegInstruction() local
/external/llvm/lib/Target/ARM/MCTargetDesc/
DARMMCCodeEmitter.cpp866 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); in getThumbAddrModeRegRegOpValue() local
1073 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getLdStSORegOpValue() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/
DARMMCCodeEmitter.cpp939 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); in getThumbAddrModeRegRegOpValue() local
1257 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getLdStSORegOpValue() local
/external/XNNPACK/src/jit/
Daarch32-assembler.cc198 void Assembler::mov(Condition c, CoreRegister Rd, CoreRegister Rm) { in mov()