| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelDAGToDAG.cpp | 793 SDValue &VAddr, SDValue &SOffset, in SelectMUBUF()
869 SDValue &VAddr, SDValue &SOffset, in SelectMUBUFAddr64()
897 SDValue &VAddr, SDValue &SOffset, in SelectMUBUFAddr64()
907 SDValue &VAddr, SDValue &SOffset, in SelectMUBUFScratch()
938 SDValue &SOffset, SDValue &Offset, in SelectMUBUFOffset()
981 SDValue &SOffset, in SelectMUBUFConstant()
1025 SDValue &SOffset, in SelectMUBUFIntrinsicOffset()
1036 SDValue &SOffset, in SelectMUBUFIntrinsicVOffset()
1378 SDValue SRsrc, VAddr, SOffset, Offset, GLC, SLC; in SelectATOMIC_CMP_SWAP() local
1396 SDValue SRsrc, SOffset, Offset, SLC; in SelectATOMIC_CMP_SWAP() local
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| D | SIRegisterInfo.cpp | 430 unsigned SOffset = ScratchOffset; in buildScratchLoadStore() local
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| D | SIInstrInfo.cpp | 2425 MachineOperand *SOffset = getNamedOperand(MI, AMDGPU::OpName::soffset); in legalizeOperands() local
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| /external/flatbuffers/swift/Sources/FlatBuffers/ |
| D | Constants.swift | 37 public typealias SOffset = Int32 typealias
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelDAGToDAG.cpp | 1339 SDValue &VAddr, SDValue &SOffset, in SelectMUBUF()
1434 SDValue &VAddr, SDValue &SOffset, in SelectMUBUFAddr64()
1463 SDValue &VAddr, SDValue &SOffset, in SelectMUBUFAddr64()
1499 SDValue &VAddr, SDValue &SOffset, in SelectMUBUFScratchOffen()
1567 SDValue &SOffset, in SelectMUBUFScratchOffset()
1592 SDValue &SOffset, SDValue &Offset, in SelectMUBUFOffset()
2164 SDValue SRsrc, VAddr, SOffset, Offset, SLC; in SelectATOMIC_CMP_SWAP() local
2182 SDValue SRsrc, SOffset, Offset, SLC; in SelectATOMIC_CMP_SWAP() local
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| D | AMDGPUInstructionSelector.cpp | 988 Register SOffset = MI.getOperand(4).getReg(); in selectStoreIntrinsic() local
2165 Register SOffset = FI.hasValue() ? Info->getStackPtrOffsetReg() in selectMUBUFScratchOffen() local
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| D | SIRegisterInfo.cpp | 634 unsigned SOffset = ScratchOffsetReg; in buildSpillLoadStore() local
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| D | GCNHazardRecognizer.cpp | 689 const MachineOperand *SOffset = in createsVALUHazard() local
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| D | SIInstrInfo.cpp | 326 const MachineOperand *SOffset = getNamedOperand(LdSt, AMDGPU::OpName::soffset); in getMemOperandWithOffset() local
4756 MachineOperand *SOffset = getNamedOperand(MI, AMDGPU::OpName::soffset); in legalizeOperands() local
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| D | AMDGPURegisterBankInfo.cpp | 1381 Register SOffset = MI.getOperand(4).getReg(); in selectStoreIntrinsic() local
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| D | SIISelLowering.cpp | 6116 SDValue SOffset, in getBufferOffsetForMMO()
7191 uint32_t SOffset, ImmOffset; in setBufferOffsets() local
7202 uint32_t SOffset, ImmOffset; in setBufferOffsets() local
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| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCCodeEmitter.cpp | 140 unsigned SOffset = 0; in EncodeSingleInstruction() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCCodeEmitter.cpp | 735 unsigned SOffset = 0; in getMachineOpValue() local
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| /external/flatbuffers/src/ |
| D | binary_annotator.h | 34 SOffset = 2, enumerator
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/ |
| D | ARCISelLowering.cpp | 293 SDValue SOffset = DAG.getIntPtrConstant(VA.getLocMemOffset(), dl); in LowerCall() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Utils/ |
| D | AMDGPUBaseInfo.cpp | 1269 bool splitMUBUFOffset(uint32_t Imm, uint32_t &SOffset, uint32_t &ImmOffset, in splitMUBUFOffset()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 3430 StackOffset &SOffset, in isAArch64FrameOffsetLegal()
|