| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.h | 65 SHL, SRA, SRL enumerator
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| /external/llvm/lib/Target/Lanai/ |
| D | LanaiAluCode.h | 38 SRA = 0x37, enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiAluCode.h | 37 SRA = 0x37, enumerator
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.h | 106 SRL, SRA, SHL, enumerator
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZSelectionDAGInfo.cpp | 174 SDValue SRA = DAG.getNode(ISD::SRA, DL, MVT::i32, SHL, in addIPMSequence() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.h | 157 SRA, enumerator
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 339 SHL, SRA, SRL, ROTL, ROTR, enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 471 SHL, SRA, SRL, ROTL, ROTR, FSHL, FSHR, enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 837 const bool SRA = Op.getOpcode() == ISD::SRA_PARTS; in LowerSRXParts() local
|
| /external/pcre/src/sljit/ |
| D | sljitNativeRISCV_common.c | 131 #define SRA (F7(0x20) | F3(0x5) | OPC(0x33)) macro
|
| D | sljitNativeMIPS_common.c | 273 #define SRA (HI(0) | LO(3)) macro
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 1011 const bool SRA = Op.getOpcode() == ISD::SRA_PARTS; in LowerSRXParts() local
|
| /external/llvm/include/llvm/TableGen/ |
| D | Record.h | 801 enum BinaryOp : uint8_t { ADD, AND, SHL, SRA, SRL, LISTCONCAT, enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/TableGen/ |
| D | Record.h | 803 enum BinaryOp : uint8_t { ADD, MUL, AND, OR, SHL, SRA, SRL, LISTCONCAT, enumerator
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 2283 SDValue SRA = DAG.getNode(ISD::SRA, DL, VT, ADD, in visitSDIV() local
4737 SDValue SRA = DAG.getNode(ISD::SRA, DL, LargeVT, in visitSRA() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 3672 SDValue SRA = in LowerINTRINSIC_WO_CHAIN() local
11306 SDValue SRA = AddeNode->getOperand(0); in AddCombineTo64BitSMLAL16() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 3254 SDValue SRA = DAG.getNode(ISD::SRA, DL, VT, N1.getOperand(0), ShAmt); in visitSUB() local
7866 SDValue SRA = in visitSRA() local
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 7525 SDValue SRA = in BuildSDIVPow2() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 9722 SDValue SRA = in BuildSDIVPow2() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 21061 SDValue SRA = in BuildSDIVPow2() local
|