| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 1259 SDValue SetCC = DAG.getSetCC(dl, MVT::i32, ShAmt, Zero, ISD::SETEQ); in LowerSHL_PARTS() local
1307 SDValue SetCC = DAG.getSetCC(dl, MVT::i32, NegatedPlus32, Zero, ISD::SETLE); in LowerSRL_PARTS() local
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| /external/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 1261 SDValue SetCC = DAG.getSetCC(dl, MVT::i32, NegatedPlus32, Zero, ISD::SETLE); in LowerSRL_PARTS() local
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 15613 SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, in LowerSETCC() local
15642 SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, in LowerSETCC() local
15665 SDValue SetCC = DAG.getNode(X86ISD::SETCC, DL, MVT::i8, in LowerSETCCE() local
17773 SDValue SetCC; in LowerINTRINSIC_WO_CHAIN() local
18021 SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, CC, Test); in LowerINTRINSIC_WO_CHAIN() local
18031 SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, CC, Test); in LowerINTRINSIC_WO_CHAIN() local
18093 SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, in LowerINTRINSIC_WO_CHAIN() local
18467 SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, in LowerINTRINSIC_W_CHAIN() local
18485 SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, in LowerINTRINSIC_W_CHAIN() local
20530 SDValue SetCC = in LowerXALUO() local
[all …]
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| /external/swiftshader/third_party/subzero/unittest/AssemblerX8632/ |
| D | GPRArith.cpp | 47 TEST_F(AssemblerX8632Test, SetCC) { in TEST_F() argument
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| /external/swiftshader/third_party/subzero/unittest/AssemblerX8664/ |
| D | GPRArith.cpp | 32 TEST_F(AssemblerX8664Test, SetCC) { in TEST_F() argument
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 1027 SDValue SetCC = N->getOperand(0); in performVSELECTCombine() local
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| D | MipsISelLowering.cpp | 582 SDValue SetCC = N->getOperand(0); in performSELECTCombine() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 985 SDValue SetCC = N->getOperand(0); in performVSELECTCombine() local
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| D | MipsISelLowering.cpp | 681 SDValue SetCC = N->getOperand(0); in performSELECTCombine() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 5902 SDNode *SetCC = SetCCs[i]; in ExtendSetCCUses() local
6221 SDValue SetCC = DAG.getSetCC(DL, SetCCVT, in visitSIGN_EXTEND() local
9498 SDValue SetCC = in visitBRCOND() local
9565 SDValue SetCC = DAG.getSetCC(SDLoc(TheXor), in visitBRCOND() local
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| D | LegalizeDAG.cpp | 3370 SDValue SetCC = DAG.getSetCC(dl, SetCCType, Sum, LHS, CC); in ExpandNode() local
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| D | LegalizeIntegerTypes.cpp | 620 SDValue SetCC = DAG.getNode(N->getOpcode(), dl, SVT, LHS, RHS, in PromoteIntRes_SETCC() local
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 9088 SDValue SetCC = N0.getOperand(0); in performAcrossLaneMinMaxReductionCombine() local
9763 SDValue SetCC = in performVSelectCombine() local
9824 SDValue SetCC = DAG.getNode(ISD::SETCC, DL, CCVT, LHS, RHS, N0.getOperand(2)); in performSelectCombine() local
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 1368 SDNode *SetCC = nullptr; in LowerBRCOND() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 22021 SDValue SetCC = getSETCC(Cond, Overflow, DL, DAG); in LowerXALUO() local
24009 SDValue SetCC; in LowerINTRINSIC_WO_CHAIN() local
24156 SDValue SetCC = getSETCC(X86::COND_B, Res.getValue(1), dl, DAG); in LowerINTRINSIC_WO_CHAIN() local
24302 SDValue SetCC = getSETCC(X86CC, Test, dl, DAG); in LowerINTRINSIC_WO_CHAIN() local
24364 SDValue SetCC = getSETCC(X86CC, PCMP, dl, DAG); in LowerINTRINSIC_WO_CHAIN() local
24867 SDValue SetCC = getSETCC(X86::COND_B, Operation.getValue(0), dl, DAG); in LowerINTRINSIC_W_CHAIN() local
24888 SDValue SetCC = getSETCC(X86::COND_E, Operation.getValue(0), dl, DAG); in LowerINTRINSIC_W_CHAIN() local
24987 SDValue SetCC = getSETCC(X86::COND_NE, InTrans, dl, DAG); in LowerINTRINSIC_W_CHAIN() local
28134 SDValue SetCC = getSETCC(X86::COND_B, Sum.getValue(1), DL, DAG); in LowerADDSUBCARRY() local
38461 SDValue SetCC; in checkBoolTestSetCCCombine() local
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 4232 SDValue SetCC = DAG.getNode(AMDGPUISD::SETCC, DL, CCVT, LHS, RHS, in lowerICMPIntrinsic() local
4264 SDValue SetCC = DAG.getNode(AMDGPUISD::SETCC, SL, CCVT, Src0, in lowerFCMPIntrinsic() local
4463 SDNode *SetCC = nullptr; in LowerBRCOND() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 3631 SDValue SetCC = emitSETCC(DAG, DL, Result.getValue(1), CCValid, CCMask); in lowerXALUO() local
3697 SDValue SetCC = emitSETCC(DAG, DL, Result.getValue(1), CCValid, CCMask); in lowerADDSUBCARRY() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 7417 SDValue SetCC = DAG.getSetCC(dl, SetCCType, Result, LHS, CC); in expandUADDSUBO() local
7439 SDValue SetCC = DAG.getSetCC(dl, OType, Result, Sat, ISD::SETNE); in expandSADDSUBO() local
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| D | DAGCombiner.cpp | 2022 SDValue SetCC = Z.getOperand(0); in foldAddSubBoolOfMaskedVal() local
9444 SDValue SetCC = VSel.getOperand(0); in matchVSelectOpSizesWithSetCC() local
9571 SDValue SetCC = N->getOperand(0); in foldExtendedSignBitTest() local
9799 SDValue SetCC = DAG.getSetCC(DL, SetCCVT, N00, N01, CC); in visitSIGN_EXTEND() local
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| D | LegalizeIntegerTypes.cpp | 927 SDValue SetCC; in PromoteIntRes_SETCC() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 12203 SDValue SetCC = in performVSelectCombine() local
12264 SDValue SetCC = DAG.getNode(ISD::SETCC, DL, CCVT, LHS, RHS, N0.getOperand(2)); in performSelectCombine() local
|