| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/Utils/ | 
| D | RISCVMatInt.cpp | 84   for (unsigned ShiftVal = 0; ShiftVal < Size; ShiftVal += PlatRegSize) {  in getIntMatCost()  local
 | 
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/ | 
| D | AArch64MCCodeEmitter.cpp | 267   unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm());  in getAddSubImmOpValue()  local528   unsigned ShiftVal = AArch64_AM::getShiftValue(ShiftOpnd);  in getImm8OptLsl()  local
 555   unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm());  in getMoveVecShifterOpValue()  local
 
 | 
| D | AArch64InstPrinter.cpp | 995   unsigned ShiftVal = AArch64_AM::getArithShiftValue(Val);  in printArithExtend()  local
 | 
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ | 
| D | AArch64MCCodeEmitter.cpp | 252   unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm());  in getAddSubImmOpValue()  local503   unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm());  in getMoveVecShifterOpValue()  local
 
 | 
| /external/llvm/lib/Target/AArch64/ | 
| D | AArch64TargetTransformInfo.cpp | 55   for (unsigned ShiftVal = 0; ShiftVal < BitSize; ShiftVal += 64) {  in getIntImmCost()  local
 | 
| D | AArch64FastISel.cpp | 1183       uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2();  in emitAddSub()  local1207         uint64_t ShiftVal = C->getZExtValue();  in emitAddSub()  local
 1561       uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2();  in emitLogicalOp()  local
 1578         uint64_t ShiftVal = C->getZExtValue();  in emitLogicalOp()  local
 4523       uint64_t ShiftVal = C->getValue().logBase2();  in selectMul()  local
 4589     uint64_t ShiftVal = C->getZExtValue();  in selectShift()  local
 
 | 
| D | AArch64ISelDAGToDAG.cpp | 567   unsigned ShiftVal = 0;  in SelectArithExtendedRegister()  local799   unsigned ShiftVal = CSD->getZExtValue();  in SelectExtendedSHL()  local
 
 | 
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ | 
| D | AArch64FastISel.cpp | 1262       uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2();  in emitAddSub()  local1286         uint64_t ShiftVal = C->getZExtValue();  in emitAddSub()  local
 1648       uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2();  in emitLogicalOp()  local
 1665         uint64_t ShiftVal = C->getZExtValue();  in emitLogicalOp()  local
 4702       uint64_t ShiftVal = C->getValue().logBase2();  in selectMul()  local
 4768     uint64_t ShiftVal = C->getZExtValue();  in selectShift()  local
 
 | 
| D | AArch64TargetTransformInfo.cpp | 75   for (unsigned ShiftVal = 0; ShiftVal < BitSize; ShiftVal += 64) {  in getIntImmCost()  local
 | 
| D | AArch64ISelDAGToDAG.cpp | 418   unsigned ShiftVal = CSD->getZExtValue();  in isWorthFoldingSHL()  local687   unsigned ShiftVal = 0;  in SelectArithExtendedRegister()  local
 944   unsigned ShiftVal = CSD->getZExtValue();  in SelectExtendedSHL()  local
 
 | 
| D | AArch64InstrInfo.cpp | 774     unsigned ShiftVal = AArch64_AM::getShiftValue(Imm);  in isFalkorShiftExtFast()  local801     unsigned ShiftVal = AArch64_AM::getShiftValue(Imm);  in isFalkorShiftExtFast()  local
 809     unsigned ShiftVal = AArch64_AM::getShiftValue(Imm);  in isFalkorShiftExtFast()  local
 
 | 
| D | AArch64InstructionSelector.cpp | 4708   unsigned ShiftVal = AArch64_AM::getShifterImm(ShType, Val);  in selectShiftedRegister()  local4795   uint64_t ShiftVal = 0;  in selectArithExtendedRegister()  local
 
 | 
| /external/llvm/lib/Target/AMDGPU/ | 
| D | AMDGPUISelDAGToDAG.cpp | 1265         uint32_t ShiftVal = Shift->getZExtValue();  in SelectS_BFE()  local1287         uint32_t ShiftVal = Shift->getZExtValue();  in SelectS_BFE()  local
 
 | 
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ | 
| D | ARMParallelDSP.cpp | 790   Value *ShiftVal = ConstantInt::get(LoadTy, OffsetTy->getBitWidth());  in CreateWideLoad()  local
 | 
| /external/llvm/lib/Target/X86/ | 
| D | X86TargetTransformInfo.cpp | 1303   for (unsigned ShiftVal = 0; ShiftVal < BitSize; ShiftVal += 64) {  in getIntImmCost()  local
 | 
| /external/capstone/arch/AArch64/ | 
| D | AArch64InstPrinter.c | 1028 	unsigned ShiftVal = AArch64_AM_getArithShiftValue(Val);  in printArithExtend()  local
 | 
| /external/llvm/lib/Target/AArch64/InstPrinter/ | 
| D | AArch64InstPrinter.cpp | 1099   unsigned ShiftVal = AArch64_AM::getArithShiftValue(Val);  in printArithExtend()  local
 | 
| /external/llvm/lib/IR/ | 
| D | AutoUpgrade.cpp | 525   unsigned ShiftVal = cast<llvm::ConstantInt>(Shift)->getZExtValue();  in UpgradeX86PALIGNRIntrinsics()  local
 | 
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ | 
| D | WebAssemblyISelLowering.cpp | 1539   SDValue ShiftVal = Op.getOperand(1);  in unrollVectorShift()  local
 | 
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ | 
| D | AMDGPUISelDAGToDAG.cpp | 1964         uint32_t ShiftVal = Shift->getZExtValue();  in SelectS_BFE()  local1986         uint32_t ShiftVal = Shift->getZExtValue();  in SelectS_BFE()  local
 
 | 
| /external/llvm/lib/Transforms/InstCombine/ | 
| D | InstCombineCasts.cpp | 447   ConstantInt *ShiftVal = nullptr;  in foldVecTruncToExtElt()  local
 | 
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ | 
| D | MipsFastISel.cpp | 1993     uint64_t ShiftVal = C->getZExtValue();  in selectShift()  local
 | 
| /external/llvm/lib/Target/Mips/ | 
| D | MipsFastISel.cpp | 1736     uint64_t ShiftVal = C->getZExtValue();  in selectShift()  local
 | 
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ | 
| D | X86TargetTransformInfo.cpp | 3027   for (unsigned ShiftVal = 0; ShiftVal < BitSize; ShiftVal += 64) {  in getIntImmCost()  local
 | 
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/ | 
| D | InstCombineCompares.cpp | 2026   const APInt *ShiftVal;  in foldICmpShlConstant()  local2174   const APInt *ShiftVal;  in foldICmpShrConstant()  local
 
 |