| /external/llvm/lib/Target/AMDGPU/ |
| D | SIFixSGPRCopies.cpp | 135 const TargetRegisterClass *SrcRC = in getCopyRegClasses() local
151 static bool isVGPRToSGPRCopy(const TargetRegisterClass *SrcRC, in isVGPRToSGPRCopy()
157 static bool isSGPRToVGPRCopy(const TargetRegisterClass *SrcRC, in isSGPRToVGPRCopy()
193 const TargetRegisterClass *SrcRC, *DstRC; in foldVGPRCopyIntoRegSequence() local
220 const TargetRegisterClass *SrcRC = MRI.getRegClass(SrcReg); in foldVGPRCopyIntoRegSequence() local
264 const TargetRegisterClass *SrcRC, *DstRC; in runOnMachineFunction() local
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| D | SILowerI1Copies.cpp | 103 const TargetRegisterClass *SrcRC = MRI.getRegClass(Src.getReg()); in runOnMachineFunction() local
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| D | SIRegisterInfo.cpp | 810 const TargetRegisterClass *SrcRC, in shouldRewriteCopySrc()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIFixSGPRCopies.cpp | 174 const TargetRegisterClass *SrcRC = Register::isVirtualRegister(SrcReg) in getCopyRegClasses() local
188 static bool isVGPRToSGPRCopy(const TargetRegisterClass *SrcRC, in isVGPRToSGPRCopy()
195 static bool isSGPRToVGPRCopy(const TargetRegisterClass *SrcRC, in isSGPRToVGPRCopy()
261 const TargetRegisterClass *SrcRC, *DstRC; in foldVGPRCopyIntoRegSequence() local
292 const TargetRegisterClass *SrcRC = MRI.getRegClass(SrcReg); in foldVGPRCopyIntoRegSequence() local
614 const TargetRegisterClass *SrcRC, *DstRC; in runOnMachineFunction() local
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| D | AMDGPUInstructionSelector.cpp | 115 const TargetRegisterClass *SrcRC in selectCOPY() local
151 const TargetRegisterClass *SrcRC = in selectCOPY() local
463 const TargetRegisterClass *SrcRC = in selectG_EXTRACT() local
511 const TargetRegisterClass *SrcRC in selectG_MERGE_VALUES() local
540 const TargetRegisterClass *SrcRC = in selectG_UNMERGE_VALUES() local
1270 const TargetRegisterClass *SrcRC in selectG_TRUNC() local
1655 const TargetRegisterClass *SrcRC = TRI.getRegClassForTypeOnBank(Ty, *SrcRB, in selectG_PTR_MASK() local
1713 const TargetRegisterClass *SrcRC = TRI.getRegClassForTypeOnBank(SrcTy, *SrcRB, in selectG_EXTRACT_VECTOR_ELT() local
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| D | SIRegisterInfo.cpp | 1469 const TargetRegisterClass *SrcRC, in shouldRewriteCopySrc()
1702 const TargetRegisterClass *SrcRC, in shouldCoalesce()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstructionSelector.cpp | 247 const TargetRegisterClass *SrcRC = in selectCopy() local
285 const TargetRegisterClass *SrcRC = getRegClassFromGRPhysReg(SrcReg); in selectCopy() local
684 const TargetRegisterClass *SrcRC) { in canTurnIntoCOPY()
728 const TargetRegisterClass *SrcRC = getRegClass(SrcTy, SrcRB); in selectTruncOrPtrToInt() local
810 const TargetRegisterClass *SrcRC = getRegClass(SrcTy, SrcRB); in selectZext() local
903 const TargetRegisterClass *SrcRC = getRegClass(SrcTy, SrcRB); in selectAnyext() local
1217 const TargetRegisterClass *SrcRC = getRegClass(SrcTy, SrcReg, MRI); in emitExtractSubreg() local
1255 const TargetRegisterClass *SrcRC = getRegClass(SrcTy, SrcReg, MRI); in emitInsertSubreg() local
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| D | X86RegisterInfo.cpp | 221 const TargetRegisterClass *SrcRC, in shouldRewriteCopySrc()
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| D | X86DomainReassignment.cpp | 66 static const TargetRegisterClass *getDstRC(const TargetRegisterClass *SrcRC, in getDstRC()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXInstrInfo.cpp | 38 const TargetRegisterClass *SrcRC = MRI.getRegClass(SrcReg); in copyPhysReg() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCVSXCopy.cpp | 99 const TargetRegisterClass *SrcRC = &PPC::VSLRCRegClass; in processBlock() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | InstructionSelect.cpp | 174 auto SrcRC = MRI.getRegClass(SrcReg); in runOnMachineFunction() local
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCVSXCopy.cpp | 106 const TargetRegisterClass *SrcRC = in processBlock() local
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| /external/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 292 const TargetRegisterClass *SrcRC, in shareSameRegisterFile()
322 const TargetRegisterClass *SrcRC, in shouldRewriteCopySrc()
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| D | DetectDeadLanes.cpp | 161 const TargetRegisterClass *SrcRC = MRI.getRegClass(SrcReg); in isCrossCopy() local
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXInstrInfo.cpp | 39 const TargetRegisterClass *SrcRC = MRI.getRegClass(SrcReg); in copyPhysReg() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 345 const TargetRegisterClass *SrcRC, in shareSameRegisterFile()
375 const TargetRegisterClass *SrcRC, in shouldRewriteCopySrc()
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| D | DetectDeadLanes.cpp | 158 const TargetRegisterClass *SrcRC = MRI.getRegClass(SrcReg); in isCrossCopy() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRRegisterInfo.cpp | 277 const TargetRegisterClass *SrcRC, in shouldCoalesce()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonRegisterInfo.cpp | 241 const TargetRegisterClass *SrcRC, unsigned SubReg, in shouldCoalesce()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZRegisterInfo.cpp | 341 const TargetRegisterClass *SrcRC, in shouldCoalesce()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | ScheduleDAGFast.cpp | 382 const TargetRegisterClass *SrcRC, in InsertCopiesAndMoveSuccs()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.cpp | 784 const TargetRegisterClass *SrcRC, in shouldCoalesce()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | ScheduleDAGFast.cpp | 389 const TargetRegisterClass *SrcRC, in InsertCopiesAndMoveSuccs()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.cpp | 837 const TargetRegisterClass *SrcRC, in shouldCoalesce()
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