| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonPeephole.cpp | 143 unsigned SrcReg = Src.getReg(); in runOnMachineFunction() local
164 unsigned SrcReg = Src2.getReg(); in runOnMachineFunction() local
181 unsigned SrcReg = Src1.getReg(); in runOnMachineFunction() local
192 unsigned SrcReg = Src.getReg(); in runOnMachineFunction() local
215 unsigned SrcReg = Src.getReg(); in runOnMachineFunction() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonPeephole.cpp | 140 Register SrcReg = Src.getReg(); in runOnMachineFunction() local
161 Register SrcReg = Src2.getReg(); in runOnMachineFunction() local
178 Register SrcReg = Src1.getReg(); in runOnMachineFunction() local
189 Register SrcReg = Src.getReg(); in runOnMachineFunction() local
212 Register SrcReg = Src.getReg(); in runOnMachineFunction() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 219 MachineInstrBuilder emitInstStore(unsigned Opc, unsigned SrcReg, in emitInstStore()
813 bool MipsFastISel::emitStore(MVT VT, unsigned SrcReg, Address &Addr, in emitStore()
916 unsigned SrcReg = 0; in selectStore() local
1006 unsigned SrcReg = in selectFPExt() local
1085 unsigned SrcReg = getRegForValue(Src); in selectFPTrunc() local
1121 unsigned SrcReg = getRegForValue(Src); in selectFPToInt() local
1467 unsigned SrcReg = Allocation[ArgNo].Reg; in fastLowerArguments() local
1600 unsigned SrcReg = getRegForValue(II->getOperand(0)); in fastLowerIntrinsicCall() local
1730 unsigned SrcReg = Reg + VA.getValNo(); in selectRet() local
1794 unsigned SrcReg = getRegForValue(Op); in selectTrunc() local
[all …]
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| /external/llvm/lib/CodeGen/ |
| D | PeepholeOptimizer.cpp | 239 void addSource(unsigned SrcReg, unsigned SrcSubReg) { in addSource()
243 void setSource(int Idx, unsigned SrcReg, unsigned SrcSubReg) { in setSource()
414 unsigned SrcReg, DstReg, SubIdx; in INITIALIZE_PASS_DEPENDENCY() local
565 unsigned SrcReg, SrcReg2; in optimizeCmpInstr() local
778 virtual bool getNextRewritableSource(unsigned &SrcReg, unsigned &SrcSubReg, in getNextRewritableSource()
900 bool getNextRewritableSource(unsigned &SrcReg, unsigned &SrcSubReg, in getNextRewritableSource()
982 bool getNextRewritableSource(unsigned &SrcReg, unsigned &SrcSubReg, in getNextRewritableSource()
1030 bool getNextRewritableSource(unsigned &SrcReg, unsigned &SrcSubReg, in getNextRewritableSource()
1102 bool getNextRewritableSource(unsigned &SrcReg, unsigned &SrcSubReg, in getNextRewritableSource()
1200 unsigned SrcReg, SrcSubReg, TrackReg, TrackSubReg; in optimizeCoalescableCopy() local
[all …]
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| D | PHIEliminationUtils.cpp | 23 unsigned SrcReg) { in findPHICopyInsertPoint()
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 169 MachineInstrBuilder emitInstStore(unsigned Opc, unsigned SrcReg, in emitInstStore()
778 bool MipsFastISel::emitStore(MVT VT, unsigned SrcReg, Address &Addr, in emitStore()
881 unsigned SrcReg = 0; in selectStore() local
958 unsigned SrcReg = in selectFPExt() local
1032 unsigned SrcReg = getRegForValue(Src); in selectFPTrunc() local
1068 unsigned SrcReg = getRegForValue(Src); in selectFPToInt() local
1353 unsigned SrcReg = getRegForValue(II->getOperand(0)); in fastLowerIntrinsicCall() local
1481 unsigned SrcReg = Reg + VA.getValNo(); in selectRet() local
1539 unsigned SrcReg = getRegForValue(Op); in selectTrunc() local
1554 unsigned SrcReg = getRegForValue(Src); in selectIntExt() local
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFInstrInfo.cpp | 34 MCRegister SrcReg, bool KillSrc) const { in copyPhysReg()
47 Register SrcReg = MI->getOperand(1).getReg(); in expandMEMCPY() local
126 unsigned SrcReg, bool IsKill, int FI, in storeRegToStackSlot()
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| D | BPFMISimplifyPatchable.cpp | 146 MachineBasicBlock &MBB, MachineInstr &MI, Register &SrcReg, in processCandidate()
179 Register &DstReg, Register &SrcReg, const GlobalValue *GVal, in processDstReg()
255 Register SrcReg = MI.getOperand(1).getReg(); in removeLD() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRExpandPseudoInsts.cpp | 146 Register SrcReg = MI.getOperand(2).getReg(); in expandArith() local
179 Register SrcReg = MI.getOperand(2).getReg(); in expandLogic() local
423 unsigned SrcReg = MI.getOperand(1).getReg(); in expand() local
456 unsigned SrcReg = MI.getOperand(1).getReg(); in expand() local
585 unsigned SrcReg = MI.getOperand(1).getReg(); in expand() local
633 unsigned SrcReg = MI.getOperand(1).getReg(); in expand() local
664 unsigned SrcReg = MI.getOperand(1).getReg(); in expand() local
696 unsigned SrcReg = MI.getOperand(1).getReg(); in expand() local
751 unsigned SrcReg = MI.getOperand(1).getReg(); in expand() local
972 unsigned SrcReg = MI.getOperand(1).getReg(); in expand() local
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | LegalizationArtifactCombiner.h | 55 Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg()); in tryCombineAnyExt() local
104 Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg()); in tryCombineZExt() local
148 Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg()); in tryCombineSExt() local
175 Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg()); in tryCombineTrunc() local
437 Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg()); in tryCombineExtract() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 155 unsigned SrcReg, unsigned Flag = 0, in copyRegToRegClass()
624 bool PPCFastISel::PPCEmitStore(MVT VT, unsigned SrcReg, Address &Addr) { in PPCEmitStore()
741 unsigned SrcReg = 0; in SelectStore() local
966 unsigned SrcReg = getRegForValue(Src); in SelectFPExt() local
984 unsigned SrcReg = getRegForValue(Src); in SelectFPTrunc() local
1019 unsigned PPCFastISel::PPCMoveToFPReg(MVT SrcVT, unsigned SrcReg, in PPCMoveToFPReg()
1084 unsigned SrcReg = getRegForValue(Src); in SelectIToFP() local
1155 unsigned SrcReg, bool IsSigned) { in PPCMoveToIntReg()
1211 unsigned SrcReg = getRegForValue(Src); in SelectFPToI() local
1725 unsigned SrcReg = in SelectRet() local
[all …]
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 620 bool PPCFastISel::PPCEmitStore(MVT VT, unsigned SrcReg, Address &Addr) { in PPCEmitStore()
734 unsigned SrcReg = 0; in SelectStore() local
916 unsigned SrcReg = getRegForValue(Src); in SelectFPExt() local
934 unsigned SrcReg = getRegForValue(Src); in SelectFPTrunc() local
954 unsigned PPCFastISel::PPCMoveToFPReg(MVT SrcVT, unsigned SrcReg, in PPCMoveToFPReg()
1019 unsigned SrcReg = getRegForValue(Src); in SelectIToFP() local
1074 unsigned SrcReg, bool IsSigned) { in PPCMoveToIntReg()
1129 unsigned SrcReg = getRegForValue(Src); in SelectFPToI() local
1635 unsigned SrcReg = in SelectRet() local
1655 unsigned SrcReg = Reg + VA.getValNo(); in SelectRet() local
[all …]
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| /external/llvm/lib/Target/BPF/ |
| D | BPFInstrInfo.cpp | 37 unsigned SrcReg, bool KillSrc) const { in copyPhysReg()
47 unsigned SrcReg, bool IsKill, int FI, in storeRegToStackSlot()
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| /external/llvm/lib/Target/ARM/ |
| D | Thumb1InstrInfo.cpp | 43 unsigned SrcReg, bool KillSrc) const { in copyPhysReg()
72 unsigned SrcReg, bool isKill, int FI, in storeRegToStackSlot()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | Thumb1InstrInfo.cpp | 41 MCRegister SrcReg, bool KillSrc) const { in copyPhysReg()
79 unsigned SrcReg, bool isKill, int FI, in storeRegToStackSlot()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstructionSelector.cpp | 237 Register SrcReg = I.getOperand(1).getReg(); in selectCopy() local
692 const TargetRegisterClass *DstRC, const unsigned SrcReg, in selectTurnIntoCOPY()
713 const Register SrcReg = I.getOperand(1).getReg(); in selectTruncOrPtrToInt() local
777 const Register SrcReg = I.getOperand(1).getReg(); in selectZext() local
888 const Register SrcReg = I.getOperand(1).getReg(); in selectAnyext() local
1145 const Register SrcReg = I.getOperand(1).getReg(); in selectExtract() local
1195 bool X86InstructionSelector::emitExtractSubreg(unsigned DstReg, unsigned SrcReg, in emitExtractSubreg()
1233 bool X86InstructionSelector::emitInsertSubreg(unsigned DstReg, unsigned SrcReg, in emitInsertSubreg()
1277 const Register SrcReg = I.getOperand(1).getReg(); in selectInsert() local
1336 Register SrcReg = I.getOperand(NumDefs).getReg(); in selectUnmergeValues() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | PHIEliminationUtils.cpp | 22 unsigned SrcReg) { in findPHICopyInsertPoint()
|
| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXInstrInfo.cpp | 36 unsigned SrcReg, bool KillSrc) const { in copyPhysReg()
68 bool NVPTXInstrInfo::isMoveInstr(const MachineInstr &MI, unsigned &SrcReg, in isMoveInstr()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIFixSGPRCopies.cpp | 172 Register SrcReg = Copy.getOperand(1).getReg(); in getCopyRegClasses() local
208 Register SrcReg = Src.getReg(); in tryChangeVGPRtoSGPRinCopy() local
289 Register SrcReg = MI.getOperand(I).getReg(); in foldVGPRCopyIntoRegSequence() local
636 Register SrcReg = MI.getOperand(1).getReg(); in runOnMachineFunction() local
816 unsigned SrcReg = Def->getOperand(1).getReg(); in processPHINode() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZElimCompare.cpp | 219 unsigned SrcReg = getCompareSourceReg(Compare); in convertToBRCT() local
263 unsigned SrcReg = getCompareSourceReg(Compare); in convertToLoadAndTrap() local
526 unsigned SrcReg = getCompareSourceReg(Compare); in optimizeCompareZero() local
630 Register SrcReg = Compare.getOperand(0).getReg(); in fuseCompareOperations() local
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| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCDuplexInfo.cpp | 178 unsigned DstReg, PredReg, SrcReg, Src1Reg, Src2Reg; in getDuplexCandidateGroup() local
535 unsigned DstReg, SrcReg; in subInstWouldBeExtended() local
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.cpp | 127 unsigned SrcReg = MI.getOperand(1).getReg(); in expandRIEPseudo() local
202 unsigned SrcReg, unsigned LowLowOpcode, in emitGRX32Move()
432 bool SystemZInstrInfo::analyzeCompare(const MachineInstr &MI, unsigned &SrcReg, in analyzeCompare()
474 static bool removeIPMBasedCompare(MachineInstr &Compare, unsigned SrcReg, in removeIPMBasedCompare()
515 MachineInstr &Compare, unsigned SrcReg, unsigned SrcReg2, int Mask, in optimizeCompareInstr()
661 unsigned SrcReg, bool KillSrc) const { in copyPhysReg()
701 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, in storeRegToStackSlot()
807 unsigned SrcReg = Src.getReg(); in convertToThreeAddress() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430InstrInfo.cpp | 38 unsigned SrcReg, bool isKill, int FrameIdx, in storeRegToStackSlot()
93 MCRegister SrcReg, bool KillSrc) const { in copyPhysReg()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCDuplexInfo.cpp | 191 unsigned DstReg, PredReg, SrcReg, Src1Reg, Src2Reg; in getDuplexCandidateGroup() local
542 unsigned DstReg, SrcReg; in subInstWouldBeExtended() local
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430InstrInfo.cpp | 39 unsigned SrcReg, bool isKill, int FrameIdx, in storeRegToStackSlot()
94 unsigned SrcReg, bool KillSrc) const { in copyPhysReg()
|