| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64AdvSIMDScalarPass.cpp | 104 static bool isGPR64(unsigned Reg, unsigned SubReg, in isGPR64()
113 static bool isFPR64(unsigned Reg, unsigned SubReg, in isFPR64()
129 unsigned &SubReg) { in getSrcFromCopy()
245 unsigned SubReg; in isProfitableToTransform() local
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64AdvSIMDScalarPass.cpp | 112 static bool isGPR64(unsigned Reg, unsigned SubReg, in isGPR64()
121 static bool isFPR64(unsigned Reg, unsigned SubReg, in isFPR64()
137 unsigned &SubReg) { in getSrcFromCopy()
253 unsigned SubReg; in isProfitableToTransform() local
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| /external/llvm/lib/CodeGen/ |
| D | LiveVariables.cpp | 198 unsigned SubReg = *SubRegs; in FindLastPartialDef() local
252 unsigned SubReg = *SubRegs; in HandlePhysRegUse() local
291 unsigned SubReg = *SubRegs; in FindLastRefOrPartRef() local
340 unsigned SubReg = *SubRegs; in HandlePhysRegKill() local
371 unsigned SubReg = *SubRegs; in HandlePhysRegKill() local
453 unsigned SubReg = *SubRegs; in HandlePhysRegDef() local
475 unsigned SubReg = *SubRegs; in HandlePhysRegDef() local
493 unsigned SubReg = *SubRegs; in UpdatePhysRegDefs() local
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| D | DetectDeadLanes.cpp | 180 unsigned SubReg = MI.getOperand(2).getImm(); in isCrossCopy() local
430 unsigned SubReg = MO.getSubReg(); in determineInitialUsedLanes() local
463 unsigned SubReg = MO.getSubReg(); in isUndefRegAtInput() local
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| D | LiveRangeCalc.cpp | 65 unsigned SubReg = MO.getSubReg(); in calculate() local
175 unsigned SubReg = MO.getSubReg(); in extendToUses() local
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| D | LiveIntervalAnalysis.cpp | 522 unsigned SubReg = MO.getSubReg(); in shrinkToUses() local
956 unsigned SubReg = MO.getSubReg(); in updateAllRanges() local
1319 unsigned SubReg = MO.getSubReg(); in findLastUseBefore() local
1421 unsigned SubReg = MO.getSubReg(); in repairOldRegInRange() local
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| D | MachineInstrBundle.cpp | 188 unsigned SubReg = *SubRegs; in finalizeBundle() local
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| D | PeepholeOptimizer.cpp | 225 ValueTrackerResult(unsigned Reg, unsigned SubReg) : Inst(nullptr) { in ValueTrackerResult()
616 bool PeepholeOptimizer::findNextSource(unsigned Reg, unsigned SubReg, in findNextSource()
1261 unsigned Reg, SubReg, CopyDefReg, CopyDefSubReg; in optimizeUncoalescableCopy() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | LiveVariables.cpp | 198 unsigned SubReg = *SubRegs; in FindLastPartialDef() local
252 unsigned SubReg = *SubRegs; in HandlePhysRegUse() local
291 unsigned SubReg = *SubRegs; in FindLastRefOrPartRef() local
340 unsigned SubReg = *SubRegs; in HandlePhysRegKill() local
371 unsigned SubReg = *SubRegs; in HandlePhysRegKill() local
453 unsigned SubReg = *SubRegs; in HandlePhysRegDef() local
475 unsigned SubReg = *SubRegs; in HandlePhysRegDef() local
493 unsigned SubReg = *SubRegs; in UpdatePhysRegDefs() local
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| D | DetectDeadLanes.cpp | 177 unsigned SubReg = MI.getOperand(2).getImm(); in isCrossCopy() local
427 unsigned SubReg = MO.getSubReg(); in determineInitialUsedLanes() local
460 unsigned SubReg = MO.getSubReg(); in isUndefRegAtInput() local
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| D | LiveRangeCalc.cpp | 86 unsigned SubReg = MO.getSubReg(); in calculate() local
177 unsigned SubReg = MO.getSubReg(); in extendToUses() local
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| D | LiveIntervals.cpp | 567 unsigned SubReg = MO.getSubReg(); in shrinkToUses() local
1006 unsigned SubReg = MO.getSubReg(); in updateAllRanges() local
1418 unsigned SubReg = MO.getSubReg(); in findLastUseBefore() local
1528 unsigned SubReg = MO.getSubReg(); in repairOldRegInRange() local
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| D | MachineVerifier.cpp | 127 for (const MCPhysReg &SubReg : TRI->subregs(Reg)) in addRegWithSubRegs() local
805 for (const MCPhysReg &SubReg : TRI->subregs_inclusive(LI.PhysReg)) in visitMachineBasicBlockBefore() local
813 for (const MCPhysReg &SubReg : TRI->subregs_inclusive(I)) in visitMachineBasicBlockBefore() local
2005 for (const MCPhysReg &SubReg : TRI->subregs(Reg)) { in checkLiveness() local
2024 for (const MCPhysReg &SubReg : TRI->subregs(MOP.getReg())) { in checkLiveness() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.cpp | 533 for (const MCPhysReg &SubReg : subregs_inclusive(X86::RSP)) in getReservedRegs() local
540 for (const MCPhysReg &SubReg : subregs_inclusive(X86::RIP)) in getReservedRegs() local
545 for (const MCPhysReg &SubReg : subregs_inclusive(X86::RBP)) in getReservedRegs() local
559 for (const MCPhysReg &SubReg : subregs_inclusive(BasePtr)) in getReservedRegs() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsOptionRecord.cpp | 77 for (const MCPhysReg &SubReg : MCRegInfo->subregs_inclusive(Reg)) { in SetPhysRegUsed() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | GCNRegBankReassign.cpp | 80 unsigned SubReg; member in __anon8de1ca2a0111::GCNRegBankReassign::OperandMask
232 Printable printReg(unsigned Reg, unsigned SubReg = 0) const { in printReg()
295 unsigned GCNRegBankReassign::getRegBankMask(unsigned Reg, unsigned SubReg, in getRegBankMask()
491 unsigned SubReg, in getFreeBanks()
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| D | SIShrinkInstructions.cpp | 390 unsigned Reg, unsigned SubReg, in instAccessReg()
411 unsigned Reg, unsigned SubReg, in instReadsReg()
417 unsigned Reg, unsigned SubReg, in instModifiesReg()
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| D | SIFormMemoryClauses.cpp | 376 forAllLanes(R.first, R.second.second, [&R, &B](unsigned SubReg) { in runOnMachineFunction()
385 forAllLanes(R.first, R.second.second, [&R, &B](unsigned SubReg) { in runOnMachineFunction()
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| D | SIPreAllocateWWMRegs.cpp | 136 const unsigned SubReg = MO.getSubReg(); in rewriteRegs() local
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| D | SIAddIMGInit.cpp | 153 Register SubReg = in runOnMachineFunction() local
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| D | SIRegisterInfo.cpp | 687 Register SubReg = NumSubRegs == 1 in buildSpillLoadStore() local
787 Register SubReg = in spillSGPR() local
888 Register SubReg = in restoreSGPR() local
1703 unsigned SubReg, in shouldCoalesce()
1845 MachineInstr *SIRegisterInfo::findReachingDef(unsigned Reg, unsigned SubReg, in findReachingDef()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.cpp | 464 unsigned SubReg = NumSubRegs > 1 ? in buildScratchLoadStore() local
525 unsigned SubReg = getPhysRegSubReg(SuperReg, in eliminateFrameIndex() local
590 unsigned SubReg = getPhysRegSubReg(MI->getOperand(0).getReg(), in eliminateFrameIndex() local
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| D | SIFixSGPRCopies.cpp | 200 unsigned SubReg = CopyUse.getOperand(1).getSubReg(); in foldVGPRCopyIntoRegSequence() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRRegisterInfo.cpp | 278 unsigned SubReg, in shouldCoalesce()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonRegisterInfo.cpp | 241 const TargetRegisterClass *SrcRC, unsigned SubReg, in shouldCoalesce()
|