| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | RenameIndependentSubregs.cpp | 182 unsigned SubRegIdx = MO.getSubReg(); in findComponents() local
226 unsigned SubRegIdx = MO.getSubReg(); in rewriteOperands() local
348 unsigned SubRegIdx = MO.getSubReg(); in computeMainRangesFixFlags() local
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| D | RegisterPressure.cpp | 534 unsigned SubRegIdx = MO.getSubReg(); in collectOperandLanes() local
552 void pushRegLanes(unsigned Reg, unsigned SubRegIdx, in pushRegLanes()
1233 unsigned SubRegIdx = MO.getSubReg(); in findUseBetween() local
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| D | StackMaps.cpp | 159 unsigned SubRegIdx = TRI->getSubRegIndex(LLVMRegNum, MOI->getReg()); in parseOperand() local
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| D | VirtRegMap.cpp | 363 unsigned SubRegIdx = MO.getSubReg(); in readsUndefSubreg() local
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| D | MachineVerifier.cpp | 1971 unsigned SubRegIdx = MO->getSubReg(); in checkLiveness() local
2073 unsigned SubRegIdx = MO->getSubReg(); in checkLiveness() local
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| D | RegAllocFast.cpp | 768 unsigned SubRegIdx = MO.getSubReg(); in allocVirtRegUndef() local
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| D | RegisterCoalescer.cpp | 1655 MachineOperand &MO, unsigned SubRegIdx) { in addUndefFlag()
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| /external/llvm/lib/CodeGen/ |
| D | RenameIndependentSubregs.cpp | 182 unsigned SubRegIdx = MO.getSubReg(); in findComponents() local
225 unsigned SubRegIdx = MO.getSubReg(); in rewriteOperands() local
336 unsigned SubRegIdx = MO.getSubReg(); in computeMainRangesFixFlags() local
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| D | VirtRegMap.cpp | 340 unsigned SubRegIdx = MO.getSubReg(); in readsUndefSubreg() local
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| D | StackMaps.cpp | 145 unsigned SubRegIdx = TRI->getSubRegIndex(LLVMRegNum, MOI->getReg()); in parseOperand() local
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| D | RegisterPressure.cpp | 492 unsigned SubRegIdx = MO.getSubReg(); in collectOperandLanes() local
510 void pushRegLanes(unsigned Reg, unsigned SubRegIdx, in pushRegLanes()
1192 unsigned SubRegIdx = MO.getSubReg(); in findUseBetween() local
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| D | MachineVerifier.cpp | 1224 unsigned SubRegIdx = MO->getSubReg(); in checkLiveness() local
1325 unsigned SubRegIdx = MO->getSubReg(); in checkLiveness() local
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| D | RegisterCoalescer.cpp | 1217 MachineOperand &MO, unsigned SubRegIdx) { in addUndefFlag()
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| /external/llvm/lib/Target/X86/ |
| D | X86FixupBWInsts.cpp | 190 const auto SubRegIdx = TRI->getSubRegIndex(SuperDestReg, OrigDestReg); in getSuperRegDestIfDead() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SILoadStoreOptimizer.cpp | 1198 std::pair<unsigned, unsigned> SubRegIdx = getSubRegIdxs(CI, Paired); in mergeSBufferLoadImmPair() local
1260 std::pair<unsigned, unsigned> SubRegIdx = getSubRegIdxs(CI, Paired); in mergeBufferLoadPair() local
1327 std::pair<unsigned, unsigned> SubRegIdx = getSubRegIdxs(CI, Paired); in mergeTBufferLoadPair() local
1357 std::pair<unsigned, unsigned> SubRegIdx = getSubRegIdxs(CI, Paired); in mergeTBufferStorePair() local
1519 std::pair<unsigned, unsigned> SubRegIdx = getSubRegIdxs(CI, Paired); in mergeBufferStorePair() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86FixupBWInsts.cpp | 195 const auto SubRegIdx = TRI->getSubRegIndex(SuperDestReg, OrigDestReg); in getSuperRegDestIfDead() local
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| D | X86FlagsCopyLowering.cpp | 1002 int SubRegIdx[] = {X86::NoSubRegister, X86::sub_8bit, X86::sub_16bit, in rewriteSetCarryExtended() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | InstructionSelectorImpl.h | 816 int64_t SubRegIdx = MatchTable[CurrentIdx++]; in executeMatchTable() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 1730 SDValue SubRegIdx = CurDAG->getTargetConstant(PPC::sub_32, dl, MVT::i32); in ExtendToInt64() local
1744 SDValue SubRegIdx = CurDAG->getTargetConstant(PPC::sub_32, dl, MVT::i32); in TruncateToInt32() local
2813 SDValue SubRegIdx = in addExtOrTrunc() local
2823 SDValue SubRegIdx = in addExtOrTrunc() local
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 1135 unsigned SubRegIdx) { in SelectLoad()
1156 unsigned Opc, unsigned SubRegIdx) { in SelectPostLoad()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 1280 unsigned SubRegIdx) { in SelectLoad()
1306 unsigned Opc, unsigned SubRegIdx) { in SelectPostLoad()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelDAGToDAG.cpp | 212 unsigned SubRegIdx = cast<ConstantSDNode>(SubRegOp)->getZExtValue(); in getOperandRegClass() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelDAGToDAG.cpp | 1167 unsigned SubRegIdx = in loadVectorConstant() local
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 3440 SDValue SubRegIdx = in Select() local
3453 SDValue SubRegIdx = in Select() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 4061 SDValue SubRegIdx = in Select() local
4074 SDValue SubRegIdx = in Select() local
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