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1 /*
2  * Copyright (C) 2023 The Android Open Source Project
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *      http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #ifndef ART_RUNTIME_ARCH_RISCV64_REGISTERS_RISCV64_H_
18 #define ART_RUNTIME_ARCH_RISCV64_REGISTERS_RISCV64_H_
19 
20 #include <iosfwd>
21 
22 #include "base/macros.h"
23 
24 namespace art {
25 namespace riscv64 {
26 
27 enum XRegister {
28   Zero = 0,  // X0, hard-wired zero
29   RA = 1,    // X1, return address
30   SP = 2,    // X2, stack pointer
31   GP = 3,    // X3, global pointer (unavailable, used for shadow stack by the compiler / libc)
32   TP = 4,    // X4, thread pointer (points to TLS area, not ART-internal thread)
33 
34   T0 = 5,  // X5, temporary 0
35   T1 = 6,  // X6, temporary 1
36   T2 = 7,  // X7, temporary 2
37 
38   S0 = 8,  // X8/FP, callee-saved 0 / frame pointer
39   S1 = 9,  // X9, callee-saved 1 / ART thread register
40 
41   A0 = 10,  // X10, argument 0 / return value 0
42   A1 = 11,  // X11, argument 1 / return value 1
43   A2 = 12,  // X12, argument 2
44   A3 = 13,  // X13, argument 3
45   A4 = 14,  // X14, argument 4
46   A5 = 15,  // X15, argument 5
47   A6 = 16,  // X16, argument 6
48   A7 = 17,  // X17, argument 7
49 
50   S2 = 18,   // X18, callee-saved 2
51   S3 = 19,   // X19, callee-saved 3
52   S4 = 20,   // X20, callee-saved 4
53   S5 = 21,   // X21, callee-saved 5
54   S6 = 22,   // X22, callee-saved 6
55   S7 = 23,   // X23, callee-saved 7
56   S8 = 24,   // X24, callee-saved 8
57   S9 = 25,   // X25, callee-saved 9
58   S10 = 26,  // X26, callee-saved 10
59   S11 = 27,  // X27, callee-saved 11
60 
61   T3 = 28,  // X28, temporary 3
62   T4 = 29,  // X29, temporary 4
63   T5 = 30,  // X30, temporary 5
64   T6 = 31,  // X31, temporary 6
65 
66   kNumberOfXRegisters = 32,
67   kNoXRegister = -1,  // Signals an illegal X register.
68 
69   // Aliases.
70   TR = S1,  // ART Thread Register - managed runtime
71 };
72 
73 std::ostream& operator<<(std::ostream& os, const XRegister& rhs);
74 
75 enum FRegister {
76   FT0 = 0,  // F0, temporary 0
77   FT1 = 1,  // F1, temporary 1
78   FT2 = 2,  // F2, temporary 2
79   FT3 = 3,  // F3, temporary 3
80   FT4 = 4,  // F4, temporary 4
81   FT5 = 5,  // F5, temporary 5
82   FT6 = 6,  // F6, temporary 6
83   FT7 = 7,  // F7, temporary 7
84 
85   FS0 = 8,  // F8, callee-saved 0
86   FS1 = 9,  // F9, callee-saved 1
87 
88   FA0 = 10,  // F10, argument 0 / return value 0
89   FA1 = 11,  // F11, argument 1 / return value 1
90   FA2 = 12,  // F12, argument 2
91   FA3 = 13,  // F13, argument 3
92   FA4 = 14,  // F14, argument 4
93   FA5 = 15,  // F15, argument 5
94   FA6 = 16,  // F16, argument 6
95   FA7 = 17,  // F17, argument 7
96 
97   FS2 = 18,   // F18, callee-saved 2
98   FS3 = 19,   // F19, callee-saved 3
99   FS4 = 20,   // F20, callee-saved 4
100   FS5 = 21,   // F21, callee-saved 5
101   FS6 = 22,   // F22, callee-saved 6
102   FS7 = 23,   // F23, callee-saved 7
103   FS8 = 24,   // F24, callee-saved 8
104   FS9 = 25,   // F25, callee-saved 9
105   FS10 = 26,  // F26, callee-saved 10
106   FS11 = 27,  // F27, callee-saved 11
107 
108   FT8 = 28,   // F28, temporary 8
109   FT9 = 29,   // F29, temporary 9
110   FT10 = 30,  // F30, temporary 10
111   FT11 = 31,  // F31, temporary 11
112 
113   kNumberOfFRegisters = 32,
114   kNoFRegister = -1,  // Signals an illegal F register.
115 };
116 
117 std::ostream& operator<<(std::ostream& os, const FRegister& rhs);
118 
119 }  // namespace riscv64
120 }  // namespace art
121 
122 #endif  // ART_RUNTIME_ARCH_RISCV64_REGISTERS_RISCV64_H_
123