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Searched defs:TRI (Results 1 – 25 of 551) sorted by relevance

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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIMachineFunctionInfo.cpp188 const SIRegisterInfo &TRI) { in addPrivateSegmentBuffer()
196 unsigned SIMachineFunctionInfo::addDispatchPtr(const SIRegisterInfo &TRI) { in addDispatchPtr()
203 unsigned SIMachineFunctionInfo::addQueuePtr(const SIRegisterInfo &TRI) { in addQueuePtr()
210 unsigned SIMachineFunctionInfo::addKernargSegmentPtr(const SIRegisterInfo &TRI) { in addKernargSegmentPtr()
218 unsigned SIMachineFunctionInfo::addDispatchID(const SIRegisterInfo &TRI) { in addDispatchID()
225 unsigned SIMachineFunctionInfo::addFlatScratchInit(const SIRegisterInfo &TRI) { in addFlatScratchInit()
232 unsigned SIMachineFunctionInfo::addImplicitBufferPtr(const SIRegisterInfo &TRI) { in addImplicitBufferPtr()
269 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in allocateSGPRSpillToVGPR() local
347 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in allocateVGPRSpillToAGPR() local
418 const TargetRegisterInfo &TRI) { in regToString()
[all …]
DSIFrameLowering.cpp191 const SIRegisterInfo* TRI = &TII->getRegisterInfo(); in emitFlatScratchInit() local
272 const SIRegisterInfo *TRI, in getReservedPrivateSegmentBufferReg()
320 const GCNSubtarget &ST, const SIInstrInfo *TII, const SIRegisterInfo *TRI, in getReservedPrivateSegmentWaveByteOffsetReg()
406 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in emitEntryFunctionPrologue() local
539 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in emitEntryFunctionScratchSetup() local
688 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in emitPrologue() local
875 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in emitEpilogue() local
951 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in processFunctionBeforeFrameFinalized() local
989 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in determineCalleeSaves() local
1063 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in determineCalleeSavesSGPR() local
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DSIFixSGPRCopies.cpp118 const SIRegisterInfo *TRI; member in __anonde97b43e0111::SIFixSGPRCopies
154 const SIRegisterInfo *TRI) { in hasVectorOperands()
169 const SIRegisterInfo &TRI, in getCopyRegClasses()
190 const SIRegisterInfo &TRI) { in isVGPRToSGPRCopy()
197 const SIRegisterInfo &TRI) { in isSGPRToVGPRCopy()
203 const SIRegisterInfo *TRI, in tryChangeVGPRtoSGPRinCopy()
241 const SIRegisterInfo *TRI, in foldVGPRCopyIntoRegSequence()
424 const TargetRegisterInfo *TRI, in hoistAndMergeSGPRInits()
DSIFixupVectorISel.cpp89 const SIRegisterInfo *TRI) { in findSRegBaseAndIndex()
160 const SIRegisterInfo *TRI) { in fixupGlobalSaddr()
226 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in runOnMachineFunction() local
/external/llvm/lib/Target/AMDGPU/
DSIMachineFunctionInfo.cpp149 const SIRegisterInfo &TRI) { in addPrivateSegmentBuffer()
156 unsigned SIMachineFunctionInfo::addDispatchPtr(const SIRegisterInfo &TRI) { in addDispatchPtr()
163 unsigned SIMachineFunctionInfo::addQueuePtr(const SIRegisterInfo &TRI) { in addQueuePtr()
170 unsigned SIMachineFunctionInfo::addKernargSegmentPtr(const SIRegisterInfo &TRI) { in addKernargSegmentPtr()
177 unsigned SIMachineFunctionInfo::addFlatScratchInit(const SIRegisterInfo &TRI) { in addFlatScratchInit()
192 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in getSpilledReg() local
DSIFixSGPRCopies.cpp115 static bool hasVGPROperands(const MachineInstr &MI, const SIRegisterInfo *TRI) { in hasVGPROperands()
130 const SIRegisterInfo &TRI, in getCopyRegClasses()
153 const SIRegisterInfo &TRI) { in isVGPRToSGPRCopy()
159 const SIRegisterInfo &TRI) { in isSGPRToVGPRCopy()
177 const SIRegisterInfo *TRI, in foldVGPRCopyIntoRegSequence()
242 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in runOnMachineFunction() local
DSIShrinkInstructions.cpp69 static bool isVGPR(const MachineOperand *MO, const SIRegisterInfo &TRI, in isVGPR()
81 const SIRegisterInfo &TRI, in canShrink()
137 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in foldImmediates() local
204 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in runOnMachineFunction() local
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DLiveRegUnits.h31 const TargetRegisterInfo *TRI = nullptr; variable
39 LiveRegUnits(const TargetRegisterInfo &TRI) { in LiveRegUnits()
50 const TargetRegisterInfo *TRI) { in accumulateUsedDefed()
74 void init(const TargetRegisterInfo &TRI) { in init()
DLivePhysRegs.h49 const TargetRegisterInfo *TRI = nullptr; variable
58 LivePhysRegs(const TargetRegisterInfo &TRI) : TRI(&TRI) { in LivePhysRegs()
66 void init(const TargetRegisterInfo &TRI) { in init()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/
DXCoreMachineFunctionInfo.cpp39 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createLRSpillSlot() local
57 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createFPSpillSlot() local
70 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createEHSpillSlot() local
/external/llvm/include/llvm/CodeGen/
DLivePhysRegs.h44 const TargetRegisterInfo *TRI; variable
54 LivePhysRegs(const TargetRegisterInfo *TRI) : TRI(TRI) { in LivePhysRegs()
60 void init(const TargetRegisterInfo *TRI) { in init()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsFrameLowering.cpp95 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasFP() local
104 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasBP() local
116 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); in estimateStackSize() local
DMipsMachineFunction.cpp151 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createEhDataRegsFI() local
169 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createISRRegFI() local
193 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in getMoveF64ViaSpillFI() local
/external/llvm/lib/Target/Mips/
DMipsFrameLowering.cpp96 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasFP() local
105 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasBP() local
112 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); in estimateStackSize() local
DMipsInstrInfo.h101 const TargetRegisterInfo *TRI) const override { in storeRegToStackSlot()
109 const TargetRegisterInfo *TRI) const override { in loadRegFromStackSlot()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DMachineCopyPropagation.cpp100 const TargetRegisterInfo &TRI) { in markRegsUnavailable()
112 void invalidateRegister(unsigned Reg, const TargetRegisterInfo &TRI) { in invalidateRegister()
134 void clobberRegister(unsigned Reg, const TargetRegisterInfo &TRI) { in clobberRegister()
152 void trackCopy(MachineInstr *MI, const TargetRegisterInfo &TRI) { in trackCopy()
176 MachineInstr *findCopyForUnit(unsigned RegUnit, const TargetRegisterInfo &TRI, in findCopyForUnit()
187 const TargetRegisterInfo &TRI) { in findCopyDefViaUnit()
198 const TargetRegisterInfo &TRI) { in findAvailBackwardCopy()
219 const TargetRegisterInfo &TRI) { in findAvailCopy()
249 const TargetRegisterInfo *TRI; member in __anon974ddb510111::MachineCopyPropagation
334 unsigned Def, const TargetRegisterInfo *TRI) { in isNopCopy()
DTargetRegisterInfo.cpp89 Printable printReg(Register Reg, const TargetRegisterInfo *TRI, in printReg()
120 Printable printRegUnit(unsigned Unit, const TargetRegisterInfo *TRI) { in printRegUnit()
143 Printable printVRegOrUnit(unsigned Unit, const TargetRegisterInfo *TRI) { in printVRegOrUnit()
154 const TargetRegisterInfo *TRI) { in printRegClassOrBank()
241 const TargetRegisterInfo *TRI) { in firstCommonClass()
342 static bool shareSameRegisterFile(const TargetRegisterInfo &TRI, in shareSameRegisterFile()
520 const TargetRegisterInfo *TRI) { in dumpReg()
DMachineRegisterInfo.cpp383 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in replaceRegWith() local
471 const TargetRegisterInfo &TRI, in EmitLiveInCopies()
522 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in isConstantPhysReg() local
537 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in isCallerPreservedOrConstPhysReg() local
590 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in isPhysRegModified() local
604 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in isPhysRegUsed() local
615 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in disableCalleeSavedRegister() local
658 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in isReservedRegUnit() local
DMIRPrinter.cpp190 const TargetRegisterInfo *TRI) { in printRegMIR()
245 const TargetRegisterInfo *TRI) { in printCustomRegMask()
265 const TargetRegisterInfo *TRI) { in printRegClassOrBank()
288 const TargetRegisterInfo *TRI) { in convert()
361 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); in convertStackObjects() local
470 const auto *TRI = MF.getSubtarget().getRegisterInfo(); in convertCallSiteObjects() local
543 const auto *TRI = MF.getSubtarget().getRegisterInfo(); in initRegisterMaskIds() local
669 const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo(); in print() local
709 const auto *TRI = SubTarget.getRegisterInfo(); in print() local
826 const TargetRegisterInfo *TRI, in print()
DMachineOperand.cpp76 const TargetRegisterInfo &TRI) { in substVirtReg()
85 void MachineOperand::substPhysReg(MCRegister Reg, const TargetRegisterInfo &TRI) { in substPhysReg()
317 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo(); in isIdenticalTo() local
396 const TargetRegisterInfo *&TRI, in tryToGetTargetInfo()
427 const TargetRegisterInfo *TRI) { in printCFIRegister()
505 const TargetRegisterInfo *TRI) { in printSubRegIdx()
600 const TargetRegisterInfo *TRI) { in printCFI()
706 void MachineOperand::print(raw_ostream &OS, const TargetRegisterInfo *TRI, in print()
712 const TargetRegisterInfo *TRI, in print()
726 const TargetRegisterInfo *TRI, in print()
/external/llvm/lib/CodeGen/
DMIRPrinter.cpp150 const TargetRegisterInfo *TRI) { in printReg()
163 const TargetRegisterInfo *TRI) { in printReg()
205 const TargetRegisterInfo *TRI) { in convert()
286 const TargetRegisterInfo *TRI) { in convertStackObjects()
427 const auto *TRI = MF.getSubtarget().getRegisterInfo(); in initRegisterMaskIds() local
485 const auto *TRI = MBB.getParent()->getSubtarget().getRegisterInfo(); in print() local
544 const auto *TRI = SubTarget.getRegisterInfo(); in print() local
750 void MIPrinter::print(const MachineOperand &Op, const TargetRegisterInfo *TRI, in print()
946 const TargetRegisterInfo *TRI) { in printCFIRegister()
956 const TargetRegisterInfo *TRI) { in print()
DTargetRegisterInfo.cpp45 Printable PrintReg(unsigned Reg, const TargetRegisterInfo *TRI, in PrintReg()
67 Printable PrintRegUnit(unsigned Unit, const TargetRegisterInfo *TRI) { in PrintRegUnit()
90 Printable PrintVRegOrUnit(unsigned Unit, const TargetRegisterInfo *TRI) { in PrintVRegOrUnit()
180 const TargetRegisterInfo *TRI, in firstCommonClass()
289 static bool shareSameRegisterFile(const TargetRegisterInfo &TRI, in shareSameRegisterFile()
396 const TargetRegisterInfo *TRI) { in dumpReg()
/external/llvm/lib/Target/Hexagon/
DHexagonFrameLowering.h36 const TargetRegisterInfo *TRI) const override { in spillCalleeSavedRegisters()
41 const TargetRegisterInfo *TRI) const override { in restoreCalleeSavedRegisters()
/external/llvm/lib/Target/AArch64/
DAArch64RegisterBankInfo.cpp28 AArch64RegisterBankInfo::AArch64RegisterBankInfo(const TargetRegisterInfo &TRI) in AArch64RegisterBankInfo()
125 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); in getInstrAlternativeMappings() local
/external/eigen/test/
Dproduct_trsolve.cpp12 #define VERIFY_TRSM(TRI,XB) { \ argument
21 #define VERIFY_TRSM_ONTHERIGHT(TRI,XB) { \ argument

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