| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 959 unsigned TmpReg = createResultReg(&PPC::G8RCRegClass); in PPCMoveToFPReg() local 1038 unsigned TmpReg = createResultReg(&PPC::G8RCRegClass); in SelectIToFP() local 1137 unsigned TmpReg = createResultReg(&PPC::F8RCRegClass); in SelectFPToI() local 1348 unsigned TmpReg = createResultReg(RC); in processCallArgs() local 1360 unsigned TmpReg = createResultReg(RC); in processCallArgs() local 1677 unsigned TmpReg = createResultReg(RC); in SelectRet() local 1686 unsigned TmpReg = createResultReg(RC); in SelectRet() local 1918 unsigned TmpReg = createResultReg(&PPC::G8RC_and_G8RC_NOX0RegClass); in PPCMaterializeFP() local 2020 unsigned TmpReg = createResultReg(RC); in PPCMaterialize32BitInt() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 157 unsigned TmpReg = createResultReg(ToRC); in copyRegToRegClass() local 1024 unsigned TmpReg = createResultReg(&PPC::G8RCRegClass); in PPCMoveToFPReg() local 1119 unsigned TmpReg = createResultReg(&PPC::G8RCRegClass); in SelectIToFP() local 1445 unsigned TmpReg = createResultReg(RC); in processCallArgs() local 1457 unsigned TmpReg = createResultReg(RC); in processCallArgs() local 1767 unsigned TmpReg = createResultReg(RC); in SelectRet() local 1776 unsigned TmpReg = createResultReg(RC); in SelectRet() local 2023 unsigned TmpReg = createResultReg(&PPC::G8RC_and_G8RC_NOX0RegClass); in PPCMaterializeFP() local 2125 unsigned TmpReg = createResultReg(RC); in PPCMaterialize32BitInt() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 2700 unsigned TmpReg = DstReg; in loadImmediate() local 2728 unsigned TmpReg = DstReg; in loadImmediate() local 2935 unsigned TmpReg = DstReg; in loadAndAddSymbolAddress() local 3167 unsigned TmpReg = DstReg; in loadAndAddSymbolAddress() local 3361 unsigned TmpReg = Mips::ZERO; in expandLoadSingleImmToFPR() local 3446 unsigned TmpReg = getATReg(IDLoc); in expandLoadDoubleImmToGPR() local 3478 unsigned TmpReg = Mips::ZERO; in expandLoadDoubleImmToFPR() local 3665 unsigned TmpReg = DstReg; in expandMem16Inst() local 3792 unsigned TmpReg = DstReg; in expandMem9Inst() local 4474 unsigned TmpReg = SrcReg; in expandUxw() local [all …]
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.cpp | 518 unsigned TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in eliminateFrameIndex() local 587 unsigned TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in eliminateFrameIndex() local 668 unsigned TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in eliminateFrameIndex() local
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| D | SIFixSGPRCopies.cpp | 227 unsigned TmpReg = MRI.createVirtualRegister(NewSrcRC); in foldVGPRCopyIntoRegSequence() local
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| D | SIInstrInfo.cpp | 727 MachineBasicBlock &MBB, MachineInstr &MI, RegScavenger *RS, unsigned TmpReg, in calculateLDSSpillAddress() 2681 unsigned TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in lowerScalarAbs() local 2901 unsigned TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in splitScalar64BitBFE() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIFixSGPRCopies.cpp | 299 Register TmpReg = MRI.createVirtualRegister(NewSrcRC); in foldVGPRCopyIntoRegSequence() local 623 Register TmpReg in runOnMachineFunction() local
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| D | SILowerI1Copies.cpp | 704 unsigned TmpReg = createLaneMaskReg(*MF); in lowerCopiesToI1() local
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| D | SIRegisterInfo.cpp | 646 Register TmpReg = in buildSpillLoadStore() local 1218 Register TmpReg = RS->scavengeRegister(&AMDGPU::VGPR_32RegClass, MI, 0); in eliminateFrameIndex() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFMISimplifyPatchable.cpp | 164 Register TmpReg = I->getParent()->getOperand(0).getReg(); in processCandidate() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86SpeculativeLoadHardening.cpp | 1908 Register TmpReg = MRI->createVirtualRegister(PS->RC); in mergePredStateIntoSP() local 1929 Register TmpReg = MRI->createVirtualRegister(PS->RC); in extractPredStateFromSP() local 2036 Register TmpReg = MRI->createVirtualRegister(OpRC); in hardenLoadAddr() local
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| D | X86CmovConversion.cpp | 758 Register TmpReg = MRI->createVirtualRegister(RC); in convertCmovInstsToBranches() local
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| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 2176 unsigned TmpReg = DstReg; in loadImmediate() local 2204 unsigned TmpReg = DstReg; in loadImmediate() local 2415 unsigned TmpReg = DstReg; in loadAndAddSymbolAddress() local 2516 unsigned TmpReg = DstReg; in loadAndAddSymbolAddress() local 3389 unsigned TmpReg = DReg; in expandRotation() local 3518 unsigned TmpReg = DReg; in expandDRotation() local 4666 unsigned TmpReg = PrevReg + 1; in parseRegisterList() local 5500 SmallVector<std::unique_ptr<MCParsedAsmOperand>, 1> TmpReg; in parseDirectiveCPSetup() local 6152 SmallVector<std::unique_ptr<MCParsedAsmOperand>, 1> TmpReg; in ParseDirective() local
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| /external/llvm/lib/Target/ARM/ |
| D | MLxExpansionPass.cpp | 290 unsigned TmpReg = MRI->createVirtualRegister( in ExpandFPMLxInstruction() local
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| D | ThumbRegisterInfo.cpp | 570 unsigned TmpReg = MI.getOperand(0).getReg(); in eliminateFrameIndex() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | MLxExpansionPass.cpp | 287 Register TmpReg = in ExpandFPMLxInstruction() local
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| D | ThumbRegisterInfo.cpp | 513 Register TmpReg = MI.getOperand(0).getReg(); in eliminateFrameIndex() local
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| D | Thumb1FrameLowering.cpp | 583 unsigned &TmpReg) { in findTemporariesForLR()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64SpeculationHardening.cpp | 307 unsigned TmpReg = RS.FindUnusedReg(&AArch64::GPR64commonRegClass); in instrumentControlFlow() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | LegalizationArtifactCombiner.h | 649 Register TmpReg; in lookThroughCopyInstrs() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 749 unsigned DstReg = Dst.getReg(), SrcReg = Src.getReg(), TmpReg = DstReg; in expandCvtFPInt() local
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 590 unsigned DstReg = Dst.getReg(), SrcReg = Src.getReg(), TmpReg = DstReg; in expandCvtFPInt() local
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsTargetStreamer.cpp | 286 unsigned TmpReg, SMLoc IDLoc, in emitLoadWithImmOffset() 325 unsigned TmpReg, SMLoc IDLoc, in emitLoadWithSymOffset()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRExpandPseudoInsts.cpp | 584 unsigned TmpReg = 0; // 0 for no temporary register in expand() local 695 unsigned TmpReg = 0; // 0 for no temporary register in expand() local 750 unsigned TmpReg = 0; // 0 for no temporary register in expand() local
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| /external/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 1675 unsigned TmpReg = getRegForValue(BI->getCondition()); in X86SelectBranch() local 1998 unsigned TmpReg = createResultReg(&X86::GR8RegClass); in X86FastEmitCMoveSelect() local 2010 unsigned TmpReg = getRegForValue(Cond); in X86FastEmitCMoveSelect() local
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