Searched defs:addp (Results 1 – 6 of 6) sorted by relevance
| /external/llvm/test/MC/AArch64/ |
| D | neon-scalar-reduce-pairwise.s | 6 addp d0, v1.2d define
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| D | neon-diagnostics.s | 2852 addp d0, d1.2s define
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| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 638 __ addp(d14, v19.V2D()); in GenerateTestSequenceNEON() local
639 __ addp(v3.V16B(), v8.V16B(), v28.V16B()); in GenerateTestSequenceNEON() local
640 __ addp(v8.V2D(), v5.V2D(), v17.V2D()); in GenerateTestSequenceNEON() local
641 __ addp(v22.V2S(), v30.V2S(), v26.V2S()); in GenerateTestSequenceNEON() local
642 __ addp(v29.V4H(), v24.V4H(), v14.V4H()); in GenerateTestSequenceNEON() local
643 __ addp(v30.V4S(), v26.V4S(), v24.V4S()); in GenerateTestSequenceNEON() local
644 __ addp(v12.V8B(), v26.V8B(), v7.V8B()); in GenerateTestSequenceNEON() local
645 __ addp(v17.V8H(), v8.V8H(), v12.V8H()); in GenerateTestSequenceNEON() local
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| D | test-api-movprfx-aarch64.cc | 1971 __ addp(z3.VnB(), p1.Merging(), z3.VnB(), z0.VnB()); in TEST() local
3158 __ addp(z3.VnB(), p1.Merging(), z3.VnB(), z3.VnB()); in TEST() local
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| /external/vixl/src/aarch64/ |
| D | logic-aarch64.cc | 620 LogicVRegister Simulator::addp(VectorFormat vform, in addp() function in vixl::aarch64::Simulator
1222 LogicVRegister Simulator::addp(VectorFormat vform, in addp() function in vixl::aarch64::Simulator
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| D | assembler-sve-aarch64.cc | 6681 void Assembler::addp(const ZRegister& zd, in addp() function in vixl::aarch64::Assembler
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