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Searched defs:andl (Results 1 – 7 of 7) sorted by relevance

/art/compiler/optimizing/
Dcode_generator_x86.cc3966 __ andl(EAX, Immediate(kC2ConditionMask)); in GenerateRemFP() local
4030 __ andl(out, Immediate(abs_imm-1)); in RemByPowerOfTwo() local
8185 __ andl(first.AsRegister<Register>(), second.AsRegister<Register>()); in HandleBitwiseOperation() local
8194 __ andl(first.AsRegister<Register>(), in HandleBitwiseOperation() local
8206 __ andl(first.AsRegister<Register>(), Address(ESP, second.GetStackIndex())); in HandleBitwiseOperation() local
8218 __ andl(first.AsRegisterPairLow<Register>(), second.AsRegisterPairLow<Register>()); in HandleBitwiseOperation() local
8219 __ andl(first.AsRegisterPairHigh<Register>(), second.AsRegisterPairHigh<Register>()); in HandleBitwiseOperation() local
8230 __ andl(first.AsRegisterPairLow<Register>(), Address(ESP, second.GetStackIndex())); in HandleBitwiseOperation() local
8231 __ andl(first.AsRegisterPairHigh<Register>(), in HandleBitwiseOperation() local
8256 __ andl(first_low, low); in HandleBitwiseOperation() local
[all …]
Dintrinsics_x86.cc569 __ andl(out_lo, src_lo); in GenLowestOneBit() local
570 __ andl(out_hi, src_hi); in GenLowestOneBit() local
587 __ andl(out, src.AsRegister<Register>()); in GenLowestOneBit() local
589 __ andl(out, Address(ESP, src.GetStackIndex())); in GenLowestOneBit() local
2465 __ andl(temp, imm_mask); in SwapBits() local
2466 __ andl(reg, imm_mask); in SwapBits() local
4655 __ andl(left, right); in GenerateBitwiseOp() local
Dcode_generator_x86_64.cc4026 __ andl(CpuRegister(RAX), Immediate(kC2ConditionMask)); in GenerateRemFP() local
4106 __ andl(out, Immediate(abs_imm-1)); in RemByPowerOfTwo() local
6891 __ andl(out, Immediate(1)); in VisitInstanceOf() local
7078 __ andl(out, Immediate(1)); in VisitInstanceOf() local
7447 __ andl(first.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>()); in HandleBitwiseOperation() local
7457 __ andl(first.AsRegister<CpuRegister>(), imm); in HandleBitwiseOperation() local
7467 __ andl(first.AsRegister<CpuRegister>(), address); in HandleBitwiseOperation() local
Dintrinsics_x86_64.cc2646 __ andl(temp, imm_mask); in SwapBits() local
2647 __ andl(reg, imm_mask); in SwapBits() local
2877 __ andl(out, tmp); in GenOneBit() local
4416 __ andl(temp, Immediate(const_value)); in GenerateVarHandleGetAndOp() local
4418 __ andl(temp, value.AsRegister<CpuRegister>()); in GenerateVarHandleGetAndOp() local
/art/compiler/utils/x86/
Djni_macro_assembler_x86.cc404 __ andl(reg.AsX86().AsCpuRegister(), Immediate(~kIndirectRefKindMask)); in DecodeJNITransitionOrLocalJObject() local
Dassembler_x86.cc3121 void X86Assembler::andl(Register dst, Register src) { in andl() function in art::x86::X86Assembler
3128 void X86Assembler::andl(Register reg, const Address& address) { in andl() function in art::x86::X86Assembler
3135 void X86Assembler::andl(Register dst, const Immediate& imm) { in andl() function in art::x86::X86Assembler
/art/compiler/utils/x86_64/
Dassembler_x86_64.cc4212 void X86_64Assembler::andl(CpuRegister dst, CpuRegister src) { in andl() function in art::x86_64::X86_64Assembler
4220 void X86_64Assembler::andl(CpuRegister reg, const Address& address) { in andl() function in art::x86_64::X86_64Assembler
4228 void X86_64Assembler::andl(CpuRegister dst, const Immediate& imm) { in andl() function in art::x86_64::X86_64Assembler