Searched defs:andq (Results 1 – 4 of 4) sorted by relevance
/art/compiler/utils/x86_64/ |
D | jni_macro_assembler_x86_64.cc | 476 __ andq(reg.AsX86_64().AsCpuRegister(), Immediate(~kIndirectRefKindMask)); in DecodeJNITransitionOrLocalJObject() local
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D | assembler_x86_64.cc | 4235 void X86_64Assembler::andq(CpuRegister reg, const Immediate& imm) { in andq() function in art::x86_64::X86_64Assembler 4243 void X86_64Assembler::andq(CpuRegister dst, CpuRegister src) { in andq() function in art::x86_64::X86_64Assembler 4251 void X86_64Assembler::andq(CpuRegister dst, const Address& src) { in andq() function in art::x86_64::X86_64Assembler
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/art/compiler/optimizing/ |
D | code_generator_x86_64.cc | 4119 __ andq(out, tmp); in RemByPowerOfTwo() local 7489 __ andq(first_reg, Immediate(static_cast<int32_t>(value))); in HandleBitwiseOperation() local 7491 __ andq(first_reg, codegen_->LiteralInt64Address(value)); in HandleBitwiseOperation() local 7494 __ andq(first_reg, Address(CpuRegister(RSP), second.GetStackIndex())); in HandleBitwiseOperation() local 7496 __ andq(first_reg, second.AsRegister<CpuRegister>()); in HandleBitwiseOperation() local
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D | intrinsics_x86_64.cc | 2689 __ andq(temp, temp_mask); in SwapBits64() local 2690 __ andq(reg, temp_mask); in SwapBits64() local 2873 __ andq(out, tmp); in GenOneBit() local 4414 __ andq(temp, value.AsRegister<CpuRegister>()); in GenerateVarHandleGetAndOp() local
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