| /external/llvm/test/MC/AArch64/ |
| D | arm64-diags.s | 270 ands w0, w0, w0, lsl #32 label
|
| /external/vixl/test/aarch64/ |
| D | test-assembler-aarch64.cc | 683 TEST(ands) { in TEST() argument
7415 __ ands(xzr, x2, ~0xf); in TEST() local
7416 __ ands(xzr, xzr, ~0xf); in TEST() local
7417 __ ands(xzr, x0, x2); in TEST() local
7418 __ ands(xzr, x2, xzr); in TEST() local
7419 __ ands(xzr, xzr, x2); in TEST() local
|
| D | test-trace-aarch64.cc | 67 __ ands(w5, w6, w7); in GenerateTestSequenceBase() local
68 __ ands(x8, x9, x10); in GenerateTestSequenceBase() local
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 1997 void ands(Register rd, Register rn, const Operand& operand) { in ands() function
2000 void ands(Condition cond, Register rd, Register rn, const Operand& operand) { in ands() function
2003 void ands(EncodingSize size, in ands() function
|
| D | assembler-aarch32.cc | 2785 void Assembler::ands(Condition cond, in ands() function in vixl::aarch32::Assembler
|
| D | disasm-aarch32.cc | 1231 void Disassembler::ands(Condition cond, in ands() function in vixl::aarch32::Disassembler
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-aarch32.cc | 544 TEST(ands) { in TEST() argument
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.cc | 588 void Assembler::ands(const Register& rd, in ands() function in vixl::aarch64::Assembler
|
| D | assembler-sve-aarch64.cc | 6111 void Assembler::ands(const PRegisterWithLaneSize& pd, in ands() function in vixl::aarch64::Assembler
|
| /external/vixl/benchmarks/aarch32/ |
| D | asm-disasm-speed-test.cc | 4188 __ ands(Narrow, r3, r3, r0); in Generate_32() local
4305 __ ands(Narrow, r2, r2, r0); in Generate_32() local
8631 __ ands(r1, r1, 0x3); in Generate_66() local
|