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1 #ifndef CAPSTONE_ENGINE_H
2 #define CAPSTONE_ENGINE_H
3 
4 /* Capstone Disassembly Engine */
5 /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2016 */
6 
7 #ifdef __cplusplus
8 extern "C" {
9 #endif
10 
11 #include <stdarg.h>
12 
13 #if defined(CAPSTONE_HAS_OSXKERNEL)
14 #include <libkern/libkern.h>
15 #else
16 #include <stdlib.h>
17 #include <stdio.h>
18 #endif
19 
20 #include "platform.h"
21 
22 #ifdef _MSC_VER
23 #pragma warning(disable:4201)
24 #pragma warning(disable:4100)
25 #define CAPSTONE_API __cdecl
26 #ifdef CAPSTONE_SHARED
27 #define CAPSTONE_EXPORT __declspec(dllexport)
28 #else    // defined(CAPSTONE_STATIC)
29 #define CAPSTONE_EXPORT
30 #endif
31 #else
32 #define CAPSTONE_API
33 #if defined(__GNUC__) && !defined(CAPSTONE_STATIC)
34 #define CAPSTONE_EXPORT __attribute__((visibility("default")))
35 #else    // defined(CAPSTONE_STATIC)
36 #define CAPSTONE_EXPORT
37 #endif
38 #endif
39 
40 #ifdef __GNUC__
41 #define CAPSTONE_DEPRECATED __attribute__((deprecated))
42 #elif defined(_MSC_VER)
43 #define CAPSTONE_DEPRECATED __declspec(deprecated)
44 #else
45 #pragma message("WARNING: You need to implement CAPSTONE_DEPRECATED for this compiler")
46 #define CAPSTONE_DEPRECATED
47 #endif
48 
49 // Capstone API version
50 #define CS_API_MAJOR 5
51 #define CS_API_MINOR 0
52 
53 // Version for bleeding edge code of the Github's "next" branch.
54 // Use this if you want the absolutely latest development code.
55 // This version number will be bumped up whenever we have a new major change.
56 #define CS_NEXT_VERSION 5
57 
58 // Capstone package version
59 #define CS_VERSION_MAJOR CS_API_MAJOR
60 #define CS_VERSION_MINOR CS_API_MINOR
61 #define CS_VERSION_EXTRA 0
62 
63 /// Macro to create combined version which can be compared to
64 /// result of cs_version() API.
65 #define CS_MAKE_VERSION(major, minor) ((major << 8) + minor)
66 
67 /// Maximum size of an instruction mnemonic string.
68 #define CS_MNEMONIC_SIZE 32
69 
70 // Handle using with all API
71 typedef size_t csh;
72 
73 /// Architecture type
74 typedef enum cs_arch {
75 	CS_ARCH_ARM = 0,	///< ARM architecture (including Thumb, Thumb-2)
76 	CS_ARCH_ARM64,		///< ARM-64, also called AArch64
77 	CS_ARCH_MIPS,		///< Mips architecture
78 	CS_ARCH_X86,		///< X86 architecture (including x86 & x86-64)
79 	CS_ARCH_PPC,		///< PowerPC architecture
80 	CS_ARCH_SPARC,		///< Sparc architecture
81 	CS_ARCH_SYSZ,		///< SystemZ architecture
82 	CS_ARCH_XCORE,		///< XCore architecture
83 	CS_ARCH_M68K,		///< 68K architecture
84 	CS_ARCH_TMS320C64X,	///< TMS320C64x architecture
85 	CS_ARCH_M680X,		///< 680X architecture
86 	CS_ARCH_EVM,		///< Ethereum architecture
87 	CS_ARCH_MOS65XX,	///< MOS65XX architecture (including MOS6502)
88 	CS_ARCH_MAX,
89 	CS_ARCH_ALL = 0xFFFF, // All architectures - for cs_support()
90 } cs_arch;
91 
92 // Support value to verify diet mode of the engine.
93 // If cs_support(CS_SUPPORT_DIET) return True, the engine was compiled
94 // in diet mode.
95 #define CS_SUPPORT_DIET (CS_ARCH_ALL + 1)
96 
97 // Support value to verify X86 reduce mode of the engine.
98 // If cs_support(CS_SUPPORT_X86_REDUCE) return True, the engine was compiled
99 // in X86 reduce mode.
100 #define CS_SUPPORT_X86_REDUCE (CS_ARCH_ALL + 2)
101 
102 /// Mode type
103 typedef enum cs_mode {
104 	CS_MODE_LITTLE_ENDIAN = 0,	///< little-endian mode (default mode)
105 	CS_MODE_ARM = 0,	///< 32-bit ARM
106 	CS_MODE_16 = 1 << 1,	///< 16-bit mode (X86)
107 	CS_MODE_32 = 1 << 2,	///< 32-bit mode (X86)
108 	CS_MODE_64 = 1 << 3,	///< 64-bit mode (X86, PPC)
109 	CS_MODE_THUMB = 1 << 4,	///< ARM's Thumb mode, including Thumb-2
110 	CS_MODE_MCLASS = 1 << 5,	///< ARM's Cortex-M series
111 	CS_MODE_V8 = 1 << 6,	///< ARMv8 A32 encodings for ARM
112 	CS_MODE_MICRO = 1 << 4, ///< MicroMips mode (MIPS)
113 	CS_MODE_MIPS3 = 1 << 5, ///< Mips III ISA
114 	CS_MODE_MIPS32R6 = 1 << 6, ///< Mips32r6 ISA
115 	CS_MODE_MIPS2 = 1 << 7, ///< Mips II ISA
116 	CS_MODE_V9 = 1 << 4, ///< SparcV9 mode (Sparc)
117 	CS_MODE_QPX = 1 << 4, ///< Quad Processing eXtensions mode (PPC)
118 	CS_MODE_M68K_000 = 1 << 1, ///< M68K 68000 mode
119 	CS_MODE_M68K_010 = 1 << 2, ///< M68K 68010 mode
120 	CS_MODE_M68K_020 = 1 << 3, ///< M68K 68020 mode
121 	CS_MODE_M68K_030 = 1 << 4, ///< M68K 68030 mode
122 	CS_MODE_M68K_040 = 1 << 5, ///< M68K 68040 mode
123 	CS_MODE_M68K_060 = 1 << 6, ///< M68K 68060 mode
124 	CS_MODE_BIG_ENDIAN = 1U << 31,	///< big-endian mode
125 	CS_MODE_MIPS32 = CS_MODE_32,	///< Mips32 ISA (Mips)
126 	CS_MODE_MIPS64 = CS_MODE_64,	///< Mips64 ISA (Mips)
127 	CS_MODE_M680X_6301 = 1 << 1, ///< M680X Hitachi 6301,6303 mode
128 	CS_MODE_M680X_6309 = 1 << 2, ///< M680X Hitachi 6309 mode
129 	CS_MODE_M680X_6800 = 1 << 3, ///< M680X Motorola 6800,6802 mode
130 	CS_MODE_M680X_6801 = 1 << 4, ///< M680X Motorola 6801,6803 mode
131 	CS_MODE_M680X_6805 = 1 << 5, ///< M680X Motorola/Freescale 6805 mode
132 	CS_MODE_M680X_6808 = 1 << 6, ///< M680X Motorola/Freescale/NXP 68HC08 mode
133 	CS_MODE_M680X_6809 = 1 << 7, ///< M680X Motorola 6809 mode
134 	CS_MODE_M680X_6811 = 1 << 8, ///< M680X Motorola/Freescale/NXP 68HC11 mode
135 	CS_MODE_M680X_CPU12 = 1 << 9, ///< M680X Motorola/Freescale/NXP CPU12
136 					///< used on M68HC12/HCS12
137 	CS_MODE_M680X_HCS08 = 1 << 10, ///< M680X Freescale/NXP HCS08 mode
138 } cs_mode;
139 
140 typedef void* (CAPSTONE_API *cs_malloc_t)(size_t size);
141 typedef void* (CAPSTONE_API *cs_calloc_t)(size_t nmemb, size_t size);
142 typedef void* (CAPSTONE_API *cs_realloc_t)(void *ptr, size_t size);
143 typedef void (CAPSTONE_API *cs_free_t)(void *ptr);
144 typedef int (CAPSTONE_API *cs_vsnprintf_t)(char *str, size_t size, const char *format, va_list ap);
145 
146 
147 /// User-defined dynamic memory related functions: malloc/calloc/realloc/free/vsnprintf()
148 /// By default, Capstone uses system's malloc(), calloc(), realloc(), free() & vsnprintf().
149 typedef struct cs_opt_mem {
150 	cs_malloc_t malloc;
151 	cs_calloc_t calloc;
152 	cs_realloc_t realloc;
153 	cs_free_t free;
154 	cs_vsnprintf_t vsnprintf;
155 } cs_opt_mem;
156 
157 /// Customize mnemonic for instructions with alternative name.
158 /// To reset existing customized instruction to its default mnemonic,
159 /// call cs_option(CS_OPT_MNEMONIC) again with the same @id and NULL value
160 /// for @mnemonic.
161 typedef struct cs_opt_mnem {
162 	/// ID of instruction to be customized.
163 	unsigned int id;
164 	/// Customized instruction mnemonic.
165 	const char *mnemonic;
166 } cs_opt_mnem;
167 
168 /// Runtime option for the disassembled engine
169 typedef enum cs_opt_type {
170 	CS_OPT_INVALID = 0,	///< No option specified
171 	CS_OPT_SYNTAX,	///< Assembly output syntax
172 	CS_OPT_DETAIL,	///< Break down instruction structure into details
173 	CS_OPT_MODE,	///< Change engine's mode at run-time
174 	CS_OPT_MEM,	///< User-defined dynamic memory related functions
175 	CS_OPT_SKIPDATA, ///< Skip data when disassembling. Then engine is in SKIPDATA mode.
176 	CS_OPT_SKIPDATA_SETUP, ///< Setup user-defined function for SKIPDATA option
177 	CS_OPT_MNEMONIC, ///< Customize instruction mnemonic
178 	CS_OPT_UNSIGNED, ///< print immediate operands in unsigned form
179 } cs_opt_type;
180 
181 /// Runtime option value (associated with option type above)
182 typedef enum cs_opt_value {
183 	CS_OPT_OFF = 0,  ///< Turn OFF an option - default for CS_OPT_DETAIL, CS_OPT_SKIPDATA, CS_OPT_UNSIGNED.
184 	CS_OPT_ON = 3, ///< Turn ON an option (CS_OPT_DETAIL, CS_OPT_SKIPDATA).
185 	CS_OPT_SYNTAX_DEFAULT = 0, ///< Default asm syntax (CS_OPT_SYNTAX).
186 	CS_OPT_SYNTAX_INTEL, ///< X86 Intel asm syntax - default on X86 (CS_OPT_SYNTAX).
187 	CS_OPT_SYNTAX_ATT,   ///< X86 ATT asm syntax (CS_OPT_SYNTAX).
188 	CS_OPT_SYNTAX_NOREGNAME, ///< Prints register name with only number (CS_OPT_SYNTAX)
189 	CS_OPT_SYNTAX_MASM, ///< X86 Intel Masm syntax (CS_OPT_SYNTAX).
190 } cs_opt_value;
191 
192 /// Common instruction operand types - to be consistent across all architectures.
193 typedef enum cs_op_type {
194 	CS_OP_INVALID = 0,  ///< uninitialized/invalid operand.
195 	CS_OP_REG,          ///< Register operand.
196 	CS_OP_IMM,          ///< Immediate operand.
197 	CS_OP_MEM,          ///< Memory operand.
198 	CS_OP_FP,           ///< Floating-Point operand.
199 } cs_op_type;
200 
201 /// Common instruction operand access types - to be consistent across all architectures.
202 /// It is possible to combine access types, for example: CS_AC_READ | CS_AC_WRITE
203 typedef enum cs_ac_type {
204 	CS_AC_INVALID = 0,        ///< Uninitialized/invalid access type.
205 	CS_AC_READ    = 1 << 0,   ///< Operand read from memory or register.
206 	CS_AC_WRITE   = 1 << 1,   ///< Operand write to memory or register.
207 } cs_ac_type;
208 
209 /// Common instruction groups - to be consistent across all architectures.
210 typedef enum cs_group_type {
211 	CS_GRP_INVALID = 0,  ///< uninitialized/invalid group.
212 	CS_GRP_JUMP,    ///< all jump instructions (conditional+direct+indirect jumps)
213 	CS_GRP_CALL,    ///< all call instructions
214 	CS_GRP_RET,     ///< all return instructions
215 	CS_GRP_INT,     ///< all interrupt instructions (int+syscall)
216 	CS_GRP_IRET,    ///< all interrupt return instructions
217 	CS_GRP_PRIVILEGE,    ///< all privileged instructions
218 	CS_GRP_BRANCH_RELATIVE, ///< all relative branching instructions
219 } cs_group_type;
220 
221 /**
222  User-defined callback function for SKIPDATA option.
223  See tests/test_skipdata.c for sample code demonstrating this API.
224 
225  @code: the input buffer containing code to be disassembled.
226         This is the same buffer passed to cs_disasm().
227  @code_size: size (in bytes) of the above @code buffer.
228  @offset: the position of the currently-examining byte in the input
229       buffer @code mentioned above.
230  @user_data: user-data passed to cs_option() via @user_data field in
231       cs_opt_skipdata struct below.
232 
233  @return: return number of bytes to skip, or 0 to immediately stop disassembling.
234 */
235 typedef size_t (CAPSTONE_API *cs_skipdata_cb_t)(const uint8_t *code, size_t code_size, size_t offset, void *user_data);
236 
237 /// User-customized setup for SKIPDATA option
238 typedef struct cs_opt_skipdata {
239 	/// Capstone considers data to skip as special "instructions".
240 	/// User can specify the string for this instruction's "mnemonic" here.
241 	/// By default (if @mnemonic is NULL), Capstone use ".byte".
242 	const char *mnemonic;
243 
244 	/// User-defined callback function to be called when Capstone hits data.
245 	/// If the returned value from this callback is positive (>0), Capstone
246 	/// will skip exactly that number of bytes & continue. Otherwise, if
247 	/// the callback returns 0, Capstone stops disassembling and returns
248 	/// immediately from cs_disasm()
249 	/// NOTE: if this callback pointer is NULL, Capstone would skip a number
250 	/// of bytes depending on architectures, as following:
251 	/// Arm:     2 bytes (Thumb mode) or 4 bytes.
252 	/// Arm64:   4 bytes.
253 	/// Mips:    4 bytes.
254 	/// M680x:   1 byte.
255 	/// PowerPC: 4 bytes.
256 	/// Sparc:   4 bytes.
257 	/// SystemZ: 2 bytes.
258 	/// X86:     1 bytes.
259 	/// XCore:   2 bytes.
260 	/// EVM:     1 bytes.
261 	/// MOS65XX: 1 bytes.
262 	cs_skipdata_cb_t callback; 	// default value is NULL
263 
264 	/// User-defined data to be passed to @callback function pointer.
265 	void *user_data;
266 } cs_opt_skipdata;
267 
268 
269 #include "arm.h"
270 #include "arm64.h"
271 #include "m68k.h"
272 #include "mips.h"
273 #include "ppc.h"
274 #include "sparc.h"
275 #include "systemz.h"
276 #include "x86.h"
277 #include "xcore.h"
278 #include "tms320c64x.h"
279 #include "m680x.h"
280 #include "evm.h"
281 #include "mos65xx.h"
282 
283 /// NOTE: All information in cs_detail is only available when CS_OPT_DETAIL = CS_OPT_ON
284 /// Initialized as memset(., 0, offsetof(cs_detail, ARCH)+sizeof(cs_ARCH))
285 /// by ARCH_getInstruction in arch/ARCH/ARCHDisassembler.c
286 /// if cs_detail changes, in particular if a field is added after the union,
287 /// then update arch/ARCH/ARCHDisassembler.c accordingly
288 typedef struct cs_detail {
289 	uint16_t regs_read[16]; ///< list of implicit registers read by this insn
290 	uint8_t regs_read_count; ///< number of implicit registers read by this insn
291 
292 	uint16_t regs_write[20]; ///< list of implicit registers modified by this insn
293 	uint8_t regs_write_count; ///< number of implicit registers modified by this insn
294 
295 	uint8_t groups[8]; ///< list of group this instruction belong to
296 	uint8_t groups_count; ///< number of groups this insn belongs to
297 
298 	/// Architecture-specific instruction info
299 	union {
300 		cs_x86 x86;     ///< X86 architecture, including 16-bit, 32-bit & 64-bit mode
301 		cs_arm64 arm64; ///< ARM64 architecture (aka AArch64)
302 		cs_arm arm;     ///< ARM architecture (including Thumb/Thumb2)
303 		cs_m68k m68k;   ///< M68K architecture
304 		cs_mips mips;   ///< MIPS architecture
305 		cs_ppc ppc;	    ///< PowerPC architecture
306 		cs_sparc sparc; ///< Sparc architecture
307 		cs_sysz sysz;   ///< SystemZ architecture
308 		cs_xcore xcore; ///< XCore architecture
309 		cs_tms320c64x tms320c64x;  ///< TMS320C64x architecture
310 		cs_m680x m680x; ///< M680X architecture
311 		cs_evm evm;	    ///< Ethereum architecture
312 		cs_mos65xx mos65xx;	///< MOS65XX architecture (including MOS6502)
313 	};
314 } cs_detail;
315 
316 /// Detail information of disassembled instruction
317 typedef struct cs_insn {
318 	/// Instruction ID (basically a numeric ID for the instruction mnemonic)
319 	/// Find the instruction id in the '[ARCH]_insn' enum in the header file
320 	/// of corresponding architecture, such as 'arm_insn' in arm.h for ARM,
321 	/// 'x86_insn' in x86.h for X86, etc...
322 	/// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF
323 	/// NOTE: in Skipdata mode, "data" instruction has 0 for this id field.
324 	unsigned int id;
325 
326 	/// Address (EIP) of this instruction
327 	/// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF
328 	uint64_t address;
329 
330 	/// Size of this instruction
331 	/// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF
332 	uint16_t size;
333 
334 	/// Machine bytes of this instruction, with number of bytes indicated by @size above
335 	/// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF
336 	uint8_t bytes[24];
337 
338 	/// Ascii text of instruction mnemonic
339 	/// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF
340 	char mnemonic[CS_MNEMONIC_SIZE];
341 
342 	/// Ascii text of instruction operands
343 	/// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF
344 	char op_str[160];
345 
346 	/// Pointer to cs_detail.
347 	/// NOTE: detail pointer is only valid when both requirements below are met:
348 	/// (1) CS_OP_DETAIL = CS_OPT_ON
349 	/// (2) Engine is not in Skipdata mode (CS_OP_SKIPDATA option set to CS_OPT_ON)
350 	///
351 	/// NOTE 2: when in Skipdata mode, or when detail mode is OFF, even if this pointer
352 	///     is not NULL, its content is still irrelevant.
353 	cs_detail *detail;
354 } cs_insn;
355 
356 
357 /// Calculate the offset of a disassembled instruction in its buffer, given its position
358 /// in its array of disassembled insn
359 /// NOTE: this macro works with position (>=1), not index
360 #define CS_INSN_OFFSET(insns, post) (insns[post - 1].address - insns[0].address)
361 
362 
363 /// All type of errors encountered by Capstone API.
364 /// These are values returned by cs_errno()
365 typedef enum cs_err {
366 	CS_ERR_OK = 0,   ///< No error: everything was fine
367 	CS_ERR_MEM,      ///< Out-Of-Memory error: cs_open(), cs_disasm(), cs_disasm_iter()
368 	CS_ERR_ARCH,     ///< Unsupported architecture: cs_open()
369 	CS_ERR_HANDLE,   ///< Invalid handle: cs_op_count(), cs_op_index()
370 	CS_ERR_CSH,      ///< Invalid csh argument: cs_close(), cs_errno(), cs_option()
371 	CS_ERR_MODE,     ///< Invalid/unsupported mode: cs_open()
372 	CS_ERR_OPTION,   ///< Invalid/unsupported option: cs_option()
373 	CS_ERR_DETAIL,   ///< Information is unavailable because detail option is OFF
374 	CS_ERR_MEMSETUP, ///< Dynamic memory management uninitialized (see CS_OPT_MEM)
375 	CS_ERR_VERSION,  ///< Unsupported version (bindings)
376 	CS_ERR_DIET,     ///< Access irrelevant data in "diet" engine
377 	CS_ERR_SKIPDATA, ///< Access irrelevant data for "data" instruction in SKIPDATA mode
378 	CS_ERR_X86_ATT,  ///< X86 AT&T syntax is unsupported (opt-out at compile time)
379 	CS_ERR_X86_INTEL, ///< X86 Intel syntax is unsupported (opt-out at compile time)
380 	CS_ERR_X86_MASM, ///< X86 Masm syntax is unsupported (opt-out at compile time)
381 } cs_err;
382 
383 /**
384  Return combined API version & major and minor version numbers.
385 
386  @major: major number of API version
387  @minor: minor number of API version
388 
389  @return hexical number as (major << 8 | minor), which encodes both
390 	 major & minor versions.
391 	 NOTE: This returned value can be compared with version number made
392 	 with macro CS_MAKE_VERSION
393 
394  For example, second API version would return 1 in @major, and 1 in @minor
395  The return value would be 0x0101
396 
397  NOTE: if you only care about returned value, but not major and minor values,
398  set both @major & @minor arguments to NULL.
399 */
400 CAPSTONE_EXPORT
401 unsigned int CAPSTONE_API cs_version(int *major, int *minor);
402 
403 
404 /**
405  This API can be used to either ask for archs supported by this library,
406  or check to see if the library was compile with 'diet' option (or called
407  in 'diet' mode).
408 
409  To check if a particular arch is supported by this library, set @query to
410  arch mode (CS_ARCH_* value).
411  To verify if this library supports all the archs, use CS_ARCH_ALL.
412 
413  To check if this library is in 'diet' mode, set @query to CS_SUPPORT_DIET.
414 
415  @return True if this library supports the given arch, or in 'diet' mode.
416 */
417 CAPSTONE_EXPORT
418 bool CAPSTONE_API cs_support(int query);
419 
420 /**
421  Initialize CS handle: this must be done before any usage of CS.
422 
423  @arch: architecture type (CS_ARCH_*)
424  @mode: hardware mode. This is combined of CS_MODE_*
425  @handle: pointer to handle, which will be updated at return time
426 
427  @return CS_ERR_OK on success, or other value on failure (refer to cs_err enum
428  for detailed error).
429 */
430 CAPSTONE_EXPORT
431 cs_err CAPSTONE_API cs_open(cs_arch arch, cs_mode mode, csh *handle);
432 
433 /**
434  Close CS handle: MUST do to release the handle when it is not used anymore.
435  NOTE: this must be only called when there is no longer usage of Capstone,
436  not even access to cs_insn array. The reason is the this API releases some
437  cached memory, thus access to any Capstone API after cs_close() might crash
438  your application.
439 
440  In fact,this API invalidate @handle by ZERO out its value (i.e *handle = 0).
441 
442  @handle: pointer to a handle returned by cs_open()
443 
444  @return CS_ERR_OK on success, or other value on failure (refer to cs_err enum
445  for detailed error).
446 */
447 CAPSTONE_EXPORT
448 cs_err CAPSTONE_API cs_close(csh *handle);
449 
450 /**
451  Set option for disassembling engine at runtime
452 
453  @handle: handle returned by cs_open()
454  @type: type of option to be set
455  @value: option value corresponding with @type
456 
457  @return: CS_ERR_OK on success, or other value on failure.
458  Refer to cs_err enum for detailed error.
459 
460  NOTE: in the case of CS_OPT_MEM, handle's value can be anything,
461  so that cs_option(handle, CS_OPT_MEM, value) can (i.e must) be called
462  even before cs_open()
463 */
464 CAPSTONE_EXPORT
465 cs_err CAPSTONE_API cs_option(csh handle, cs_opt_type type, size_t value);
466 
467 /**
468  Report the last error number when some API function fail.
469  Like glibc's errno, cs_errno might not retain its old value once accessed.
470 
471  @handle: handle returned by cs_open()
472 
473  @return: error code of cs_err enum type (CS_ERR_*, see above)
474 */
475 CAPSTONE_EXPORT
476 cs_err CAPSTONE_API cs_errno(csh handle);
477 
478 
479 /**
480  Return a string describing given error code.
481 
482  @code: error code (see CS_ERR_* above)
483 
484  @return: returns a pointer to a string that describes the error code
485 	passed in the argument @code
486 */
487 CAPSTONE_EXPORT
488 const char * CAPSTONE_API cs_strerror(cs_err code);
489 
490 /**
491  Disassemble binary code, given the code buffer, size, address and number
492  of instructions to be decoded.
493  This API dynamically allocate memory to contain disassembled instruction.
494  Resulting instructions will be put into @*insn
495 
496  NOTE 1: this API will automatically determine memory needed to contain
497  output disassembled instructions in @insn.
498 
499  NOTE 2: caller must free the allocated memory itself to avoid memory leaking.
500 
501  NOTE 3: for system with scarce memory to be dynamically allocated such as
502  OS kernel or firmware, the API cs_disasm_iter() might be a better choice than
503  cs_disasm(). The reason is that with cs_disasm(), based on limited available
504  memory, we have to calculate in advance how many instructions to be disassembled,
505  which complicates things. This is especially troublesome for the case @count=0,
506  when cs_disasm() runs uncontrollably (until either end of input buffer, or
507  when it encounters an invalid instruction).
508 
509  @handle: handle returned by cs_open()
510  @code: buffer containing raw binary code to be disassembled.
511  @code_size: size of the above code buffer.
512  @address: address of the first instruction in given raw code buffer.
513  @insn: array of instructions filled in by this API.
514 	   NOTE: @insn will be allocated by this function, and should be freed
515 	   with cs_free() API.
516  @count: number of instructions to be disassembled, or 0 to get all of them
517 
518  @return: the number of successfully disassembled instructions,
519  or 0 if this function failed to disassemble the given code
520 
521  On failure, call cs_errno() for error code.
522 */
523 CAPSTONE_EXPORT
524 size_t CAPSTONE_API cs_disasm(csh handle,
525 		const uint8_t *code, size_t code_size,
526 		uint64_t address,
527 		size_t count,
528 		cs_insn **insn);
529 
530 /**
531   Deprecated function - to be retired in the next version!
532   Use cs_disasm() instead of cs_disasm_ex()
533 */
534 CAPSTONE_EXPORT
535 CAPSTONE_DEPRECATED
536 size_t CAPSTONE_API cs_disasm_ex(csh handle,
537 		const uint8_t *code, size_t code_size,
538 		uint64_t address,
539 		size_t count,
540 		cs_insn **insn);
541 
542 /**
543  Free memory allocated by cs_malloc() or cs_disasm() (argument @insn)
544 
545  @insn: pointer returned by @insn argument in cs_disasm() or cs_malloc()
546  @count: number of cs_insn structures returned by cs_disasm(), or 1
547      to free memory allocated by cs_malloc().
548 */
549 CAPSTONE_EXPORT
550 void CAPSTONE_API cs_free(cs_insn *insn, size_t count);
551 
552 
553 /**
554  Allocate memory for 1 instruction to be used by cs_disasm_iter().
555 
556  @handle: handle returned by cs_open()
557 
558  NOTE: when no longer in use, you can reclaim the memory allocated for
559  this instruction with cs_free(insn, 1)
560 */
561 CAPSTONE_EXPORT
562 cs_insn * CAPSTONE_API cs_malloc(csh handle);
563 
564 /**
565  Fast API to disassemble binary code, given the code buffer, size, address
566  and number of instructions to be decoded.
567  This API puts the resulting instruction into a given cache in @insn.
568  See tests/test_iter.c for sample code demonstrating this API.
569 
570  NOTE 1: this API will update @code, @size & @address to point to the next
571  instruction in the input buffer. Therefore, it is convenient to use
572  cs_disasm_iter() inside a loop to quickly iterate all the instructions.
573  While decoding one instruction at a time can also be achieved with
574  cs_disasm(count=1), some benchmarks shown that cs_disasm_iter() can be 30%
575  faster on random input.
576 
577  NOTE 2: the cache in @insn can be created with cs_malloc() API.
578 
579  NOTE 3: for system with scarce memory to be dynamically allocated such as
580  OS kernel or firmware, this API is recommended over cs_disasm(), which
581  allocates memory based on the number of instructions to be disassembled.
582  The reason is that with cs_disasm(), based on limited available memory,
583  we have to calculate in advance how many instructions to be disassembled,
584  which complicates things. This is especially troublesome for the case
585  @count=0, when cs_disasm() runs uncontrollably (until either end of input
586  buffer, or when it encounters an invalid instruction).
587 
588  @handle: handle returned by cs_open()
589  @code: buffer containing raw binary code to be disassembled
590  @size: size of above code
591  @address: address of the first insn in given raw code buffer
592  @insn: pointer to instruction to be filled in by this API.
593 
594  @return: true if this API successfully decode 1 instruction,
595  or false otherwise.
596 
597  On failure, call cs_errno() for error code.
598 */
599 CAPSTONE_EXPORT
600 bool CAPSTONE_API cs_disasm_iter(csh handle,
601 	const uint8_t **code, size_t *size,
602 	uint64_t *address, cs_insn *insn);
603 
604 /**
605  Return friendly name of register in a string.
606  Find the instruction id from header file of corresponding architecture (arm.h for ARM,
607  x86.h for X86, ...)
608 
609  WARN: when in 'diet' mode, this API is irrelevant because engine does not
610  store register name.
611 
612  @handle: handle returned by cs_open()
613  @reg_id: register id
614 
615  @return: string name of the register, or NULL if @reg_id is invalid.
616 */
617 CAPSTONE_EXPORT
618 const char * CAPSTONE_API cs_reg_name(csh handle, unsigned int reg_id);
619 
620 /**
621  Return friendly name of an instruction in a string.
622  Find the instruction id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
623 
624  WARN: when in 'diet' mode, this API is irrelevant because the engine does not
625  store instruction name.
626 
627  @handle: handle returned by cs_open()
628  @insn_id: instruction id
629 
630  @return: string name of the instruction, or NULL if @insn_id is invalid.
631 */
632 CAPSTONE_EXPORT
633 const char * CAPSTONE_API cs_insn_name(csh handle, unsigned int insn_id);
634 
635 /**
636  Return friendly name of a group id (that an instruction can belong to)
637  Find the group id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
638 
639  WARN: when in 'diet' mode, this API is irrelevant because the engine does not
640  store group name.
641 
642  @handle: handle returned by cs_open()
643  @group_id: group id
644 
645  @return: string name of the group, or NULL if @group_id is invalid.
646 */
647 CAPSTONE_EXPORT
648 const char * CAPSTONE_API cs_group_name(csh handle, unsigned int group_id);
649 
650 /**
651  Check if a disassembled instruction belong to a particular group.
652  Find the group id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
653  Internally, this simply verifies if @group_id matches any member of insn->groups array.
654 
655  NOTE: this API is only valid when detail option is ON (which is OFF by default).
656 
657  WARN: when in 'diet' mode, this API is irrelevant because the engine does not
658  update @groups array.
659 
660  @handle: handle returned by cs_open()
661  @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()
662  @group_id: group that you want to check if this instruction belong to.
663 
664  @return: true if this instruction indeed belongs to the given group, or false otherwise.
665 */
666 CAPSTONE_EXPORT
667 bool CAPSTONE_API cs_insn_group(csh handle, const cs_insn *insn, unsigned int group_id);
668 
669 /**
670  Check if a disassembled instruction IMPLICITLY used a particular register.
671  Find the register id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
672  Internally, this simply verifies if @reg_id matches any member of insn->regs_read array.
673 
674  NOTE: this API is only valid when detail option is ON (which is OFF by default)
675 
676  WARN: when in 'diet' mode, this API is irrelevant because the engine does not
677  update @regs_read array.
678 
679  @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()
680  @reg_id: register that you want to check if this instruction used it.
681 
682  @return: true if this instruction indeed implicitly used the given register, or false otherwise.
683 */
684 CAPSTONE_EXPORT
685 bool CAPSTONE_API cs_reg_read(csh handle, const cs_insn *insn, unsigned int reg_id);
686 
687 /**
688  Check if a disassembled instruction IMPLICITLY modified a particular register.
689  Find the register id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
690  Internally, this simply verifies if @reg_id matches any member of insn->regs_write array.
691 
692  NOTE: this API is only valid when detail option is ON (which is OFF by default)
693 
694  WARN: when in 'diet' mode, this API is irrelevant because the engine does not
695  update @regs_write array.
696 
697  @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()
698  @reg_id: register that you want to check if this instruction modified it.
699 
700  @return: true if this instruction indeed implicitly modified the given register, or false otherwise.
701 */
702 CAPSTONE_EXPORT
703 bool CAPSTONE_API cs_reg_write(csh handle, const cs_insn *insn, unsigned int reg_id);
704 
705 /**
706  Count the number of operands of a given type.
707  Find the operand type in header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
708 
709  NOTE: this API is only valid when detail option is ON (which is OFF by default)
710 
711  @handle: handle returned by cs_open()
712  @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()
713  @op_type: Operand type to be found.
714 
715  @return: number of operands of given type @op_type in instruction @insn,
716  or -1 on failure.
717 */
718 CAPSTONE_EXPORT
719 int CAPSTONE_API cs_op_count(csh handle, const cs_insn *insn, unsigned int op_type);
720 
721 /**
722  Retrieve the position of operand of given type in <arch>.operands[] array.
723  Later, the operand can be accessed using the returned position.
724  Find the operand type in header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
725 
726  NOTE: this API is only valid when detail option is ON (which is OFF by default)
727 
728  @handle: handle returned by cs_open()
729  @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()
730  @op_type: Operand type to be found.
731  @position: position of the operand to be found. This must be in the range
732 			[1, cs_op_count(handle, insn, op_type)]
733 
734  @return: index of operand of given type @op_type in <arch>.operands[] array
735  in instruction @insn, or -1 on failure.
736 */
737 CAPSTONE_EXPORT
738 int CAPSTONE_API cs_op_index(csh handle, const cs_insn *insn, unsigned int op_type,
739 		unsigned int position);
740 
741 /// Type of array to keep the list of registers
742 typedef uint16_t cs_regs[64];
743 
744 /**
745  Retrieve all the registers accessed by an instruction, either explicitly or
746  implicitly.
747 
748  WARN: when in 'diet' mode, this API is irrelevant because engine does not
749  store registers.
750 
751  @handle: handle returned by cs_open()
752  @insn: disassembled instruction structure returned from cs_disasm() or cs_disasm_iter()
753  @regs_read: on return, this array contains all registers read by instruction.
754  @regs_read_count: number of registers kept inside @regs_read array.
755  @regs_write: on return, this array contains all registers written by instruction.
756  @regs_write_count: number of registers kept inside @regs_write array.
757 
758  @return CS_ERR_OK on success, or other value on failure (refer to cs_err enum
759  for detailed error).
760 */
761 CAPSTONE_EXPORT
762 cs_err CAPSTONE_API cs_regs_access(csh handle, const cs_insn *insn,
763 		cs_regs regs_read, uint8_t *regs_read_count,
764 		cs_regs regs_write, uint8_t *regs_write_count);
765 
766 #ifdef __cplusplus
767 }
768 #endif
769 
770 #endif
771