1 /****************************************************************************** 2 * * 3 * Copyright (C) 2018 The Android Open Source Project 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at: 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 ***************************************************************************** 18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore 19 */ 20 #ifndef IXHEAACD_PS_DEC_H 21 #define IXHEAACD_PS_DEC_H 22 23 #define MAX_NUM_COLUMNS 32 24 25 #define MAX_NUM_COLUMNS_960 30 26 #define NUM_OF_QUAD_MIRROR_FILTER_CHNLS 64 27 #define NUM_OF_ALL_PASS_CHNLS 23 28 #define NUM_OF_DEL_CHNLS \ 29 (NUM_OF_QUAD_MIRROR_FILTER_CHNLS - NUM_OF_ALL_PASS_CHNLS) 30 #define DEL_ALL_PASS 2 31 #define SMALL_DEL_STRT 12 32 #define SMALL_DEL 1 33 #define HIGH_DEL 14 34 #define NUM_OF_QUAD_MIRROR_FILTER_ALL_PASS_CHNLS \ 35 (NUM_OF_ALL_PASS_CHNLS - NO_QMF_CHANNELS_IN_HYBRID) 36 #define NUM_OF_QUAD_MIRROR_FILTER_ICC_CHNLS \ 37 (NUM_OF_QUAD_MIRROR_FILTER_ALL_PASS_CHNLS + NUM_OF_DEL_CHNLS) 38 #define PEAK_DECAYING_FACT 0x620a 39 40 #define MAXIM_NUM_OF_PS_ENVLOPS 5 41 #define PSC_SQRT05F (0x5a82) 42 #define NUM_OF_BINS (20) 43 #define NUM_BANDS_FINE (34) 44 45 #define NUM_SUB_SAMPLES_960 30 46 #define CORE_CODEC_FRAME_SIZE 1024 47 #define NUM_SUB_SAMPLES (CORE_CODEC_FRAME_SIZE / 32) 48 49 #define NRG_INT_COEFF 0.75f 50 #define INIT_FILT_COEFF (1.0f - NRG_INT_COEFF) 51 52 #define NEGATE_IPD_MASK (0x00001000) 53 54 #define NUM_IPD_STEPS (8) 55 #define NUM_OPD_STEPS (8) 56 57 #define NUM_HI_RES_BINS (34) 58 #define NUM_MID_RES_BINS (20) 59 60 #define NUM_HI_RES_IPD_BINS (17) 61 62 #define NUM_MID_RES_IPD_BINS (11) 63 64 #define NUM_LOW_RES_IPD_BINS (5) 65 66 #ifndef _M_PI_ 67 #define _M_PI_ (3.141592653589793238462643383279) 68 #endif 69 #define PSC_SQRT2 (1.41421356237309504880) 70 #define PSC_PIF ((FLOAT32)_M_PI_) 71 #define PSC_SQRT2F ((FLOAT32)PSC_SQRT2) 72 73 #define IPD_HALF_RANGE (PSC_PIF) 74 #define IPD_SCALE_FACTOR (IPD_HALF_RANGE / NUM_IPD_STEPS) 75 #define OPD_HALF_RANGE (PSC_PIF) 76 #define OPD_SCALE_FACTOR (OPD_HALF_RANGE / NUM_OPD_STEPS) 77 #define NEGATE_IPD_MASK (0x00001000) 78 79 #define DECAY_CUTOFF 3 80 #define DECAY_CUTOFF_HI_RES 5 81 #define DECAY_SLOPE 0.05f 82 83 #define PHASE_SMOOTH_HIST1 (0.5f) 84 #define PHASE_SMOOTH_HIST2 (0.25f) 85 86 #define NUM_QMF_BANDS_IN_HYBRID20 3 87 #define NUM_QMF_BANDS_IN_HYBRID34 5 88 89 #define MAX_NUM_QMF_CHANNELS_IN_HYBRID (NUM_QMF_BANDS_IN_HYBRID34) 90 91 #define PEAK_DECAY_FACTOR_FAST (0.765928338364649f) 92 93 94 typedef WORD16((*REVERB_BUFFERS_RI)[NUM_SER_AP_LINKS])[32 * 2]; 95 typedef WORD16((REVERB_BUFFERS_CH_RI[5])[NUM_SER_AP_LINKS])[16 * 2]; 96 97 typedef struct { 98 WORD16 (*delay_buf_qmf_ap_re_im)[32 * 2]; 99 100 WORD16 (*delay_buf_qmf_ld_re_im)[SMALL_DEL_STRT * 2]; 101 102 WORD16 (*delay_buf_qmf_sd_re_im)[2 * 32]; 103 104 WORD16 delay_buf_idx_ser[NUM_SER_AP_LINKS]; 105 WORD16 delay_sample_ser[NUM_SER_AP_LINKS]; 106 107 REVERB_BUFFERS_RI delay_buf_qmf_ser_re_im; 108 WORD16 delay_buf_idx; 109 WORD16 delay_buf_idx_long; 110 111 WORD32 *peak_decay_diff; 112 WORD32 *energy_prev; 113 WORD32 *peak_decay_diff_prev; 114 115 WORD32 *ptr_hyb_left_re; 116 WORD32 *ptr_hyb_left_im; 117 WORD32 *ptr_hyb_right_re; 118 WORD32 *ptr_hyb_right_im; 119 120 WORD16 delay_buf_qmf_sub_re_im[DEL_ALL_PASS][16 * 2]; 121 REVERB_BUFFERS_CH_RI delay_buf_qmf_sub_ser_re_im; 122 123 WORD16 h11_h12_vec[2 * 24]; 124 WORD16 h21_h22_vec[2 * 24]; 125 126 WORD16 H11_H12[2 * 24]; 127 WORD16 H21_H22[2 * 24]; 128 129 WORD16 delta_h11_h12[2 * 24]; 130 WORD16 delta_h21_h22[2 * 24]; 131 132 FLAG force_mono; 133 134 WORD16 delay_buffer_scale; 135 WORD16 usb; 136 137 WORD16 iid_par_prev[NUM_BANDS_FINE]; 138 WORD16 icc_par_prev[NUM_BANDS_FINE]; 139 140 FLAG ps_data_present; 141 142 FLAG enable_iid; 143 FLAG enable_icc; 144 145 FLAG enable_ext; 146 147 WORD16 iid_mode; 148 WORD16 icc_mode; 149 FLAG iid_quant; 150 151 FLAG frame_class; 152 WORD16 num_env; 153 WORD16 border_position[MAXIM_NUM_OF_PS_ENVLOPS + 2]; 154 155 FLAG iid_dt[MAXIM_NUM_OF_PS_ENVLOPS]; 156 FLAG icc_dt[MAXIM_NUM_OF_PS_ENVLOPS]; 157 158 WORD16 iid_par_table[MAXIM_NUM_OF_PS_ENVLOPS + 2][NUM_BANDS_FINE]; 159 WORD16 icc_par_table[MAXIM_NUM_OF_PS_ENVLOPS + 2][NUM_BANDS_FINE]; 160 161 ia_hybrid_struct str_hybrid; 162 FLOAT32 hyb_left_re[CORE_CODEC_FRAME_SIZE / MAX_NUM_COLUMNS][MAX_NUM_COLUMNS]; 163 FLOAT32 hyb_left_im[CORE_CODEC_FRAME_SIZE / MAX_NUM_COLUMNS][MAX_NUM_COLUMNS]; 164 FLOAT32 hyb_right_re[CORE_CODEC_FRAME_SIZE / MAX_NUM_COLUMNS][MAX_NUM_COLUMNS]; 165 FLOAT32 hyb_right_im[CORE_CODEC_FRAME_SIZE / MAX_NUM_COLUMNS][MAX_NUM_COLUMNS]; 166 167 FLOAT32 h11_re_vec[NUM_HI_RES_BINS]; 168 FLOAT32 h11_im_vec[NUM_HI_RES_BINS]; 169 FLOAT32 h12_re_vec[NUM_HI_RES_BINS]; 170 FLOAT32 h12_im_vec[NUM_HI_RES_BINS]; 171 FLOAT32 h21_re_vec[NUM_HI_RES_BINS]; 172 FLOAT32 h21_im_vec[NUM_HI_RES_BINS]; 173 FLOAT32 h22_re_vec[NUM_HI_RES_BINS]; 174 FLOAT32 h22_im_vec[NUM_HI_RES_BINS]; 175 176 FLOAT32 h11_re_prev[NUM_HI_RES_BINS]; 177 FLOAT32 h11_im_prev[NUM_HI_RES_BINS]; 178 FLOAT32 h12_re_prev[NUM_HI_RES_BINS]; 179 FLOAT32 h12_im_prev[NUM_HI_RES_BINS]; 180 FLOAT32 h21_re_prev[NUM_HI_RES_BINS]; 181 FLOAT32 h21_im_prev[NUM_HI_RES_BINS]; 182 FLOAT32 h22_re_prev[NUM_HI_RES_BINS]; 183 FLOAT32 h22_im_prev[NUM_HI_RES_BINS]; 184 185 FLOAT32 qmf_delay_buf_re[HIGH_DEL][NUM_OF_QUAD_MIRROR_FILTER_CHNLS]; 186 FLOAT32 qmf_delay_buf_im[HIGH_DEL][NUM_OF_QUAD_MIRROR_FILTER_CHNLS]; 187 FLOAT32 sub_qmf_delay_buf_re[HIGH_DEL][NUM_OF_QUAD_MIRROR_FILTER_CHNLS]; 188 FLOAT32 sub_qmf_delay_buf_im[HIGH_DEL][NUM_OF_QUAD_MIRROR_FILTER_CHNLS]; 189 FLOAT32 ser_qmf_delay_buf_re[NUM_SER_AP_LINKS][5][NUM_OF_QUAD_MIRROR_FILTER_CHNLS]; 190 FLOAT32 ser_qmf_delay_buf_im[NUM_SER_AP_LINKS][5][NUM_OF_QUAD_MIRROR_FILTER_CHNLS]; 191 192 ia_hybrid_flt_struct *ptr_hybrid; 193 ia_hybrid_flt_struct str_flt_hybrid20; 194 ia_hybrid_flt_struct str_flt_hybrid34; 195 WORD32 use_34_st_bands; 196 WORD32 use_34_st_bands_prev; 197 WORD32 ps_mode; 198 199 WORD32 *ptr_group_borders; 200 WORD32 num_groups; 201 WORD32 num_sub_qmf_groups; 202 WORD32 num_bins; 203 WORD32 first_delay_gr; 204 WORD32 *ptr_bins_group_map; 205 WORD32 num_sub_samples; 206 WORD32 num_chans; 207 WORD32 use_pca_rot_flg; 208 WORD32 freq_res_ipd; 209 WORD32 delay_qmf_delay_buf_idx[NUM_OF_QUAD_MIRROR_FILTER_CHNLS]; 210 WORD32 delay_qmf_delay_num_samp[NUM_OF_QUAD_MIRROR_FILTER_CHNLS]; 211 FLOAT32 peak_decay_fast_bin[NUM_HI_RES_BINS]; 212 FLOAT32 prev_nrg_bin[NUM_HI_RES_BINS]; 213 FLOAT32 prev_peak_diff_bin[NUM_HI_RES_BINS]; 214 WORD32 ipd_idx_map_1[NUM_HI_RES_IPD_BINS]; 215 WORD32 opd_idx_map_1[NUM_HI_RES_IPD_BINS]; 216 WORD32 ipd_idx_map_2[NUM_HI_RES_IPD_BINS]; 217 WORD32 opd_idx_map_2[NUM_HI_RES_IPD_BINS]; 218 219 WORD32 ipd_idx_map[MAXIM_NUM_OF_PS_ENVLOPS][NUM_HI_RES_IPD_BINS]; 220 WORD32 opd_idx_map[MAXIM_NUM_OF_PS_ENVLOPS][NUM_HI_RES_IPD_BINS]; 221 222 FLOAT32 ser_sub_qmf_dealy_buf_re[NUM_SER_AP_LINKS][5][NUM_OF_QUAD_MIRROR_FILTER_CHNLS]; 223 FLOAT32 ser_sub_qmf_dealy_buf_im[NUM_SER_AP_LINKS][5][NUM_OF_QUAD_MIRROR_FILTER_CHNLS]; 224 225 FLOAT32 hyb_work_re_20[NUM_SUB_SAMPLES + HYBRID_FILTER_LENGTH - 1]; 226 FLOAT32 hyb_work_im_20[NUM_SUB_SAMPLES + HYBRID_FILTER_LENGTH - 1]; 227 FLOAT32 hyb_qmf_buf_re_20[MAX_NUM_QMF_CHANNELS_IN_HYBRID][HYBRID_FILTER_LENGTH - 1]; 228 FLOAT32 hyb_qmf_buf_im_20[MAX_NUM_QMF_CHANNELS_IN_HYBRID][HYBRID_FILTER_LENGTH - 1]; 229 FLOAT32 hyb_temp_re_20[NUM_SUB_SAMPLES][NUM_OF_QUAD_MIRROR_FILTER_CHNLS]; 230 FLOAT32 hyb_temp_im_20[NUM_SUB_SAMPLES][NUM_OF_QUAD_MIRROR_FILTER_CHNLS]; 231 232 FLOAT32 hyb_work_re_34[NUM_SUB_SAMPLES + HYBRID_FILTER_LENGTH - 1]; 233 FLOAT32 hyb_work_im_34[NUM_SUB_SAMPLES + HYBRID_FILTER_LENGTH - 1]; 234 FLOAT32 hyb_qmf_buf_re_34[MAX_NUM_QMF_CHANNELS_IN_HYBRID][HYBRID_FILTER_LENGTH - 1]; 235 FLOAT32 hyb_qmf_buf_im_34[MAX_NUM_QMF_CHANNELS_IN_HYBRID][HYBRID_FILTER_LENGTH - 1]; 236 FLOAT32 hyb_temp_re_34[NUM_SUB_SAMPLES][NUM_OF_QUAD_MIRROR_FILTER_CHNLS]; 237 FLOAT32 hyb_temp_im_34[NUM_SUB_SAMPLES][NUM_OF_QUAD_MIRROR_FILTER_CHNLS]; 238 239 FLOAT32 **pp_qmf_buf_real[2]; 240 FLOAT32 **pp_qmf_buf_imag[2]; 241 FLOAT32 *time_sample_buf[2]; 242 243 } ia_ps_dec_struct; 244 245 typedef struct { 246 FLAG enable_iid; 247 FLAG enable_icc; 248 WORD16 iid_mode; 249 WORD16 icc_mode; 250 FLAG frame_class; 251 WORD32 freq_res_ipd; 252 WORD16 border_position[MAXIM_NUM_OF_PS_ENVLOPS + 2]; 253 FLAG iid_dt[MAXIM_NUM_OF_PS_ENVLOPS]; 254 FLAG icc_dt[MAXIM_NUM_OF_PS_ENVLOPS]; 255 WORD16 iid_par_table[MAXIM_NUM_OF_PS_ENVLOPS + 2][NUM_BANDS_FINE]; 256 WORD16 icc_par_table[MAXIM_NUM_OF_PS_ENVLOPS + 2][NUM_BANDS_FINE]; 257 } ia_ps_dec_config_struct; 258 259 VOID ixheaacd_create_psdec(ia_ps_dec_struct *ptr_ps_dec, 260 VOID *sbr_persistent_mem, WORD32 *ptr_overlap_buf, 261 WORD32 frame_size); 262 263 VOID ixheaacd_decorr_filter1_dec(ia_ps_dec_struct *ptr_ps_dec, 264 ia_ps_tables_struct *ps_tables_ptr, 265 WORD16 *transient_ratio); 266 267 VOID ixheaacd_decorr_filter1_armv7(ia_ps_dec_struct *ptr_ps_dec, 268 ia_ps_tables_struct *ps_tables_ptr, 269 WORD16 *transient_ratio); 270 271 VOID ixheaacd_decorr_filter2_dec( 272 ia_ps_dec_struct *ptr_ps_dec, WORD32 *p_buf_left_real, 273 WORD32 *p_buf_left_imag, WORD32 *p_buf_right_real, WORD32 *p_buf_right_imag, 274 ia_ps_tables_struct *ps_tables_ptr, WORD16 *transient_ratio); 275 276 VOID ixheaacd_decorr_filter2_armv7( 277 ia_ps_dec_struct *ptr_ps_dec, WORD32 *p_buf_left_real, 278 WORD32 *p_buf_left_imag, WORD32 *p_buf_right_real, WORD32 *p_buf_right_imag, 279 ia_ps_tables_struct *ps_tables_ptr, WORD16 *transient_ratio); 280 281 WORD32 ixheaacd_divide16_pos_dec(WORD32 op1, WORD32 op2); 282 283 WORD32 ixheaacd_divide16_pos_armv7(WORD32 op1, WORD32 op2); 284 285 VOID ixheaacd_decorrelation_dec(ia_ps_dec_struct *ptr_ps_dec, 286 WORD32 *p_buf_left_real, 287 WORD32 *p_buf_left_imag, 288 WORD32 *p_buf_right_real, 289 WORD32 *p_buf_right_imag, 290 ia_ps_tables_struct *ps_tables_ptr); 291 292 VOID ixheaacd_decorrelation_armv7(ia_ps_dec_struct *ptr_ps_dec, 293 WORD32 *p_buf_left_real, 294 WORD32 *p_buf_left_imag, 295 WORD32 *p_buf_right_real, 296 WORD32 *p_buf_right_imag, 297 ia_ps_tables_struct *ps_tables_ptr); 298 299 VOID ixheaacd_init_ps_scale(ia_ps_dec_struct *ptr_ps_dec, 300 ia_sbr_scale_fact_struct *sbr_scale_factor); 301 302 VOID ixheaacd_init_rot_env(ia_ps_dec_struct *ptr_ps_dec, WORD16 env, WORD16 usb, 303 ia_sbr_tables_struct *sbr_tables_ptr, 304 const WORD16 *cos_sin_lookup_tab); 305 306 VOID ixheaacd_apply_ps(ia_ps_dec_struct *ptr_ps_dec, WORD32 **real_buf_left, 307 WORD32 **imag_buf_left, WORD32 *real_buf_right, 308 WORD32 *imag_buf_right, 309 ia_sbr_scale_fact_struct *sbr_scale_factor, WORD16 slot, 310 ia_sbr_tables_struct *sbr_tables_ptr, WORD no_col); 311 312 VOID ixheaacd_apply_rot_dec(ia_ps_dec_struct *ptr_ps_dec, WORD32 *p_qmf_left_re, 313 WORD32 *p_qmf_left_im, WORD32 *p_qmf_right_re, 314 WORD32 *p_qmf_right_im, 315 ia_sbr_tables_struct *sbr_tables_ptr, 316 const WORD16 *ptr_res); 317 318 VOID ixheaacd_apply_rot_armv7(ia_ps_dec_struct *ptr_ps_dec, 319 WORD32 *qmf_left_real, WORD32 *qmf_left_imag, 320 WORD32 *qmf_right_real, WORD32 *qmf_right_imag, 321 ia_sbr_tables_struct *sbr_tables_ptr, 322 const WORD16 *ptr_resol); 323 324 VOID ixheaacd_scale_ps_states(ia_ps_dec_struct *ptr_ps_dec, WORD16 scale); 325 326 VOID 327 ixheaacd_esbr_apply_ps(ia_ps_dec_struct * ptr_ps_dec, 328 FLOAT32 **pp_qmf_buf_re_left, 329 FLOAT32 **pp_qmf_buf_im_left, 330 FLOAT32 **pp_qmf_buf_re_right, 331 FLOAT32 **pp_qmf_buf_im_right, 332 WORD32 usb, ia_ps_tables_struct *ptr_ps_tables, 333 WORD32 num_time_slot); 334 335 VOID 336 ixheaacd_esbr_ps_de_correlate(ia_ps_dec_struct *ptr_ps_dec, 337 FLOAT32 **pp_qmf_buf_re_left, 338 FLOAT32 **pp_qmf_buf_im_left, 339 FLOAT32 **pp_qmf_buf_re_right, 340 FLOAT32 **pp_qmf_buf_im_right, 341 ia_ps_tables_struct *ptr_ps_tables); 342 343 VOID 344 ixheaacd_esbr_ps_apply_rotation(ia_ps_dec_struct *ptr_ps_dec, 345 FLOAT32 **pp_qmf_buf_re_left, 346 FLOAT32 **pp_qmf_buf_im_left, 347 FLOAT32 **pp_qmf_buf_re_right, 348 FLOAT32 **pp_qmf_buf_im_right, 349 ia_ps_tables_struct *ptr_ps_tables); 350 351 WORD32 352 ixheaacd_create_hyb_filterbank_esbr_ps(ia_hybrid_flt_struct *pHybrid, 353 WORD32 frameSize, 354 WORD32 noBands); 355 356 WORD32 ixheaacd_create_ps_esbr_dec(ia_ps_dec_struct *ptr_ps_dec_struct, 357 ia_ps_tables_struct *ptr_ps_tables, 358 UWORD32 noQmfChans, 359 UWORD32 num_sub_samples, 360 WORD32 ps_mode); 361 362 VOID ResetPsDec(ia_ps_dec_struct * ptr_ps_dec); 363 VOID ResetPsDeCor(ia_ps_dec_struct * ptr_ps_dec); 364 365 extern WORD16 ixheaacd_divideby2(WORD32 op); 366 extern WORD16 ixheaacd_divideby3(WORD32 op); 367 368 #endif 369