| /external/llvm/test/MC/AArch64/ |
| D | neon-scalar-by-elem-mul.s | 11 fmul d0, d1, v1.d[0] define
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| D | arm64-fp-encoding.s | 98 fmul d1, d2, d3 define
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| /external/compiler-rt/lib/builtins/ |
| D | mulsf3.c | 18 ARM_EABI_FNALIAS(fmul, mulsf3) in ARM_EABI_FNALIAS() argument
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| /external/llvm/test/MC/X86/ |
| D | intel-syntax-2.s | 22 fmul label
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| D | intel-syntax.s | 548 fmul label
574 fmul ST(0), ST(1) label
587 fmul ST(1), ST(0) label
600 fmul ST(1) label
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| D | x86-64.s | 464 fmul %st, %st(1) label
465 fmul %st(1), %st label
1434 fmul %st(1), %st(0) label
1447 fmul %st(0), %st(1) label
1460 fmul %st(1) label
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| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 543 __ fmul(d30, d27, d23); in GenerateTestSequenceFP() local
544 __ fmul(s25, s17, s15); in GenerateTestSequenceFP() local
2671 __ fmul(d12, d4, v1.D(), 1); in GenerateTestSequenceNEONFP() local
2672 __ fmul(s30, s1, v15.S(), 3); in GenerateTestSequenceNEONFP() local
2673 __ fmul(v25.V2D(), v0.V2D(), v21.V2D()); in GenerateTestSequenceNEONFP() local
2674 __ fmul(v10.V2D(), v24.V2D(), v10.D(), 1); in GenerateTestSequenceNEONFP() local
2675 __ fmul(v7.V2S(), v24.V2S(), v16.V2S()); in GenerateTestSequenceNEONFP() local
2676 __ fmul(v1.V2S(), v16.V2S(), v4.S(), 2); in GenerateTestSequenceNEONFP() local
2677 __ fmul(v5.V4S(), v28.V4S(), v25.V4S()); in GenerateTestSequenceNEONFP() local
2678 __ fmul(v11.V4S(), v3.V4S(), v8.S(), 0); in GenerateTestSequenceNEONFP() local
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| D | test-api-movprfx-aarch64.cc | 502 __ fmul(z0.VnH(), p3.Merging(), z0.VnH(), z0.VnH()); in TEST() local
988 __ fmul(z21.VnH(), p1.Merging(), z21.VnH(), 2.0); in TEST() local
991 __ fmul(z28.VnS(), p7.Merging(), z28.VnS(), z26.VnS()); in TEST() local
1850 __ fmul(z8.VnS(), p4.Merging(), z8.VnS(), 2.0); in TEST() local
1853 __ fmul(z6.VnD(), p6.Merging(), z6.VnD(), z27.VnD()); in TEST() local
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| D | test-assembler-fp-aarch64.cc | 615 TEST(fmul) { in TEST() argument
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| /external/XNNPACK/src/jit/ |
| D | aarch64-assembler.cc | 442 void Assembler::fmul(VRegister vd, VRegister vn, VRegister vm) { in fmul() function in xnnpack::aarch64::Assembler
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| /external/mesa3d/src/panfrost/bifrost/ |
| D | bifrost_compile.c | 1515 bi_instruction fmul = { in bi_emit_lod_88() local
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| /external/vixl/src/aarch64/ |
| D | assembler-sve-aarch64.cc | 801 void Assembler::fmul(const ZRegister& zd, in fmul() function in vixl::aarch64::Assembler
820 void Assembler::fmul(const ZRegister& zd, in fmul() function in vixl::aarch64::Assembler
977 void Assembler::fmul(const ZRegister& zd, in fmul() function in vixl::aarch64::Assembler
1648 void Assembler::fmul(const ZRegister& zd, in fmul() function in vixl::aarch64::Assembler
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| D | logic-aarch64.cc | 5678 LogicVRegister Simulator::fmul(VectorFormat vform, in fmul() function in vixl::aarch64::Simulator
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