1 /******************************************************************************
2 *
3 * Copyright (C) 2021 The Android Open Source Project
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *****************************************************************************
18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19 */
20
21 /*****************************************************************************/
22 /* */
23 /* File Name : imvcd_utils.c */
24 /* */
25 /* Description : MVCD Utility functions used by 'imvcd_api.c' */
26 /* */
27 /*****************************************************************************/
28 #include <string.h>
29
30 #include "ih264_typedefs.h"
31 #include "iv.h"
32 #include "ih264_debug.h"
33 #include "ih264_disp_mgr.h"
34 #include "ih264_macros.h"
35 #include "ih264d_error_handler.h"
36 #include "ih264d_format_conv.h"
37 #include "ih264d_utils.h"
38 #include "imvcd_structs.h"
39 #include "imvcd_utils.h"
40
imvcd_free_ref_bufs(mvc_au_buf_mgr_t * ps_mvc_au_buf_mgr,mvc_au_mv_pred_buf_mgr_t * ps_mvc_au_mv_pred_buf_mgr,WORD32 i4_pic_buf_id)41 void imvcd_free_ref_bufs(mvc_au_buf_mgr_t *ps_mvc_au_buf_mgr,
42 mvc_au_mv_pred_buf_mgr_t *ps_mvc_au_mv_pred_buf_mgr, WORD32 i4_pic_buf_id)
43 {
44 ih264_buf_mgr_release(ps_mvc_au_buf_mgr->ps_buf_mgr_ctxt, i4_pic_buf_id, BUF_MGR_REF);
45
46 ih264_buf_mgr_release(ps_mvc_au_mv_pred_buf_mgr->ps_buf_mgr_ctxt,
47 ps_mvc_au_buf_mgr->au1_au_buf_id_to_mv_buf_id_map[i4_pic_buf_id],
48 BUF_MGR_REF);
49 }
50
imvcd_release_all_ref_bufs(mvc_dec_ctxt_t * ps_mvcd_ctxt,WORD32 i4_num_bufs)51 void imvcd_release_all_ref_bufs(mvc_dec_ctxt_t *ps_mvcd_ctxt, WORD32 i4_num_bufs)
52 {
53 WORD32 i;
54
55 for(i = 0; i < i4_num_bufs; i++)
56 {
57 ih264_buf_mgr_release(ps_mvcd_ctxt->s_mvc_au_buf_mgr.ps_buf_mgr_ctxt, i, BUF_MGR_REF);
58
59 ih264_buf_mgr_release(ps_mvcd_ctxt->s_mvc_au_mv_pred_buf_mgr.ps_buf_mgr_ctxt,
60 ps_mvcd_ctxt->s_mvc_au_buf_mgr.au1_au_buf_id_to_mv_buf_id_map[i],
61 BUF_MGR_REF);
62 }
63 }
64
imvcd_free_ref_and_io_bufs(mvc_au_buf_mgr_t * ps_mvc_au_buf_mgr,mvc_au_mv_pred_buf_mgr_t * ps_mvc_au_mv_pred_buf_mgr,WORD32 i4_pic_buf_id)65 void imvcd_free_ref_and_io_bufs(mvc_au_buf_mgr_t *ps_mvc_au_buf_mgr,
66 mvc_au_mv_pred_buf_mgr_t *ps_mvc_au_mv_pred_buf_mgr,
67 WORD32 i4_pic_buf_id)
68 {
69 ih264_buf_mgr_release(ps_mvc_au_buf_mgr->ps_buf_mgr_ctxt, i4_pic_buf_id,
70 BUF_MGR_REF | BUF_MGR_IO);
71
72 ih264_buf_mgr_release(ps_mvc_au_mv_pred_buf_mgr->ps_buf_mgr_ctxt,
73 ps_mvc_au_buf_mgr->au1_au_buf_id_to_mv_buf_id_map[i4_pic_buf_id],
74 BUF_MGR_REF | BUF_MGR_IO);
75 }
76
imvcd_release_all_ref_and_io_bufs(mvc_dec_ctxt_t * ps_mvcd_ctxt,WORD32 i4_num_bufs)77 void imvcd_release_all_ref_and_io_bufs(mvc_dec_ctxt_t *ps_mvcd_ctxt, WORD32 i4_num_bufs)
78 {
79 WORD32 i;
80
81 for(i = 0; i < i4_num_bufs; i++)
82 {
83 ih264_buf_mgr_release(ps_mvcd_ctxt->s_mvc_au_buf_mgr.ps_buf_mgr_ctxt, i,
84 BUF_MGR_REF | BUF_MGR_IO);
85
86 ih264_buf_mgr_release(ps_mvcd_ctxt->s_mvc_au_mv_pred_buf_mgr.ps_buf_mgr_ctxt,
87 ps_mvcd_ctxt->s_mvc_au_buf_mgr.au1_au_buf_id_to_mv_buf_id_map[i],
88 BUF_MGR_REF | BUF_MGR_IO);
89 }
90 }
91
is_header_decoded(WORD32 i4_header_decoded,AVC_EXT_NALU_ID_T e_nalu_id)92 bool is_header_decoded(WORD32 i4_header_decoded, AVC_EXT_NALU_ID_T e_nalu_id)
93 {
94 /* Accounting for idiocy in 'ih264d_parse_nal_unit' */
95 e_nalu_id = (SPS == e_nalu_id) ? UNSPEC_0 : ((PPS == e_nalu_id) ? SLICE_NON_IDR : e_nalu_id);
96 return !!(i4_header_decoded & (1 << e_nalu_id));
97 }
98
is_mvc_nalu(AVC_EXT_NALU_ID_T e_nalu_id)99 bool is_mvc_nalu(AVC_EXT_NALU_ID_T e_nalu_id)
100 {
101 switch(e_nalu_id)
102 {
103 case SLICE_NON_IDR:
104 case SLICE_DPA:
105 case SLICE_DPB:
106 case SLICE_DPC:
107 case SLICE_IDR:
108 case PREFIX_NAL:
109 case SUBSET_SPS:
110 case CODED_SLICE_EXTENSION:
111 {
112 return true;
113 }
114 default:
115 {
116 return false;
117 }
118 }
119 }
120
is_slice_nalu_type(AVC_EXT_NALU_ID_T e_nalu_id)121 bool is_slice_nalu_type(AVC_EXT_NALU_ID_T e_nalu_id)
122 {
123 switch(e_nalu_id)
124 {
125 case SLICE_NON_IDR:
126 case SLICE_DPA:
127 case SLICE_DPB:
128 case SLICE_DPC:
129 case SLICE_IDR:
130 case CODED_SLICE_EXTENSION:
131 case PREFIX_NAL:
132 {
133 return true;
134 }
135 default:
136 {
137 return false;
138 }
139 }
140 }
141
imvcd_get_cur_nalu_mvc_ext(mvc_dec_ctxt_t * ps_mvcd_ctxt)142 nalu_mvc_ext_t *imvcd_get_cur_nalu_mvc_ext(mvc_dec_ctxt_t *ps_mvcd_ctxt)
143 {
144 return &ps_mvcd_ctxt->as_nalu_mvc_ext[ps_mvcd_ctxt->u2_num_views_decoded];
145 }
146
imvcd_get_nalu_mvc_ext(nalu_mvc_ext_t * ps_nalu_mvc_exts,UWORD16 u2_num_views_decoded,UWORD16 u2_view_id)147 nalu_mvc_ext_t *imvcd_get_nalu_mvc_ext(nalu_mvc_ext_t *ps_nalu_mvc_exts,
148 UWORD16 u2_num_views_decoded, UWORD16 u2_view_id)
149 {
150 WORD32 i;
151
152 for(i = 0; i < u2_num_views_decoded; i++)
153 {
154 if(ps_nalu_mvc_exts[i].u2_view_id == u2_view_id)
155 {
156 return &ps_nalu_mvc_exts[i];
157 }
158 }
159
160 return NULL;
161 }
162
imvcd_get_cur_ref_pic_list_mod_data(mvc_dec_ctxt_t * ps_mvcd_ctxt)163 ref_pic_list_mod_data_t *imvcd_get_cur_ref_pic_list_mod_data(mvc_dec_ctxt_t *ps_mvcd_ctxt)
164 {
165 return &ps_mvcd_ctxt->as_ref_pic_list_mod_data[ps_mvcd_ctxt->u2_num_views_decoded];
166 }
167
imvcd_get_valid_subset_sps(mvc_dec_ctxt_t * ps_mvcd_ctxt)168 subset_sps_t *imvcd_get_valid_subset_sps(mvc_dec_ctxt_t *ps_mvcd_ctxt)
169 {
170 if(0 != ps_mvcd_ctxt->u2_num_views_decoded)
171 {
172 dec_struct_t *ps_view_ctxt = &ps_mvcd_ctxt->s_view_dec_ctxt;
173
174 return ps_mvcd_ctxt
175 ->aps_pps_id_to_subset_sps_map[ps_view_ctxt->ps_cur_pps->u1_pic_parameter_set_id];
176 }
177 else
178 {
179 WORD32 i;
180
181 for(i = 0; i < MAX_NUM_SEQ_PARAMS; i++)
182 {
183 if(ps_mvcd_ctxt->as_subset_sps[i].s_sps_data.u1_is_valid)
184 {
185 return &ps_mvcd_ctxt->as_subset_sps[i];
186 }
187 }
188
189 return NULL;
190 }
191 }
192
imvcd_modulate_max_disp_seq(dec_struct_t * ps_view_ctxt)193 void imvcd_modulate_max_disp_seq(dec_struct_t *ps_view_ctxt)
194 {
195 WORD64 i8_temp;
196
197 i8_temp = ((WORD64) ps_view_ctxt->i4_prev_max_display_seq) +
198 ((WORD64) ps_view_ctxt->i4_max_poc) +
199 ((WORD64) ps_view_ctxt->u1_max_dec_frame_buffering) + 1ll;
200
201 ps_view_ctxt->i4_prev_max_display_seq = IS_OUT_OF_RANGE_S32(i8_temp) ? 0 : ((WORD32) i8_temp);
202 ps_view_ctxt->i4_max_poc = 0;
203 }
204
imvcd_get_default_mv_pred(void)205 mv_pred_t imvcd_get_default_mv_pred(void)
206 {
207 mv_pred_t s_mv_pred = {.i2_mv = {0},
208 .i1_ref_frame = {OUT_OF_RANGE_REF, OUT_OF_RANGE_REF},
209 .u1_col_ref_pic_idx = UINT8_MAX,
210 .u1_pic_type = UINT8_MAX};
211
212 return s_mv_pred;
213 }
214
imvcd_get_max_num_ivp_refs(mvc_dec_ctxt_t * ps_mvcd_ctxt)215 UWORD32 imvcd_get_max_num_ivp_refs(mvc_dec_ctxt_t *ps_mvcd_ctxt)
216 {
217 WORD32 i;
218
219 subset_sps_t *ps_subset_sps = imvcd_get_valid_subset_sps(ps_mvcd_ctxt);
220
221 UWORD32 u4_max_ivp_refs = 0;
222
223 if(!ps_subset_sps)
224 {
225 return u4_max_ivp_refs;
226 }
227
228 for(i = 0; i < ps_subset_sps->s_sps_mvc_ext.u2_num_views; i++)
229 {
230 u4_max_ivp_refs = MAX(
231 u4_max_ivp_refs, ps_subset_sps->s_sps_mvc_ext.as_anchor_ref_data[0][i].u1_num_refs +
232 ps_subset_sps->s_sps_mvc_ext.as_anchor_ref_data[1][i].u1_num_refs);
233 u4_max_ivp_refs =
234 MAX(u4_max_ivp_refs,
235 ps_subset_sps->s_sps_mvc_ext.as_non_anchor_ref_data[0][i].u1_num_refs +
236 ps_subset_sps->s_sps_mvc_ext.as_non_anchor_ref_data[1][i].u1_num_refs);
237 }
238
239 return u4_max_ivp_refs;
240 }
241
imvcd_is_idr_au(mvc_dec_ctxt_t * ps_mvcd_ctxt)242 bool imvcd_is_idr_au(mvc_dec_ctxt_t *ps_mvcd_ctxt)
243 {
244 return (ps_mvcd_ctxt->u2_num_views_decoded > 1)
245 ? !ps_mvcd_ctxt->as_nalu_mvc_ext->u1_non_idr_flag
246 : (ps_mvcd_ctxt->ae_nalu_id[0] == SLICE_IDR);
247 }
248
imvcd_get_buf_pad_dims(bool b_is_chroma)249 coordinates_t imvcd_get_buf_pad_dims(bool b_is_chroma)
250 {
251 coordinates_t s_dims;
252
253 /* Vert pad is '4 * PAD_LEN_UV_V' to account for field Pics */
254 if(b_is_chroma)
255 {
256 s_dims.i4_abscissa = (PAD_LEN_UV_H * 4);
257 s_dims.i4_ordinate = (PAD_LEN_UV_V * 4);
258 }
259 else
260 {
261 s_dims.i4_abscissa = (PAD_LEN_Y_H * 2);
262 s_dims.i4_ordinate = (PAD_LEN_Y_V * 4);
263 }
264
265 return s_dims;
266 }
267
imvcd_get_ref_pic_pad_offset(WORD32 i4_stride,bool b_is_chroma)268 WORD32 imvcd_get_ref_pic_pad_offset(WORD32 i4_stride, bool b_is_chroma)
269 {
270 return !b_is_chroma ? (i4_stride * PAD_LEN_Y_V * 2 + PAD_LEN_Y_H)
271 : (i4_stride * PAD_LEN_UV_V * 2 + PAD_LEN_UV_H * 2);
272 }
273
imvcd_get_next_bits(dec_bit_stream_t * ps_bitstream)274 UWORD32 imvcd_get_next_bits(dec_bit_stream_t *ps_bitstream)
275 {
276 UWORD32 u4_next_word;
277
278 NEXTBITS(u4_next_word, ps_bitstream->u4_ofst, ps_bitstream->pu4_buffer, 32);
279
280 return u4_next_word;
281 }
282
imvcd_set_view_buf_id_to_buf_map(dec_struct_t * ps_view_ctxt)283 void imvcd_set_view_buf_id_to_buf_map(dec_struct_t *ps_view_ctxt)
284 {
285 WORD32 i, j;
286
287 memset(ps_view_ctxt->apv_buf_id_pic_buf_map, 0, sizeof(ps_view_ctxt->apv_buf_id_pic_buf_map));
288
289 for(i = 0; i < 2; i++)
290 {
291 for(j = 0; j < ps_view_ctxt->ps_cur_slice->u1_num_ref_idx_lx_active[i]; j++)
292 {
293 ps_view_ctxt
294 ->apv_buf_id_pic_buf_map[ps_view_ctxt->ps_ref_pic_buf_lx[i][j]->u1_pic_buf_id] =
295 (void *) ps_view_ctxt->ps_ref_pic_buf_lx[i][j];
296 }
297 }
298 }
299
imvcd_get_next_display_au_buf(mvc_dec_ctxt_t * ps_mvcd_ctxt)300 IV_API_CALL_STATUS_T imvcd_get_next_display_au_buf(mvc_dec_ctxt_t *ps_mvcd_ctxt)
301 {
302 mvc_au_buffer_t *ps_au_buf;
303
304 IV_API_CALL_STATUS_T e_retval = IV_FAIL;
305
306 UWORD32 i;
307 WORD32 i4_buf_id;
308
309 dec_struct_t *ps_view_ctxt = &ps_mvcd_ctxt->s_view_dec_ctxt;
310
311 ps_au_buf =
312 (mvc_au_buffer_t *) ih264_disp_mgr_get(&ps_mvcd_ctxt->s_mvc_disp_buf_mgr, &i4_buf_id);
313
314 ps_view_ctxt->i4_display_index = DEFAULT_POC;
315
316 if(ps_au_buf != NULL)
317 {
318 ps_view_ctxt->pv_disp_sei_params = &ps_au_buf->s_sei_pic;
319 ps_view_ctxt->i4_display_index = ps_au_buf->i4_poc;
320 ps_view_ctxt->u4_num_fld_in_frm += 2;
321 ps_view_ctxt->s_disp_op.u4_ts = ps_au_buf->u4_time_stamp;
322
323 e_retval = IV_SUCCESS;
324 }
325
326 if(ps_au_buf)
327 {
328 for(i = 0; i < ps_mvcd_ctxt->u2_num_views; i++)
329 {
330 yuv_buf_props_t *ps_src = &ps_au_buf->as_view_buffers[i];
331 yuv_buf_props_t *ps_dst = &ps_mvcd_ctxt->s_out_buffer.as_view_buf_props[i];
332
333 WORD32 i4_y_src_stride = ps_src->as_component_bufs[Y].i4_data_stride;
334 WORD32 i4_uv_src_stride = ps_src->as_component_bufs[UV].i4_data_stride;
335 UWORD8 *pu1_y_src = (UWORD8 *) ps_src->as_component_bufs[Y].pv_data;
336 UWORD8 *pu1_uv_src = (UWORD8 *) ps_src->as_component_bufs[UV].pv_data;
337
338 pu1_y_src += (0 == i) ? ps_view_ctxt->u2_crop_offset_y
339 : (ps_au_buf->as_disp_offsets[i].u2_left_offset +
340 ps_au_buf->as_disp_offsets[i].u2_top_offset * i4_y_src_stride);
341 pu1_uv_src +=
342 (0 == i) ? ps_view_ctxt->u2_crop_offset_uv
343 : (ps_au_buf->as_disp_offsets[i].u2_left_offset +
344 (ps_au_buf->as_disp_offsets[i].u2_top_offset * i4_uv_src_stride) / 2);
345
346 ps_dst->u2_width = ps_au_buf->u2_disp_width;
347 ps_dst->u2_height = ps_au_buf->u2_disp_height;
348
349 ASSERT(ps_dst->as_component_bufs[U].i4_data_stride ==
350 ps_dst->as_component_bufs[V].i4_data_stride);
351
352 ih264d_fmt_conv_420sp_to_420p(
353 pu1_y_src, pu1_uv_src, (UWORD8 *) ps_dst->as_component_bufs[Y].pv_data,
354 (UWORD8 *) ps_dst->as_component_bufs[U].pv_data,
355 (UWORD8 *) ps_dst->as_component_bufs[V].pv_data, ps_dst->u2_width,
356 ps_dst->u2_height, i4_y_src_stride, i4_uv_src_stride,
357 ps_dst->as_component_bufs[Y].i4_data_stride,
358 ps_dst->as_component_bufs[U].i4_data_stride, 1, 0);
359 }
360
361 ih264_buf_mgr_release(ps_mvcd_ctxt->s_mvc_au_buf_mgr.ps_buf_mgr_ctxt,
362 ps_au_buf->i4_pic_buf_id, BUF_MGR_IO);
363 }
364
365 return e_retval;
366 }
367
imvcd_get_num_mbs_in_level(UWORD8 u1_level_idc)368 UWORD32 imvcd_get_num_mbs_in_level(UWORD8 u1_level_idc)
369 {
370 switch(u1_level_idc)
371 {
372 case H264_LEVEL_1_0:
373 {
374 return MAX_MBS_LEVEL_10;
375 }
376 case H264_LEVEL_1_1:
377 {
378 return MAX_MBS_LEVEL_11;
379 }
380 case H264_LEVEL_1_2:
381 {
382 return MAX_MBS_LEVEL_12;
383 }
384 case H264_LEVEL_1_3:
385 {
386 return MAX_MBS_LEVEL_13;
387 }
388 case H264_LEVEL_2_0:
389 {
390 return MAX_MBS_LEVEL_20;
391 }
392 case H264_LEVEL_2_1:
393 {
394 return MAX_MBS_LEVEL_21;
395 }
396 case H264_LEVEL_2_2:
397 {
398 return MAX_MBS_LEVEL_22;
399 }
400 case H264_LEVEL_3_0:
401 {
402 return MAX_MBS_LEVEL_30;
403 }
404 case H264_LEVEL_3_1:
405 {
406 return MAX_MBS_LEVEL_31;
407 }
408 case H264_LEVEL_3_2:
409 {
410 return MAX_MBS_LEVEL_32;
411 }
412 case H264_LEVEL_4_0:
413 {
414 return MAX_MBS_LEVEL_40;
415 }
416 case H264_LEVEL_4_1:
417 {
418 return MAX_MBS_LEVEL_41;
419 }
420 case H264_LEVEL_4_2:
421 {
422 return MAX_MBS_LEVEL_42;
423 }
424 case H264_LEVEL_5_0:
425 {
426 return MAX_MBS_LEVEL_50;
427 }
428 case H264_LEVEL_5_1:
429 default:
430 {
431 return MAX_MBS_LEVEL_51;
432 }
433 }
434 }
435
imvcd_free_dynamic_bufs(mvc_dec_ctxt_t * ps_mvcd_ctxt)436 WORD16 imvcd_free_dynamic_bufs(mvc_dec_ctxt_t *ps_mvcd_ctxt)
437 {
438 dec_struct_t *ps_view_ctxt = &ps_mvcd_ctxt->s_view_dec_ctxt;
439
440 PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->ps_deblk_pic);
441 PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->pu1_dec_mb_map);
442 PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->pu1_recon_mb_map);
443 PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->pu2_slice_num_map);
444 PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->ps_dec_slice_buf);
445 PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->ps_frm_mb_info);
446 PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->pi2_coeff_data);
447 PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->ps_parse_mb_data);
448 PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->ps_parse_part_params);
449 PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->ps_deblk_top_mb);
450
451 if(ps_view_ctxt->p_ctxt_inc_mb_map)
452 {
453 ps_view_ctxt->p_ctxt_inc_mb_map -= 1;
454 PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->p_ctxt_inc_mb_map);
455 }
456
457 PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->ps_mv_p[0]);
458 PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->ps_mv_p[1]);
459 PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->ps_pred_pkd);
460 {
461 UWORD8 i;
462 for(i = 0; i < MV_SCRATCH_BUFS; i++)
463 {
464 PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->ps_mv_top_p[i]);
465 }
466 }
467
468 if(ps_view_ctxt->pu1_y_intra_pred_line)
469 {
470 ps_view_ctxt->pu1_y_intra_pred_line -= MB_SIZE;
471 }
472 PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->pu1_y_intra_pred_line);
473
474 if(ps_view_ctxt->pu1_u_intra_pred_line)
475 {
476 ps_view_ctxt->pu1_u_intra_pred_line -= MB_SIZE;
477 }
478 PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->pu1_u_intra_pred_line);
479
480 if(ps_view_ctxt->pu1_v_intra_pred_line)
481 {
482 ps_view_ctxt->pu1_v_intra_pred_line -= MB_SIZE;
483 }
484 PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->pu1_v_intra_pred_line);
485 PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->ps_nbr_mb_row);
486
487 PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_mvcd_ctxt->s_mvc_au_buf_mgr.pv_au_buf_base);
488 PS_DEC_ALIGNED_FREE(ps_view_ctxt,
489 ps_mvcd_ctxt->s_mvc_au_mv_pred_buf_mgr.pv_au_mv_pred_buf_base);
490
491 return OK;
492 }
493
imvcd_get_num_au_data_bufs(mvc_dec_ctxt_t * ps_mvcd_ctxt)494 static UWORD32 imvcd_get_num_au_data_bufs(mvc_dec_ctxt_t *ps_mvcd_ctxt)
495 {
496 dec_struct_t *ps_view_ctxt = &ps_mvcd_ctxt->s_view_dec_ctxt;
497
498 return ps_view_ctxt->u1_pic_bufs;
499 }
500
imvcd_get_num_elements_in_mv_pred_buf(UWORD32 u4_view_wd,UWORD32 u4_view_ht)501 static UWORD32 imvcd_get_num_elements_in_mv_pred_buf(UWORD32 u4_view_wd, UWORD32 u4_view_ht)
502 {
503 return (u4_view_wd * (u4_view_ht + PAD_MV_BANK_ROW)) / MB_SIZE;
504 }
505
imvcd_get_mv_pred_buf_padding_length(UWORD32 u4_view_wd)506 static UWORD32 imvcd_get_mv_pred_buf_padding_length(UWORD32 u4_view_wd)
507 {
508 return (u4_view_wd * OFFSET_MV_BANK_ROW) / MB_SIZE;
509 }
510
imvcd_get_au_mv_pred_buf_size(mvc_dec_ctxt_t * ps_mvcd_ctxt)511 static UWORD32 imvcd_get_au_mv_pred_buf_size(mvc_dec_ctxt_t *ps_mvcd_ctxt)
512 {
513 dec_struct_t *ps_view_ctxt = &ps_mvcd_ctxt->s_view_dec_ctxt;
514
515 UWORD32 u4_num_bufs = imvcd_get_num_au_data_bufs(ps_mvcd_ctxt);
516
517 UWORD32 u4_size = 0;
518
519 u4_size += sizeof(mvc_au_mv_pred_t);
520
521 u4_size +=
522 imvcd_get_num_elements_in_mv_pred_buf(ps_view_ctxt->u2_pic_wd, ps_view_ctxt->u2_pic_ht) *
523 (sizeof(mv_pred_t) + sizeof(UWORD8));
524
525 u4_size *= u4_num_bufs;
526 u4_size *= ps_mvcd_ctxt->u2_num_views;
527
528 return u4_size;
529 }
530
imvcd_get_au_buf_size(mvc_dec_ctxt_t * ps_mvcd_ctxt)531 static UWORD32 imvcd_get_au_buf_size(mvc_dec_ctxt_t *ps_mvcd_ctxt)
532 {
533 dec_struct_t *ps_view_ctxt = &ps_mvcd_ctxt->s_view_dec_ctxt;
534
535 UWORD32 u4_size = 0;
536 UWORD32 u4_num_bufs = imvcd_get_num_au_data_bufs(ps_mvcd_ctxt);
537
538 u4_size += sizeof(mvc_au_buffer_t);
539
540 /* All rvalues below incorporate both padding and pic dimensions */
541 u4_size += ALIGN64(ps_view_ctxt->u2_frm_wd_y * ps_view_ctxt->u2_frm_ht_y) * sizeof(UWORD8);
542 u4_size += ALIGN64(ps_view_ctxt->u2_frm_wd_uv * ps_view_ctxt->u2_frm_ht_uv) * sizeof(UWORD8);
543
544 u4_size *= ps_mvcd_ctxt->u2_num_views;
545 u4_size *= u4_num_bufs;
546
547 return u4_size;
548 }
549
imvcd_init_au_buffers(mvc_dec_ctxt_t * ps_mvcd_ctxt)550 WORD32 imvcd_init_au_buffers(mvc_dec_ctxt_t *ps_mvcd_ctxt)
551 {
552 UWORD32 i, j;
553 UWORD32 u4_luma_size, u4_chroma_size;
554 WORD32 i4_error_code;
555
556 dec_struct_t *ps_view_ctxt = &ps_mvcd_ctxt->s_view_dec_ctxt;
557
558 WORD64 i8_alloc_mem_size = imvcd_get_au_buf_size(ps_mvcd_ctxt);
559 UWORD8 *pu1_buf = (UWORD8 *) ps_mvcd_ctxt->s_mvc_au_buf_mgr.pv_au_buf_base;
560 UWORD32 u4_num_bufs = imvcd_get_num_au_data_bufs(ps_mvcd_ctxt);
561
562 if(ps_mvcd_ctxt->u2_num_views > MAX_NUM_VIEWS)
563 {
564 ps_view_ctxt->i4_error_code = ERROR_BUF_MGR;
565 return ERROR_BUF_MGR;
566 }
567
568 u4_luma_size = ps_view_ctxt->u2_frm_wd_y * ps_view_ctxt->u2_frm_ht_y;
569 u4_chroma_size = ps_view_ctxt->u2_frm_wd_uv * ps_view_ctxt->u2_frm_ht_uv;
570
571 for(i = 0; i < u4_num_bufs; i++)
572 {
573 WORD32 i4_stride;
574
575 mvc_au_buffer_t *ps_au_buf = (mvc_au_buffer_t *) pu1_buf;
576
577 pu1_buf += sizeof(ps_au_buf[0]);
578
579 for(j = 0; j < ps_mvcd_ctxt->u2_num_views; j++)
580 {
581 i4_stride = ps_view_ctxt->u2_frm_wd_y;
582 ps_au_buf->as_view_buffers[j].as_component_bufs[Y].i4_data_stride = i4_stride;
583 ps_au_buf->as_view_buffers[j].as_component_bufs[Y].pv_data =
584 pu1_buf + imvcd_get_ref_pic_pad_offset(i4_stride, false);
585 pu1_buf += ALIGN64(u4_luma_size) * sizeof(pu1_buf[0]);
586 i8_alloc_mem_size -= ALIGN64(u4_luma_size) * sizeof(pu1_buf[0]);
587
588 i4_stride = ps_view_ctxt->u2_frm_wd_uv;
589 ps_au_buf->as_view_buffers[j].as_component_bufs[UV].i4_data_stride = i4_stride;
590 ps_au_buf->as_view_buffers[j].as_component_bufs[UV].pv_data =
591 pu1_buf + imvcd_get_ref_pic_pad_offset(i4_stride, true);
592 pu1_buf += ALIGN64(u4_chroma_size) * sizeof(pu1_buf[0]);
593 i8_alloc_mem_size -= ALIGN64(u4_chroma_size) * sizeof(pu1_buf[0]);
594
595 ps_au_buf->as_view_buffers[j].as_component_bufs[V].pv_data = NULL;
596
597 ps_au_buf->as_view_buffers[j].u2_height =
598 ps_view_ctxt->ps_cur_sps->u2_frm_ht_in_mbs * MB_SIZE;
599 ps_au_buf->as_view_buffers[j].u2_width =
600 ps_view_ctxt->ps_cur_sps->u2_frm_wd_in_mbs * MB_SIZE;
601 ps_au_buf->as_view_buffers[j].u1_bit_depth = 8;
602
603 ASSERT(i8_alloc_mem_size >= 0);
604 }
605
606 ps_au_buf->i4_pic_buf_id = i;
607
608 i4_error_code =
609 ih264_buf_mgr_add(ps_mvcd_ctxt->s_mvc_au_buf_mgr.ps_buf_mgr_ctxt, ps_au_buf, i);
610
611 if(0 != i4_error_code)
612 {
613 ps_view_ctxt->i4_error_code = ERROR_BUF_MGR;
614
615 return ERROR_BUF_MGR;
616 }
617
618 ps_mvcd_ctxt->s_mvc_au_buf_mgr.aps_buf_id_to_au_buf_map[i] = ps_au_buf;
619 }
620
621 return OK;
622 }
623
imvcd_init_au_mv_pred_bufs(mvc_dec_ctxt_t * ps_mvcd_ctxt)624 WORD32 imvcd_init_au_mv_pred_bufs(mvc_dec_ctxt_t *ps_mvcd_ctxt)
625 {
626 UWORD32 i, j;
627 WORD32 buf_ret;
628
629 dec_struct_t *ps_view_ctxt = &ps_mvcd_ctxt->s_view_dec_ctxt;
630
631 UWORD32 u4_width = ps_view_ctxt->u2_pic_wd;
632 UWORD32 u4_height = ps_view_ctxt->u2_pic_ht;
633 UWORD32 u4_mode_info_buf_size = imvcd_get_num_elements_in_mv_pred_buf(u4_width, u4_height);
634 UWORD8 *pu1_buf = ps_mvcd_ctxt->s_mvc_au_mv_pred_buf_mgr.pv_au_mv_pred_buf_base;
635 WORD64 i8_alloc_mem_size = imvcd_get_au_mv_pred_buf_size(ps_mvcd_ctxt);
636 UWORD32 u4_num_bufs = imvcd_get_num_au_data_bufs(ps_mvcd_ctxt);
637
638 if(ps_mvcd_ctxt->u2_num_views > MAX_NUM_VIEWS)
639 {
640 return ERROR_BUF_MGR;
641 }
642
643 for(i = 0; i < u4_num_bufs; i++)
644 {
645 mvc_au_mv_pred_t *ps_au_mv_data = (mvc_au_mv_pred_t *) pu1_buf;
646
647 pu1_buf += sizeof(ps_au_mv_data[0]);
648
649 buf_ret = ih264_buf_mgr_add(ps_mvcd_ctxt->s_mvc_au_mv_pred_buf_mgr.ps_buf_mgr_ctxt,
650 ps_au_mv_data, i);
651
652 if(0 != buf_ret)
653 {
654 return ERROR_BUF_MGR;
655 }
656
657 for(j = 0; j < ps_mvcd_ctxt->u2_num_views; j++)
658 {
659 UWORD32 u4_mv_buf_size = u4_mode_info_buf_size * sizeof(ps_au_mv_data->aps_mvs[j][0]);
660 UWORD32 u4_mode_desc_buf_size =
661 u4_mode_info_buf_size * sizeof(ps_au_mv_data->apu1_mode_descriptors[j][0]);
662
663 ps_au_mv_data->aps_mvs[j] = (mv_pred_t *) pu1_buf;
664 ps_au_mv_data->aps_mvs[j] += imvcd_get_mv_pred_buf_padding_length(u4_width);
665 pu1_buf += u4_mv_buf_size;
666 i8_alloc_mem_size -= u4_mv_buf_size;
667
668 ps_au_mv_data->apu1_mode_descriptors[j] = pu1_buf;
669 pu1_buf += u4_mode_desc_buf_size;
670 i8_alloc_mem_size -= u4_mode_desc_buf_size;
671
672 memset(ps_au_mv_data->aps_mvs[j] - imvcd_get_mv_pred_buf_padding_length(u4_width), 0,
673 u4_mv_buf_size);
674
675 memset(ps_au_mv_data->apu1_mode_descriptors[j], 0, u4_mode_desc_buf_size);
676
677 ASSERT(i8_alloc_mem_size >= 0);
678 }
679 }
680
681 return OK;
682 }
683
imvcd_allocate_dynamic_bufs(mvc_dec_ctxt_t * ps_mvcd_ctxt)684 WORD32 imvcd_allocate_dynamic_bufs(mvc_dec_ctxt_t *ps_mvcd_ctxt)
685 {
686 dec_struct_t *ps_view_ctxt = &ps_mvcd_ctxt->s_view_dec_ctxt;
687 dec_seq_params_t *ps_sps = ps_view_ctxt->ps_cur_sps;
688
689 UWORD32 u4_total_mbs = ps_sps->u2_total_num_of_mbs;
690 UWORD32 u4_wd_mbs = ps_view_ctxt->u2_frm_wd_in_mbs;
691 UWORD32 u4_ht_mbs = ps_view_ctxt->u2_frm_ht_in_mbs;
692 const WORD32 i4_default_alignment = 128;
693 void *pv_mem_ctxt = ps_view_ctxt->pv_mem_ctxt;
694
695 UWORD8 *pu1_buf;
696 WORD32 i4_mem_size;
697 WORD32 i;
698 void *pv_buf;
699 WORD32 i4_num_entries;
700
701 if(ps_mvcd_ctxt->u2_num_views > MAX_NUM_VIEWS)
702 {
703 return IV_FAIL;
704 }
705
706 i4_mem_size = u4_total_mbs * sizeof(ps_view_ctxt->pu1_dec_mb_map[0]);
707 pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
708 RETURN_IF((NULL == pv_buf), IV_FAIL);
709 memset(pv_buf, 0, i4_mem_size);
710 ps_view_ctxt->pu1_dec_mb_map = pv_buf;
711
712 i4_mem_size = u4_total_mbs * sizeof(ps_view_ctxt->pu1_recon_mb_map[0]);
713 pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
714 RETURN_IF((NULL == pv_buf), IV_FAIL);
715 memset(pv_buf, 0, i4_mem_size);
716 ps_view_ctxt->pu1_recon_mb_map = pv_buf;
717
718 i4_mem_size = u4_total_mbs * sizeof(ps_view_ctxt->pu2_slice_num_map[0]);
719 pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
720 RETURN_IF((NULL == pv_buf), IV_FAIL);
721 memset(pv_buf, 0, i4_mem_size);
722 ps_view_ctxt->pu2_slice_num_map = pv_buf;
723
724 ps_view_ctxt->ps_parse_cur_slice = ps_view_ctxt->ps_dec_slice_buf;
725 ps_view_ctxt->ps_decode_cur_slice = ps_view_ctxt->ps_dec_slice_buf;
726 ps_view_ctxt->ps_computebs_cur_slice = ps_view_ctxt->ps_dec_slice_buf;
727 ps_view_ctxt->ps_pred_start = ps_view_ctxt->ps_pred;
728
729 i4_mem_size = sizeof(parse_pmbarams_t) * (ps_view_ctxt->u1_recon_mb_grp);
730 pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
731 RETURN_IF((NULL == pv_buf), IV_FAIL);
732 memset(pv_buf, 0, i4_mem_size);
733 ps_view_ctxt->ps_parse_mb_data = pv_buf;
734
735 i4_mem_size = sizeof(parse_part_params_t) * ((ps_view_ctxt->u1_recon_mb_grp) << 4);
736 pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
737 RETURN_IF((NULL == pv_buf), IV_FAIL);
738 memset(pv_buf, 0, i4_mem_size);
739 ps_view_ctxt->ps_parse_part_params = pv_buf;
740
741 i4_mem_size = (u4_wd_mbs * sizeof(deblkmb_neighbour_t));
742 pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
743 RETURN_IF((NULL == pv_buf), IV_FAIL);
744 memset(pv_buf, 0, i4_mem_size);
745 ps_view_ctxt->ps_deblk_top_mb = pv_buf;
746
747 i4_mem_size = sizeof(ctxt_inc_mb_info_t) * (u4_wd_mbs + 2);
748 pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
749 RETURN_IF((NULL == pv_buf), IV_FAIL);
750 memset(pv_buf, 0, i4_mem_size);
751 ps_view_ctxt->p_ctxt_inc_mb_map = pv_buf;
752 /* 0th entry of CtxtIncMbMap will be always be containing default values
753 for CABAC context representing MB not available */
754 ps_view_ctxt->p_ctxt_inc_mb_map += 1;
755
756 i4_mem_size = sizeof(mv_pred_t) * ps_view_ctxt->u1_recon_mb_grp * 16;
757 pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
758 RETURN_IF((NULL == pv_buf), IV_FAIL);
759 memset(pv_buf, 0, i4_mem_size);
760 ps_view_ctxt->ps_mv_p[0] = pv_buf;
761
762 i4_mem_size = sizeof(mv_pred_t) * ps_view_ctxt->u1_recon_mb_grp * 16;
763 pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
764 RETURN_IF((NULL == pv_buf), IV_FAIL);
765 memset(pv_buf, 0, i4_mem_size);
766 ps_view_ctxt->ps_mv_p[1] = pv_buf;
767
768 for(i = 0; i < MV_SCRATCH_BUFS; i++)
769 {
770 i4_mem_size = (sizeof(mv_pred_t) * ps_view_ctxt->u1_recon_mb_grp * 4);
771 pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
772 RETURN_IF((NULL == pv_buf), IV_FAIL);
773 memset(pv_buf, 0, i4_mem_size);
774 ps_view_ctxt->ps_mv_top_p[i] = pv_buf;
775 }
776
777 i4_mem_size = sizeof(UWORD8) * ((u4_wd_mbs + 2) * MB_SIZE) * 2;
778 pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
779 RETURN_IF((NULL == pv_buf), IV_FAIL);
780 ps_view_ctxt->pu1_y_intra_pred_line = pv_buf;
781 memset(ps_view_ctxt->pu1_y_intra_pred_line, 0, i4_mem_size);
782 ps_view_ctxt->pu1_y_intra_pred_line += MB_SIZE;
783
784 i4_mem_size = sizeof(UWORD8) * ((u4_wd_mbs + 2) * MB_SIZE) * 2;
785 pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
786 RETURN_IF((NULL == pv_buf), IV_FAIL);
787 ps_view_ctxt->pu1_u_intra_pred_line = pv_buf;
788 memset(ps_view_ctxt->pu1_u_intra_pred_line, 0, i4_mem_size);
789 ps_view_ctxt->pu1_u_intra_pred_line += MB_SIZE;
790
791 i4_mem_size = sizeof(UWORD8) * ((u4_wd_mbs + 2) * MB_SIZE) * 2;
792 pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
793 RETURN_IF((NULL == pv_buf), IV_FAIL);
794 ps_view_ctxt->pu1_v_intra_pred_line = pv_buf;
795 memset(ps_view_ctxt->pu1_v_intra_pred_line, 0, i4_mem_size);
796 ps_view_ctxt->pu1_v_intra_pred_line += MB_SIZE;
797
798 if(ps_view_ctxt->u1_separate_parse)
799 {
800 /* Needs one extra row of info, to hold top row data */
801 i4_mem_size = sizeof(mb_neigbour_params_t) * 2 * ((u4_wd_mbs + 2) * (u4_ht_mbs + 1));
802 }
803 else
804 {
805 i4_mem_size = sizeof(mb_neigbour_params_t) * 2 * (u4_wd_mbs + 2);
806 }
807
808 pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
809 RETURN_IF((NULL == pv_buf), IV_FAIL);
810
811 ps_view_ctxt->ps_nbr_mb_row = pv_buf;
812 memset(ps_view_ctxt->ps_nbr_mb_row, 0, i4_mem_size);
813
814 i4_mem_size = (u4_total_mbs + u4_wd_mbs) * sizeof(deblk_mb_t);
815 pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
816 RETURN_IF((NULL == pv_buf), IV_FAIL);
817 ps_view_ctxt->ps_deblk_pic = pv_buf;
818 memset(ps_view_ctxt->ps_deblk_pic, 0, i4_mem_size);
819
820 i4_mem_size = sizeof(dec_mb_info_t) * u4_total_mbs;
821 pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
822 RETURN_IF((NULL == pv_buf), IV_FAIL);
823 ps_view_ctxt->ps_frm_mb_info = pv_buf;
824 memset(ps_view_ctxt->ps_frm_mb_info, 0, i4_mem_size);
825
826 if((1 >= ps_view_ctxt->ps_cur_sps->u1_num_ref_frames) && (0 == ps_view_ctxt->i4_display_delay))
827 {
828 i4_num_entries = 1;
829 }
830 else
831 {
832 i4_num_entries = MAX_FRAMES;
833 }
834
835 i4_num_entries = (2 * i4_num_entries) + 1;
836 i4_num_entries *= 2;
837
838 i4_mem_size = i4_num_entries * sizeof(void *);
839 i4_mem_size += PAD_MAP_IDX_POC * sizeof(void *);
840 i4_mem_size *= u4_total_mbs;
841 i4_mem_size += sizeof(dec_slice_struct_t) * u4_total_mbs;
842 pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
843 RETURN_IF((NULL == pv_buf), IV_FAIL);
844
845 ps_view_ctxt->ps_dec_slice_buf = pv_buf;
846 memset(ps_view_ctxt->ps_dec_slice_buf, 0, i4_mem_size);
847 pu1_buf = (UWORD8 *) ps_view_ctxt->ps_dec_slice_buf;
848 pu1_buf += sizeof(dec_slice_struct_t) * u4_total_mbs;
849 ps_view_ctxt->pv_map_ref_idx_to_poc_buf = (void *) pu1_buf;
850
851 /* Allocate memory for packed pred info */
852 i4_num_entries = u4_total_mbs;
853 i4_num_entries *= 16 * 2;
854
855 i4_mem_size = sizeof(pred_info_pkd_t) * i4_num_entries;
856 pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
857 RETURN_IF((NULL == pv_buf), IV_FAIL);
858 memset(pv_buf, 0, i4_mem_size);
859 ps_view_ctxt->ps_pred_pkd = pv_buf;
860
861 /* Allocate memory for coeff data */
862 i4_mem_size = MB_LUM_SIZE * sizeof(WORD16);
863 /*For I16x16 MBs, 16 4x4 AC coeffs and 1 4x4 DC coeff TU blocks will be sent
864 For all MBs along with 8 4x4 AC coeffs 2 2x2 DC coeff TU blocks will be sent
865 So use 17 4x4 TU blocks for luma and 9 4x4 TU blocks for chroma */
866 i4_mem_size += u4_total_mbs *
867 (MAX(17 * sizeof(tu_sblk4x4_coeff_data_t), 4 * sizeof(tu_blk8x8_coeff_data_t)) +
868 9 * sizeof(tu_sblk4x4_coeff_data_t));
869 // 32 bytes for each mb to store u1_prev_intra4x4_pred_mode and
870 // u1_rem_intra4x4_pred_mode data
871 i4_mem_size += u4_total_mbs * 32;
872 pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
873 RETURN_IF((NULL == pv_buf), IV_FAIL);
874 memset(pv_buf, 0, i4_mem_size);
875
876 ps_view_ctxt->pi2_coeff_data = pv_buf;
877
878 ps_view_ctxt->pv_pic_tu_coeff_data = (void *) (ps_view_ctxt->pi2_coeff_data + MB_LUM_SIZE);
879
880 i4_mem_size = imvcd_get_au_mv_pred_buf_size(ps_mvcd_ctxt);
881 pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
882 RETURN_IF((NULL == pv_buf), IV_FAIL);
883 memset(pv_buf, 0, i4_mem_size);
884 ps_mvcd_ctxt->s_mvc_au_mv_pred_buf_mgr.pv_au_mv_pred_buf_base = pv_buf;
885
886 i4_mem_size = imvcd_get_au_buf_size(ps_mvcd_ctxt);
887 pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
888 RETURN_IF((NULL == pv_buf), IV_FAIL);
889 memset(pv_buf, 0, i4_mem_size);
890 ps_mvcd_ctxt->s_mvc_au_buf_mgr.pv_au_buf_base = pv_buf;
891
892 /***************************************************************************/
893 /*Initialize cabac context pointers for every SE that has fixed contextIdx */
894 /***************************************************************************/
895 {
896 bin_ctxt_model_t *const p_cabac_ctxt_table_t = ps_view_ctxt->p_cabac_ctxt_table_t;
897 bin_ctxt_model_t **p_coeff_abs_level_minus1_t = ps_view_ctxt->p_coeff_abs_level_minus1_t;
898 bin_ctxt_model_t **p_cbf_t = ps_view_ctxt->p_cbf_t;
899
900 ps_view_ctxt->p_mb_field_dec_flag_t = p_cabac_ctxt_table_t + MB_FIELD_DECODING_FLAG;
901 ps_view_ctxt->p_prev_intra4x4_pred_mode_flag_t =
902 p_cabac_ctxt_table_t + PREV_INTRA4X4_PRED_MODE_FLAG;
903 ps_view_ctxt->p_rem_intra4x4_pred_mode_t = p_cabac_ctxt_table_t + REM_INTRA4X4_PRED_MODE;
904 ps_view_ctxt->p_intra_chroma_pred_mode_t = p_cabac_ctxt_table_t + INTRA_CHROMA_PRED_MODE;
905 ps_view_ctxt->p_mb_qp_delta_t = p_cabac_ctxt_table_t + MB_QP_DELTA;
906 ps_view_ctxt->p_ref_idx_t = p_cabac_ctxt_table_t + REF_IDX;
907 ps_view_ctxt->p_mvd_x_t = p_cabac_ctxt_table_t + MVD_X;
908 ps_view_ctxt->p_mvd_y_t = p_cabac_ctxt_table_t + MVD_Y;
909 p_cbf_t[0] = p_cabac_ctxt_table_t + CBF + 0;
910 p_cbf_t[1] = p_cabac_ctxt_table_t + CBF + 4;
911 p_cbf_t[2] = p_cabac_ctxt_table_t + CBF + 8;
912 p_cbf_t[3] = p_cabac_ctxt_table_t + CBF + 12;
913 p_cbf_t[4] = p_cabac_ctxt_table_t + CBF + 16;
914 ps_view_ctxt->p_cbp_luma_t = p_cabac_ctxt_table_t + CBP_LUMA;
915 ps_view_ctxt->p_cbp_chroma_t = p_cabac_ctxt_table_t + CBP_CHROMA;
916
917 p_coeff_abs_level_minus1_t[LUMA_DC_CTXCAT] =
918 p_cabac_ctxt_table_t + COEFF_ABS_LEVEL_MINUS1 + COEFF_ABS_LEVEL_CAT_0_OFFSET;
919
920 p_coeff_abs_level_minus1_t[LUMA_AC_CTXCAT] =
921 p_cabac_ctxt_table_t + COEFF_ABS_LEVEL_MINUS1 + COEFF_ABS_LEVEL_CAT_1_OFFSET;
922
923 p_coeff_abs_level_minus1_t[LUMA_4X4_CTXCAT] =
924 p_cabac_ctxt_table_t + COEFF_ABS_LEVEL_MINUS1 + COEFF_ABS_LEVEL_CAT_2_OFFSET;
925
926 p_coeff_abs_level_minus1_t[CHROMA_DC_CTXCAT] =
927 p_cabac_ctxt_table_t + COEFF_ABS_LEVEL_MINUS1 + COEFF_ABS_LEVEL_CAT_3_OFFSET;
928
929 p_coeff_abs_level_minus1_t[CHROMA_AC_CTXCAT] =
930 p_cabac_ctxt_table_t + COEFF_ABS_LEVEL_MINUS1 + COEFF_ABS_LEVEL_CAT_4_OFFSET;
931
932 p_coeff_abs_level_minus1_t[LUMA_8X8_CTXCAT] =
933 p_cabac_ctxt_table_t + COEFF_ABS_LEVEL_MINUS1_8X8 + COEFF_ABS_LEVEL_CAT_5_OFFSET;
934
935 /********************************************************/
936 /* context for the high profile related syntax elements */
937 /* This is maintained seperately in s_high_profile */
938 /********************************************************/
939 {
940 ps_view_ctxt->s_high_profile.ps_transform8x8_flag =
941 p_cabac_ctxt_table_t + TRANSFORM_SIZE_8X8_FLAG;
942
943 ps_view_ctxt->s_high_profile.ps_sigcoeff_8x8_frame =
944 p_cabac_ctxt_table_t + SIGNIFICANT_COEFF_FLAG_8X8_FRAME;
945
946 ps_view_ctxt->s_high_profile.ps_last_sigcoeff_8x8_frame =
947 p_cabac_ctxt_table_t + LAST_SIGNIFICANT_COEFF_FLAG_8X8_FRAME;
948
949 ps_view_ctxt->s_high_profile.ps_coeff_abs_levelminus1 =
950 p_cabac_ctxt_table_t + COEFF_ABS_LEVEL_MINUS1_8X8;
951
952 ps_view_ctxt->s_high_profile.ps_sigcoeff_8x8_field =
953 p_cabac_ctxt_table_t + SIGNIFICANT_COEFF_FLAG_8X8_FIELD;
954
955 ps_view_ctxt->s_high_profile.ps_last_sigcoeff_8x8_field =
956 p_cabac_ctxt_table_t + LAST_SIGNIFICANT_COEFF_FLAG_8X8_FIELD;
957 }
958 }
959
960 return OK;
961 }
962
imvcd_convert_au_buf_to_view_buf(mvc_au_buffer_t * ps_au_buf,pic_buffer_t * ps_view_buf,UWORD16 u2_view_order_id,UWORD16 u2_view_id)963 void imvcd_convert_au_buf_to_view_buf(mvc_au_buffer_t *ps_au_buf, pic_buffer_t *ps_view_buf,
964 UWORD16 u2_view_order_id, UWORD16 u2_view_id)
965 {
966 yuv_buf_props_t *ps_view_buffer = &ps_au_buf->as_view_buffers[u2_view_id];
967 offsets_t *ps_disp_offsets = &ps_au_buf->as_disp_offsets[u2_view_id];
968 mvc_au_mv_pred_t *ps_au_mv_data = ps_au_buf->ps_au_mv_data;
969
970 ps_view_buf->pu1_buf1 = ps_view_buffer->as_component_bufs[Y].pv_data;
971 ps_view_buf->pu1_buf2 = ps_view_buffer->as_component_bufs[UV].pv_data;
972 ps_view_buf->pu1_buf3 = NULL;
973 ps_view_buf->u2_frm_wd_y = ps_view_buffer->as_component_bufs[Y].i4_data_stride;
974 ps_view_buf->u2_frm_wd_uv = ps_view_buffer->as_component_bufs[UV].i4_data_stride;
975 ps_view_buf->pu1_buf3 = NULL;
976
977 ps_view_buf->u2_disp_width = ps_au_buf->u2_disp_width;
978 ps_view_buf->u2_disp_height = ps_au_buf->u2_disp_height;
979 ps_view_buf->u2_frm_ht_y = ps_view_buffer->u2_height;
980 ps_view_buf->u2_frm_ht_uv = ps_view_buffer->u2_height / 2;
981
982 ps_view_buf->u4_time_stamp = ps_au_buf->u4_time_stamp;
983 ps_view_buf->u4_ts = ps_au_buf->u4_time_stamp;
984
985 ps_view_buf->u2_crop_offset_y =
986 ps_disp_offsets->u2_left_offset + ps_disp_offsets->u2_top_offset * ps_view_buf->u2_frm_wd_y;
987 ps_view_buf->u2_crop_offset_uv =
988 ps_disp_offsets->u2_left_offset +
989 (ps_disp_offsets->u2_top_offset / 2) * ps_view_buf->u2_frm_wd_uv;
990
991 ps_view_buf->i4_poc = ps_au_buf->i4_poc;
992 ps_view_buf->i4_pic_num = ps_au_buf->i4_frame_num;
993 ps_view_buf->i4_frame_num = ps_au_buf->i4_frame_num;
994 ps_view_buf->i4_avg_poc = ps_au_buf->i4_poc;
995 ps_view_buf->u1_is_short = ps_au_buf->b_is_short_term_ref;
996 ps_view_buf->u1_pic_type = ps_au_buf->u1_pic_type;
997 ps_view_buf->i4_top_field_order_cnt = ps_au_buf->i4_poc;
998 ps_view_buf->i4_bottom_field_order_cnt = ps_au_buf->i4_poc;
999 ps_view_buf->u1_picturetype = FRM_PIC;
1000 ps_view_buf->u1_long_term_frm_idx = ps_au_buf->u1_long_term_frm_idx;
1001 ps_view_buf->u1_long_term_pic_num = ps_au_buf->u1_long_term_pic_num;
1002 ps_view_buf->u4_pack_slc_typ = ps_au_buf->au4_pack_slc_typ[u2_view_order_id];
1003 ps_view_buf->u1_pic_struct = ps_au_buf->u1_pic_struct;
1004 ps_view_buf->s_sei_pic = ps_au_buf->s_sei_pic;
1005
1006 ps_view_buf->u1_pic_buf_id = ps_au_buf->i4_pic_buf_id;
1007 ps_view_buf->u1_mv_buf_id = ps_au_buf->i4_mv_buf_id;
1008
1009 ps_view_buf->pu1_col_zero_flag = ps_au_mv_data->apu1_mode_descriptors[u2_view_id];
1010 ps_view_buf->ps_mv = ps_au_mv_data->aps_mvs[u2_view_id];
1011 }
1012
imvcd_init_ref_idx_to_ref_buf_map(mvc_dec_ctxt_t * ps_mvcd_ctxt)1013 void imvcd_init_ref_idx_to_ref_buf_map(mvc_dec_ctxt_t *ps_mvcd_ctxt)
1014 {
1015 pic_buffer_t *ps_pic;
1016
1017 void **ppv_map_ref_idx_to_poc_lx;
1018 WORD8 i, j;
1019
1020 dec_struct_t *ps_view_ctxt = &ps_mvcd_ctxt->s_view_dec_ctxt;
1021
1022 bool b_is_b_pic = !!(
1023 ps_mvcd_ctxt->ps_cur_au->au4_pack_slc_typ[ps_mvcd_ctxt->u2_num_views_decoded] & B_SLC_BIT);
1024
1025 for(i = 0; i < 1 + ((WORD32) b_is_b_pic); i++)
1026 {
1027 ppv_map_ref_idx_to_poc_lx =
1028 ps_view_ctxt->ppv_map_ref_idx_to_poc + ((0 == i) ? FRM_LIST_L0 : FRM_LIST_L1);
1029 ppv_map_ref_idx_to_poc_lx[0] = NULL;
1030 ppv_map_ref_idx_to_poc_lx++;
1031
1032 for(j = 0; j < ps_view_ctxt->ps_cur_slice->u1_num_ref_idx_lx_active[i]; j++)
1033 {
1034 ps_pic = ps_view_ctxt->ps_ref_pic_buf_lx[i][j];
1035
1036 ppv_map_ref_idx_to_poc_lx[j] = ps_pic->pu1_buf1;
1037 }
1038 }
1039
1040 if(!b_is_b_pic)
1041 {
1042 ppv_map_ref_idx_to_poc_lx = ps_view_ctxt->ppv_map_ref_idx_to_poc + FRM_LIST_L1;
1043 ppv_map_ref_idx_to_poc_lx[0] = NULL;
1044 }
1045
1046 if(ps_view_ctxt->u4_num_cores >= 3)
1047 {
1048 WORD32 i4_size;
1049
1050 WORD32 i4_num_entries = MAX_FRAMES;
1051
1052 if((1 >= ps_view_ctxt->ps_cur_sps->u1_num_ref_frames) &&
1053 (0 == ps_view_ctxt->i4_display_delay))
1054 {
1055 i4_num_entries = 1;
1056 }
1057
1058 i4_num_entries = 2 * i4_num_entries + 1;
1059 i4_num_entries *= 2;
1060
1061 i4_size = i4_num_entries * sizeof(void *);
1062 i4_size += PAD_MAP_IDX_POC * sizeof(void *);
1063
1064 memcpy(ps_view_ctxt->ps_parse_cur_slice->ppv_map_ref_idx_to_poc,
1065 ps_view_ctxt->ppv_map_ref_idx_to_poc, i4_size);
1066 }
1067 }
1068
imvcd_ivp_buf_copier(mvc_au_buffer_t * ps_au_buf_src,mvc_au_buffer_t * ps_au_buf_dst,mvc_au_mv_pred_t * ps_au_mv_data_src,mvc_au_mv_pred_t * ps_au_mv_data_dst,UWORD16 u2_src_view_id,UWORD16 u2_dst_view_id)1069 void imvcd_ivp_buf_copier(mvc_au_buffer_t *ps_au_buf_src, mvc_au_buffer_t *ps_au_buf_dst,
1070 mvc_au_mv_pred_t *ps_au_mv_data_src, mvc_au_mv_pred_t *ps_au_mv_data_dst,
1071 UWORD16 u2_src_view_id, UWORD16 u2_dst_view_id)
1072 {
1073 UWORD32 i, j;
1074
1075 mv_pred_t *ps_mode_info_src = ps_au_mv_data_src->aps_mvs[u2_src_view_id];
1076 mv_pred_t *ps_mode_info_dst = ps_au_mv_data_dst->aps_mvs[u2_dst_view_id];
1077
1078 UWORD32 u4_view_wd = ps_au_buf_src->as_view_buffers[u2_src_view_id].u2_width;
1079 UWORD32 u4_view_ht = ps_au_buf_src->as_view_buffers[u2_src_view_id].u2_height;
1080 UWORD32 u4_mode_info_buf_size = imvcd_get_num_elements_in_mv_pred_buf(u4_view_wd, u4_view_ht);
1081 UWORD32 u4_mode_info_pad_size = imvcd_get_mv_pred_buf_padding_length(u4_view_wd);
1082
1083 ps_mode_info_src -= u4_mode_info_pad_size;
1084 ps_mode_info_dst -= u4_mode_info_pad_size;
1085
1086 ps_au_buf_dst->ps_au_mv_data = ps_au_mv_data_dst;
1087
1088 ps_au_buf_dst->as_disp_offsets[u2_dst_view_id] = ps_au_buf_src->as_disp_offsets[u2_src_view_id];
1089
1090 for(i = 0; i < NUM_SP_COMPONENTS; i++)
1091 {
1092 bool b_is_chroma = ((COMPONENT_TYPES_T) i) != Y;
1093
1094 coordinates_t s_pad_dims = imvcd_get_buf_pad_dims(b_is_chroma);
1095 buffer_container_t *ps_src =
1096 &ps_au_buf_src->as_view_buffers[u2_src_view_id].as_component_bufs[i];
1097 buffer_container_t *ps_dst =
1098 &ps_au_buf_dst->as_view_buffers[u2_dst_view_id].as_component_bufs[i];
1099
1100 WORD32 i4_src_pad_offset =
1101 imvcd_get_ref_pic_pad_offset(ps_src->i4_data_stride, b_is_chroma);
1102 WORD32 i4_dst_pad_offset =
1103 imvcd_get_ref_pic_pad_offset(ps_dst->i4_data_stride, b_is_chroma);
1104
1105 for(j = 0; j < ((u4_view_ht >> b_is_chroma) + s_pad_dims.i4_ordinate); j++)
1106 {
1107 UWORD8 *pu1_src =
1108 ((UWORD8 *) ps_src->pv_data) + j * ps_src->i4_data_stride - i4_src_pad_offset;
1109 UWORD8 *pu1_dst =
1110 ((UWORD8 *) ps_dst->pv_data) + j * ps_dst->i4_data_stride - i4_dst_pad_offset;
1111
1112 memcpy(pu1_dst, pu1_src, (u4_view_wd + s_pad_dims.i4_abscissa) * sizeof(pu1_dst[0]));
1113 }
1114 }
1115
1116 memcpy(ps_mode_info_dst, ps_mode_info_src, u4_mode_info_buf_size * sizeof(ps_mode_info_dst[0]));
1117
1118 for(i = 0; i < u4_mode_info_buf_size; i++)
1119 {
1120 /* In accordance with 'H.8.4' */
1121 ps_au_mv_data_dst->apu1_mode_descriptors[u2_dst_view_id][i] =
1122 ps_au_mv_data_src->apu1_mode_descriptors[u2_src_view_id][i] & 0xFE;
1123 }
1124
1125 ps_au_buf_dst->au4_pack_slc_typ[u2_dst_view_id] =
1126 ps_au_buf_src->au4_pack_slc_typ[u2_src_view_id];
1127 ps_au_buf_dst->b_is_short_term_ref = ps_au_buf_src->b_is_short_term_ref;
1128 ps_au_buf_dst->i4_avg_poc = ps_au_buf_src->i4_avg_poc;
1129 ps_au_buf_dst->i4_frame_num = ps_au_buf_src->i4_frame_num;
1130 ps_au_buf_dst->i4_pic_num = ps_au_buf_src->i4_pic_num;
1131 ps_au_buf_dst->i4_poc = ps_au_buf_src->i4_poc;
1132 ps_au_buf_dst->s_sei_pic = ps_au_buf_src->s_sei_pic;
1133 ps_au_buf_dst->u1_long_term_frm_idx = ps_au_buf_src->u1_long_term_frm_idx;
1134 ps_au_buf_dst->u1_long_term_pic_num = ps_au_buf_src->u1_long_term_pic_num;
1135 ps_au_buf_dst->u1_picturetype = ps_au_buf_src->u1_picturetype;
1136 ps_au_buf_dst->u1_pic_struct = ps_au_buf_src->u1_pic_struct;
1137 ps_au_buf_dst->u2_disp_height = ps_au_buf_src->u2_disp_height;
1138 ps_au_buf_dst->u2_disp_width = ps_au_buf_src->u2_disp_width;
1139 ps_au_buf_dst->u4_time_stamp = ps_au_buf_src->u4_time_stamp;
1140 }
1141