| /external/mesa3d/src/intel/compiler/ |
| D | brw_vec4_tcs.cpp | 160 const src_reg &indirect_offset) in emit_input_urb_read()
195 const src_reg &indirect_offset) in emit_output_urb_read()
222 const src_reg &indirect_offset) in emit_urb_write()
261 src_reg indirect_offset = get_indirect_offset(instr); in nir_emit_intrinsic() local
279 src_reg indirect_offset = get_indirect_offset(instr); in nir_emit_intrinsic() local
296 src_reg indirect_offset = get_indirect_offset(instr); in nir_emit_intrinsic() local
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| D | brw_vec4_tes.cpp | 160 src_reg indirect_offset = get_indirect_offset(instr); in nir_emit_intrinsic() local
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| D | brw_fs_nir.cpp | 2514 fs_reg indirect_offset = get_nir_src(offset_src); in emit_gs_input_load() local
2800 fs_reg indirect_offset = get_indirect_offset(instr); in nir_emit_tcs_intrinsic() local
2870 fs_reg indirect_offset = get_indirect_offset(instr); in nir_emit_tcs_intrinsic() local
2935 fs_reg indirect_offset = get_indirect_offset(instr); in nir_emit_tcs_intrinsic() local
3020 fs_reg indirect_offset = get_indirect_offset(instr); in nir_emit_tes_intrinsic() local
3114 fs_reg indirect_offset; in nir_emit_gs_intrinsic() local
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| D | brw_reg.h | 235 int indirect_offset:10; /* relative addressing offset */ member
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| /external/mesa3d/src/mesa/state_tracker/ |
| D | st_cb_compute.c | 42 GLintptr indirect_offset) in st_dispatch_compute_common()
80 GLintptr indirect_offset) in st_dispatch_compute_indirect()
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| D | st_draw.c | 267 GLsizeiptr indirect_offset, in st_indirect_draw_vbo()
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| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | brw_draw.c | 167 GLsizeiptr indirect_offset) in brw_emit_prim()
993 GLsizeiptr indirect_offset) in brw_draw_single_prim()
1238 GLsizeiptr indirect_offset, in brw_draw_indirect_prims()
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| D | genX_state_upload.c | 4435 GLintptr indirect_offset = brw->compute.num_work_groups_offset; local
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| /external/mesa3d/src/mesa/vbo/ |
| D | vbo_primitive_restart.c | 169 GLsizeiptr indirect_offset) in vbo_sw_primitive_restart()
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| /external/mesa3d/src/panfrost/midgard/ |
| D | midgard_compile.c | 1068 nir_src *indirect_offset, in emit_ubo_read()
1193 nir_src *indirect_offset, nir_alu_type type, bool flat) in emit_varying_read()
1520 nir_src *indirect_offset = direct ? NULL : src_offset; in emit_intrinsic() local
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| /external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
| D | ir3_const.h | 587 unsigned indirect_offset; in ir3_emit_cs_consts() local
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| /external/igt-gpu-tools/assembler/ |
| D | brw_reg.h | 129 int indirect_offset:10; /* relative addressing offset */ member
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| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| D | lp_bld_nir_soa.c | 669 LLVMValueRef indirect_offset = get_soa_array_offsets(uint_bld, indirect_val, nc, i, TRUE); in emit_load_reg() local
706 LLVMValueRef indirect_offset = get_soa_array_offsets(uint_bld, indirect_val, nc, i, TRUE); in emit_store_reg() local
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| /external/mesa3d/src/gallium/drivers/vc4/ |
| D | vc4_program.c | 95 struct qreg indirect_offset = ntq_get_src(c, intr->src[0], 0); in indirect_uniform_load() local
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| /external/virglrenderer/src/ |
| D | vrend_decode.c | 1313 uint32_t indirect_handle, indirect_offset; in vrend_decode_launch_grid() local
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| D | vrend_renderer.c | 5744 uint32_t indirect_offset) in vrend_launch_grid()
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| /external/mesa3d/src/gallium/include/pipe/ |
| D | p_state.h | 895 unsigned indirect_offset; /**< must be 4 byte aligned */ member
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_cmd_buffer.c | 3019 uint64_t indirect_offset; member
5593 uint64_t indirect_offset; member
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| /external/mesa3d/src/freedreno/vulkan/ |
| D | tu_cmd_buffer.c | 3747 uint64_t indirect_offset; member
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