1 /******************************************************************************
2 *
3 * Copyright (C) 2023 The Android Open Source Project
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *****************************************************************************
18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19 */
20 #include <string.h>
21 #include "ixheaacd_type_def.h"
22 #include "ixheaacd_mps_struct_def.h"
23 #include "ixheaacd_mps_res_rom.h"
24 #include "ixheaacd_mps_aac_struct.h"
25 #include "ixheaacd_constants.h"
26 #include "ixheaacd_basic_ops32.h"
27 #include "ixheaacd_basic_ops40.h"
28 #include "ixheaacd_bitbuffer.h"
29 #include "ixheaacd_common_rom.h"
30 #include "ixheaacd_sbrdecsettings.h"
31 #include "ixheaacd_sbr_scale.h"
32 #include "ixheaacd_env_extr_part.h"
33 #include "ixheaacd_sbr_rom.h"
34 #include "ixheaacd_hybrid.h"
35 #include "ixheaacd_ps_dec.h"
36 #include "ixheaacd_mps_polyphase.h"
37 #include "ixheaacd_config.h"
38 #include "ixheaacd_qmf_dec.h"
39 #include "ixheaacd_mps_dec.h"
40 #include "ixheaacd_mps_macro_def.h"
41 #include "ixheaacd_mps_apply_common.h"
42 #include "ixheaacd_mps_basic_op.h"
43
ixheaacd_mps_apply_m1(ia_heaac_mps_state_struct * pstr_mps_state)44 VOID ixheaacd_mps_apply_m1(ia_heaac_mps_state_struct *pstr_mps_state) {
45 ia_mps_dec_reuse_array_struct *p_array_struct = pstr_mps_state->array_struct;
46 ia_mps_dec_m1_param_struct *m1_param = p_array_struct->m1_param;
47 WORD32 ts, qs, row, col;
48 WORD32 temp_1, temp_2;
49 WORD32 *rout_real_ptr, *rout_imag_ptr, *rout_kernel_real_ptr, *rout_kernel_imag_ptr;
50 WORD32 *v_real, *v_imag, *x_real, *x_imag;
51 WORD32 *p_buffer_real, *p_buffer_imag, *p_v_real, *p_v_imag;
52
53 ia_heaac_mps_state_struct *curr_state = pstr_mps_state;
54 WORD32 *m1_param_real_prev = curr_state->mps_persistent_mem.m1_param_real_prev;
55 WORD32 *m1_param_imag_prev = curr_state->mps_persistent_mem.m1_param_imag_prev;
56 WORD32 imag_present = curr_state->m1_param_imag_present;
57 WORD32 v_channels = curr_state->num_v_channels;
58 WORD32 x_channels = curr_state->num_x_channels;
59 WORD32 hybrid_bands = curr_state->hybrid_bands;
60 WORD32 num_parameter_bands = curr_state->num_parameter_bands;
61 WORD32 *index = curr_state->index;
62
63 WORD32 *p_x_re, *p_x_im;
64
65 WORD32 hyb_bands = hybrid_bands;
66 WORD32 time_slots = curr_state->time_slots;
67 SIZE_T params[4];
68
69 params[0] = (SIZE_T)(&curr_state->kernels[0]);
70 params[1] = time_slots;
71 params[2] = num_parameter_bands;
72 params[3] = hybrid_bands;
73
74 rout_real_ptr = pstr_mps_state->mps_scratch_mem_v;
75 rout_kernel_real_ptr = rout_real_ptr + TSXHB;
76 rout_imag_ptr = rout_kernel_real_ptr + TSXHB;
77 rout_kernel_imag_ptr = rout_imag_ptr + TSXHB;
78
79 p_buffer_real = p_array_struct->buf_real;
80 p_buffer_imag = p_array_struct->buf_imag;
81
82 for (row = 0; row < v_channels; row++) {
83 v_real = p_buffer_real;
84 v_imag = p_buffer_imag;
85
86 for (ts = 0; ts < time_slots; ts++) {
87 memset(v_real, 0, hybrid_bands * sizeof(v_real[0]));
88 memset(v_imag, 0, hybrid_bands * sizeof(v_imag[0]));
89
90 v_real += MAX_HYBRID_BANDS;
91 v_imag += MAX_HYBRID_BANDS;
92 }
93 p_buffer_real += TSXHB;
94 p_buffer_imag += TSXHB;
95 }
96
97 p_buffer_real = p_array_struct->buf_real;
98 p_buffer_imag = p_array_struct->buf_imag;
99
100 if (!imag_present) {
101 for (row = 0; row < v_channels; row++) {
102 WORD32 *p_x_real = p_array_struct->x_real;
103 WORD32 *p_x_imag = p_array_struct->x_imag;
104
105 for (col = 0; col < x_channels; col++) {
106 if (pstr_mps_state->m1_param_present[row][col]) {
107 WORD32 idx = index[col];
108
109 ixheaacd_dec_interp_umx(m1_param->m1_param_real[row][col], rout_real_ptr,
110 m1_param_real_prev, pstr_mps_state);
111 ixheaacd_apply_abs_kernels(rout_real_ptr, rout_kernel_real_ptr, params);
112
113 p_v_real = p_buffer_real;
114 p_v_imag = p_buffer_imag;
115
116 p_x_re = p_x_real;
117 p_x_im = p_x_imag;
118
119 for (ts = 0; ts < time_slots; ts++) {
120 v_real = p_v_real;
121 v_imag = p_v_imag;
122
123 x_real = p_x_re;
124 x_imag = p_x_im;
125
126 for (qs = 0; qs < idx; qs++) {
127 temp_1 = ixheaacd_mps_mult32_shr_15(*x_real, *rout_kernel_real_ptr);
128 *v_real = *v_real + temp_1;
129 v_real++;
130
131 temp_1 = ixheaacd_mps_mult32_shr_15(*x_imag, *rout_kernel_real_ptr);
132 rout_kernel_real_ptr++;
133 *v_imag = *v_imag + temp_1;
134 v_imag++;
135
136 x_real++;
137 x_imag++;
138 }
139 rout_kernel_real_ptr += hyb_bands - idx;
140
141 p_v_real += MAX_HYBRID_BANDS;
142 p_v_imag += MAX_HYBRID_BANDS;
143
144 p_x_re += MAX_HYBRID_BANDS;
145 p_x_im += MAX_HYBRID_BANDS;
146 }
147
148 m1_param_real_prev += num_parameter_bands;
149
150 p_x_real += TSXHB;
151 p_x_imag += TSXHB;
152 } else {
153 m1_param_real_prev += num_parameter_bands;
154
155 p_x_real += TSXHB;
156 p_x_imag += TSXHB;
157 }
158 }
159 p_buffer_real += TSXHB;
160 p_buffer_imag += TSXHB;
161 }
162 } else {
163 for (row = 0; row < v_channels; row++) {
164 WORD32 *p_x_real = p_array_struct->x_real;
165 WORD32 *p_x_imag = p_array_struct->x_imag;
166
167 for (col = 0; col < x_channels; col++) {
168 if (pstr_mps_state->m1_param_present[row][col]) {
169 WORD32 idx = index[col];
170
171 ixheaacd_dec_interp_umx(m1_param->m1_param_real[row][col], rout_real_ptr,
172 m1_param_real_prev, pstr_mps_state);
173 ixheaacd_dec_interp_umx(m1_param->m1_param_imag[row][col], rout_imag_ptr,
174 m1_param_imag_prev, pstr_mps_state);
175 ixheaacd_apply_abs_kernels(rout_real_ptr, rout_kernel_real_ptr, params);
176 ixheaacd_apply_abs_kernels(rout_imag_ptr, rout_kernel_imag_ptr, params);
177
178 p_v_real = p_buffer_real;
179 p_v_imag = p_buffer_imag;
180
181 p_x_re = p_x_real;
182 p_x_im = p_x_imag;
183
184 for (ts = 0; ts < time_slots; ts++) {
185 v_real = p_v_real;
186 v_imag = p_v_imag;
187
188 x_real = p_x_re;
189 x_imag = p_x_im;
190 for (qs = 0; qs < 2; qs++) {
191 temp_1 = ixheaacd_mps_mult32_shr_15(*x_real, *rout_kernel_real_ptr);
192 temp_2 = ixheaacd_mps_mult32_shr_15(*x_imag, *rout_kernel_imag_ptr);
193 temp_1 += temp_2;
194
195 *v_real = *v_real + temp_1;
196 v_real++;
197
198 temp_1 = ixheaacd_mps_mult32_shr_15(*x_imag, *rout_kernel_real_ptr);
199 rout_kernel_real_ptr++;
200 temp_2 = ixheaacd_mps_mult32_shr_15(*x_real, *rout_kernel_imag_ptr);
201 rout_kernel_imag_ptr++;
202 temp_1 -= temp_2;
203
204 *v_imag = *v_imag + temp_1;
205 v_imag++;
206
207 x_real++;
208 x_imag++;
209 }
210 for (; qs < idx; qs++) {
211 temp_1 = ixheaacd_mps_mult32_shr_15(*x_real, *rout_kernel_real_ptr);
212 temp_2 = ixheaacd_mps_mult32_shr_15(*x_imag, *rout_kernel_imag_ptr);
213 temp_1 -= temp_2;
214
215 *v_real = *v_real + temp_1;
216 v_real++;
217
218 temp_1 = ixheaacd_mps_mult32_shr_15(*x_imag, *rout_kernel_real_ptr);
219 rout_kernel_real_ptr++;
220 temp_2 = ixheaacd_mps_mult32_shr_15(*x_real, *rout_kernel_imag_ptr);
221 rout_kernel_imag_ptr++;
222 temp_1 += temp_2;
223
224 *v_imag = *v_imag + temp_1;
225 v_imag++;
226
227 x_real++;
228 x_imag++;
229 }
230 rout_kernel_real_ptr += hyb_bands - idx;
231 rout_kernel_imag_ptr += hyb_bands - idx;
232
233 p_v_real += MAX_HYBRID_BANDS;
234 p_v_imag += MAX_HYBRID_BANDS;
235
236 p_x_re += MAX_HYBRID_BANDS;
237 p_x_im += MAX_HYBRID_BANDS;
238 }
239
240 m1_param_real_prev += num_parameter_bands;
241 m1_param_imag_prev += num_parameter_bands;
242
243 p_x_real += TSXHB;
244 p_x_imag += TSXHB;
245 } else {
246 m1_param_real_prev += num_parameter_bands;
247 m1_param_imag_prev += num_parameter_bands;
248
249 p_x_real += TSXHB;
250 p_x_imag += TSXHB;
251 }
252 }
253 p_buffer_real += TSXHB;
254 p_buffer_imag += TSXHB;
255 }
256 }
257 return;
258 }
259