| /external/vixl/test/aarch64/ | 
| D | test-trace-aarch64.cc | 785   __ ld1(v18.V16B(), v19.V16B(), v20.V16B(), v21.V16B(), MemOperand(x0));  in GenerateTestSequenceNEON()  local 786   __ ld1(v23.V16B(),  in GenerateTestSequenceNEON()  local 791   __ ld1(v5.V16B(),  in GenerateTestSequenceNEON()  local 796   __ ld1(v18.V16B(), v19.V16B(), v20.V16B(), MemOperand(x0));  in GenerateTestSequenceNEON()  local 797   __ ld1(v13.V16B(), v14.V16B(), v15.V16B(), MemOperand(x1, x2, PostIndex));  in GenerateTestSequenceNEON()  local 798   __ ld1(v19.V16B(), v20.V16B(), v21.V16B(), MemOperand(x1, 48, PostIndex));  in GenerateTestSequenceNEON()  local 799   __ ld1(v17.V16B(), v18.V16B(), MemOperand(x0));  in GenerateTestSequenceNEON()  local 800   __ ld1(v20.V16B(), v21.V16B(), MemOperand(x1, x2, PostIndex));  in GenerateTestSequenceNEON()  local 801   __ ld1(v28.V16B(), v29.V16B(), MemOperand(x1, 32, PostIndex));  in GenerateTestSequenceNEON()  local 802   __ ld1(v29.V16B(), MemOperand(x0));  in GenerateTestSequenceNEON()  local [all …] 
 | 
| D | test-assembler-sve-aarch64.cc | 8811                         Ld1Macro ld1,  in Ldff1Helper() 9824                                              Ld1Macro ld1,  in GatherLoadScalarPlusVectorHelper()
  | 
| /external/cronet/buildtools/third_party/libc++/trunk/test/std/numerics/numbers/ | 
| D | specialize.pass.cpp | 58   [[maybe_unused]] long double ld1{std::numbers::log2e_v<long double>};  in tests()  local
  | 
| D | defined.pass.cpp | 57   [[maybe_unused]] const long double* ld1{&std::numbers::log2e_v<long double>};  in tests()  local
  | 
| /external/clang/test/CodeGen/ | 
| D | x86_32-arguments-iamcu.c | 68 long double longDoubleArg(long double ld1) { return ld1; }  in longDoubleArg()
  | 
| /external/XNNPACK/src/jit/ | 
| D | aarch64-assembler.cc | 460 void Assembler::ld1(VRegisterList vs, MemOperand xn, int32_t imm) {  in ld1()  function in xnnpack::aarch64::Assembler
  | 
| /external/vixl/src/aarch64/ | 
| D | assembler-aarch64.cc | 2051 void Assembler::ld1(const VRegister& vt, const MemOperand& src) {  in ld1()  function in vixl::aarch64::Assembler 2057 void Assembler::ld1(const VRegister& vt,  in ld1()  function in vixl::aarch64::Assembler 2068 void Assembler::ld1(const VRegister& vt,  in ld1()  function in vixl::aarch64::Assembler 2080 void Assembler::ld1(const VRegister& vt,  in ld1()  function in vixl::aarch64::Assembler 2362 void Assembler::ld1(const VRegister& vt, int lane, const MemOperand& src) {  in ld1()  function in vixl::aarch64::Assembler
  | 
| D | logic-aarch64.cc | 170 void Simulator::ld1(VectorFormat vform, LogicVRegister dst, uint64_t addr) {  in ld1()  function in vixl::aarch64::Simulator 179 void Simulator::ld1(VectorFormat vform,  in ld1()  function in vixl::aarch64::Simulator
  | 
| /external/mesa3d/src/gallium/drivers/nouveau/codegen/ | 
| D | nv50_ir_peephole.cpp | 3954 DeadCodeElim::checkSplitLoad(Instruction *ld1)  in checkSplitLoad()
  |