Searched defs:ld3r (Results 1 – 5 of 5) sorted by relevance
/external/llvm/test/MC/AArch64/ |
D | arm64-simd-ldst.s | 958 ld3r: label
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/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 1055 __ ld3r(v24.V16B(), v25.V16B(), v26.V16B(), MemOperand(x0)); in GenerateTestSequenceNEON() local 1056 __ ld3r(v24.V16B(), v25.V16B(), v26.V16B(), MemOperand(x1, x2, PostIndex)); in GenerateTestSequenceNEON() local 1057 __ ld3r(v3.V16B(), v4.V16B(), v5.V16B(), MemOperand(x1, 3, PostIndex)); in GenerateTestSequenceNEON() local 1058 __ ld3r(v4.V1D(), v5.V1D(), v6.V1D(), MemOperand(x0)); in GenerateTestSequenceNEON() local 1059 __ ld3r(v7.V1D(), v8.V1D(), v9.V1D(), MemOperand(x1, x2, PostIndex)); in GenerateTestSequenceNEON() local 1060 __ ld3r(v17.V1D(), v18.V1D(), v19.V1D(), MemOperand(x1, 24, PostIndex)); in GenerateTestSequenceNEON() local 1061 __ ld3r(v16.V2D(), v17.V2D(), v18.V2D(), MemOperand(x0)); in GenerateTestSequenceNEON() local 1062 __ ld3r(v20.V2D(), v21.V2D(), v22.V2D(), MemOperand(x1, x2, PostIndex)); in GenerateTestSequenceNEON() local 1063 __ ld3r(v14.V2D(), v15.V2D(), v16.V2D(), MemOperand(x1, 24, PostIndex)); in GenerateTestSequenceNEON() local 1064 __ ld3r(v10.V2S(), v11.V2S(), v12.V2S(), MemOperand(x0)); in GenerateTestSequenceNEON() local [all …]
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/external/XNNPACK/src/jit/ |
D | aarch64-assembler.cc | 497 void Assembler::ld3r(VRegisterList xs, MemOperand xn) { in ld3r() function in xnnpack::aarch64::Assembler
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.cc | 2152 void Assembler::ld3r(const VRegister& vt, in ld3r() function in vixl::aarch64::Assembler
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D | logic-aarch64.cc | 292 void Simulator::ld3r(VectorFormat vform, in ld3r() function in vixl::aarch64::Simulator
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