1 /*
2 * Copyright (c) 2017-2019 Lima Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 */
24
25 #include <string.h>
26
27 #include "util/ralloc.h"
28 #include "util/u_debug.h"
29 #include "util/u_screen.h"
30 #include "renderonly/renderonly.h"
31
32 #include "drm-uapi/drm_fourcc.h"
33 #include "drm-uapi/lima_drm.h"
34
35 #include "lima_screen.h"
36 #include "lima_context.h"
37 #include "lima_resource.h"
38 #include "lima_program.h"
39 #include "lima_bo.h"
40 #include "lima_fence.h"
41 #include "lima_format.h"
42 #include "ir/lima_ir.h"
43
44 #include "xf86drm.h"
45
46 int lima_plb_max_blk = 0;
47 int lima_plb_pp_stream_cache_size = 0;
48
49 static void
lima_screen_destroy(struct pipe_screen * pscreen)50 lima_screen_destroy(struct pipe_screen *pscreen)
51 {
52 struct lima_screen *screen = lima_screen(pscreen);
53
54 slab_destroy_parent(&screen->transfer_pool);
55
56 if (screen->ro)
57 free(screen->ro);
58
59 if (screen->pp_buffer)
60 lima_bo_unreference(screen->pp_buffer);
61
62 lima_bo_cache_fini(screen);
63 lima_bo_table_fini(screen);
64 ralloc_free(screen);
65 }
66
67 static const char *
lima_screen_get_name(struct pipe_screen * pscreen)68 lima_screen_get_name(struct pipe_screen *pscreen)
69 {
70 struct lima_screen *screen = lima_screen(pscreen);
71
72 switch (screen->gpu_type) {
73 case DRM_LIMA_PARAM_GPU_ID_MALI400:
74 return "Mali400";
75 case DRM_LIMA_PARAM_GPU_ID_MALI450:
76 return "Mali450";
77 }
78
79 return NULL;
80 }
81
82 static const char *
lima_screen_get_vendor(struct pipe_screen * pscreen)83 lima_screen_get_vendor(struct pipe_screen *pscreen)
84 {
85 return "lima";
86 }
87
88 static const char *
lima_screen_get_device_vendor(struct pipe_screen * pscreen)89 lima_screen_get_device_vendor(struct pipe_screen *pscreen)
90 {
91 return "ARM";
92 }
93
94 static int
lima_screen_get_param(struct pipe_screen * pscreen,enum pipe_cap param)95 lima_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
96 {
97 switch (param) {
98 case PIPE_CAP_NPOT_TEXTURES:
99 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
100 case PIPE_CAP_ACCELERATED:
101 case PIPE_CAP_UMA:
102 case PIPE_CAP_NATIVE_FENCE_FD:
103 case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
104 return 1;
105
106 /* Unimplemented, but for exporting OpenGL 2.0 */
107 case PIPE_CAP_OCCLUSION_QUERY:
108 case PIPE_CAP_POINT_SPRITE:
109 return 1;
110
111 /* not clear supported */
112 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
113 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
114 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
115 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
116 return 1;
117
118 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
119 case PIPE_CAP_TGSI_FS_POINT_IS_SYSVAL:
120 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
121 return 1;
122
123 case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
124 return 1 << (LIMA_MAX_MIP_LEVELS - 1);
125 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
126 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
127 return LIMA_MAX_MIP_LEVELS;
128
129 case PIPE_CAP_VENDOR_ID:
130 return 0x13B5;
131
132 case PIPE_CAP_VIDEO_MEMORY:
133 return 0;
134
135 case PIPE_CAP_PCI_GROUP:
136 case PIPE_CAP_PCI_BUS:
137 case PIPE_CAP_PCI_DEVICE:
138 case PIPE_CAP_PCI_FUNCTION:
139 return 0;
140
141 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
142 return 0;
143
144 case PIPE_CAP_ALPHA_TEST:
145 case PIPE_CAP_FLATSHADE:
146 case PIPE_CAP_TWO_SIDED_COLOR:
147 case PIPE_CAP_CLIP_PLANES:
148 return 0;
149
150 case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
151 return 1;
152
153 default:
154 return u_pipe_screen_get_param_defaults(pscreen, param);
155 }
156 }
157
158 static float
lima_screen_get_paramf(struct pipe_screen * pscreen,enum pipe_capf param)159 lima_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
160 {
161 switch (param) {
162 case PIPE_CAPF_MAX_LINE_WIDTH:
163 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
164 case PIPE_CAPF_MAX_POINT_WIDTH:
165 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
166 return 100.0f;
167 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
168 return 16.0f;
169 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
170 return 15.0f;
171
172 default:
173 return 0.0f;
174 }
175 }
176
177 static int
get_vertex_shader_param(struct lima_screen * screen,enum pipe_shader_cap param)178 get_vertex_shader_param(struct lima_screen *screen,
179 enum pipe_shader_cap param)
180 {
181 switch (param) {
182 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
183 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
184 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
185 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
186 return 16384; /* need investigate */
187
188 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
189 return 1024;
190
191 case PIPE_SHADER_CAP_MAX_INPUTS:
192 return 16; /* attributes */
193
194 case PIPE_SHADER_CAP_MAX_OUTPUTS:
195 return LIMA_MAX_VARYING_NUM; /* varying */
196
197 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
198 return 16 * 1024 * sizeof(float);
199
200 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
201 return 1;
202
203 case PIPE_SHADER_CAP_PREFERRED_IR:
204 return PIPE_SHADER_IR_NIR;
205
206 case PIPE_SHADER_CAP_MAX_TEMPS:
207 return 256; /* need investigate */
208
209 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
210 return 32;
211
212 default:
213 return 0;
214 }
215 }
216
217 static int
get_fragment_shader_param(struct lima_screen * screen,enum pipe_shader_cap param)218 get_fragment_shader_param(struct lima_screen *screen,
219 enum pipe_shader_cap param)
220 {
221 switch (param) {
222 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
223 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
224 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
225 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
226 return 16384; /* need investigate */
227
228 case PIPE_SHADER_CAP_MAX_INPUTS:
229 return LIMA_MAX_VARYING_NUM - 1; /* varying, minus gl_Position */
230
231 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
232 return 1024;
233
234 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
235 return 16 * 1024 * sizeof(float);
236
237 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
238 return 1;
239
240 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
241 return 16; /* need investigate */
242
243 case PIPE_SHADER_CAP_PREFERRED_IR:
244 return PIPE_SHADER_IR_NIR;
245
246 case PIPE_SHADER_CAP_MAX_TEMPS:
247 return 256; /* need investigate */
248
249 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
250 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
251 return 1;
252
253 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
254 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
255 return 0;
256
257 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
258 return 32;
259
260 default:
261 return 0;
262 }
263 }
264
265 static int
lima_screen_get_shader_param(struct pipe_screen * pscreen,enum pipe_shader_type shader,enum pipe_shader_cap param)266 lima_screen_get_shader_param(struct pipe_screen *pscreen,
267 enum pipe_shader_type shader,
268 enum pipe_shader_cap param)
269 {
270 struct lima_screen *screen = lima_screen(pscreen);
271
272 switch (shader) {
273 case PIPE_SHADER_FRAGMENT:
274 return get_fragment_shader_param(screen, param);
275 case PIPE_SHADER_VERTEX:
276 return get_vertex_shader_param(screen, param);
277
278 default:
279 return 0;
280 }
281 }
282
283 static bool
lima_screen_is_format_supported(struct pipe_screen * pscreen,enum pipe_format format,enum pipe_texture_target target,unsigned sample_count,unsigned storage_sample_count,unsigned usage)284 lima_screen_is_format_supported(struct pipe_screen *pscreen,
285 enum pipe_format format,
286 enum pipe_texture_target target,
287 unsigned sample_count,
288 unsigned storage_sample_count,
289 unsigned usage)
290 {
291 switch (target) {
292 case PIPE_BUFFER:
293 case PIPE_TEXTURE_1D:
294 case PIPE_TEXTURE_2D:
295 case PIPE_TEXTURE_RECT:
296 case PIPE_TEXTURE_CUBE:
297 break;
298 default:
299 return false;
300 }
301
302 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
303 return false;
304
305 /* be able to support 16, now limit to 4 */
306 if (sample_count > 1 && sample_count != 4)
307 return false;
308
309 if (usage & PIPE_BIND_RENDER_TARGET &&
310 !lima_format_pixel_supported(format))
311 return false;
312
313 if (usage & PIPE_BIND_DEPTH_STENCIL) {
314 switch (format) {
315 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
316 case PIPE_FORMAT_Z24X8_UNORM:
317 break;
318 default:
319 return false;
320 }
321 }
322
323 if (usage & PIPE_BIND_VERTEX_BUFFER) {
324 switch (format) {
325 case PIPE_FORMAT_R32_FLOAT:
326 case PIPE_FORMAT_R32G32_FLOAT:
327 case PIPE_FORMAT_R32G32B32_FLOAT:
328 case PIPE_FORMAT_R32G32B32A32_FLOAT:
329 case PIPE_FORMAT_R32_FIXED:
330 case PIPE_FORMAT_R32G32_FIXED:
331 case PIPE_FORMAT_R32G32B32_FIXED:
332 case PIPE_FORMAT_R32G32B32A32_FIXED:
333 case PIPE_FORMAT_R16_FLOAT:
334 case PIPE_FORMAT_R16G16_FLOAT:
335 case PIPE_FORMAT_R16G16B16_FLOAT:
336 case PIPE_FORMAT_R16G16B16A16_FLOAT:
337 case PIPE_FORMAT_R32_UNORM:
338 case PIPE_FORMAT_R32G32_UNORM:
339 case PIPE_FORMAT_R32G32B32_UNORM:
340 case PIPE_FORMAT_R32G32B32A32_UNORM:
341 case PIPE_FORMAT_R32_SNORM:
342 case PIPE_FORMAT_R32G32_SNORM:
343 case PIPE_FORMAT_R32G32B32_SNORM:
344 case PIPE_FORMAT_R32G32B32A32_SNORM:
345 case PIPE_FORMAT_R32_USCALED:
346 case PIPE_FORMAT_R32G32_USCALED:
347 case PIPE_FORMAT_R32G32B32_USCALED:
348 case PIPE_FORMAT_R32G32B32A32_USCALED:
349 case PIPE_FORMAT_R32_SSCALED:
350 case PIPE_FORMAT_R32G32_SSCALED:
351 case PIPE_FORMAT_R32G32B32_SSCALED:
352 case PIPE_FORMAT_R32G32B32A32_SSCALED:
353 case PIPE_FORMAT_R16_UNORM:
354 case PIPE_FORMAT_R16G16_UNORM:
355 case PIPE_FORMAT_R16G16B16_UNORM:
356 case PIPE_FORMAT_R16G16B16A16_UNORM:
357 case PIPE_FORMAT_R16_SNORM:
358 case PIPE_FORMAT_R16G16_SNORM:
359 case PIPE_FORMAT_R16G16B16_SNORM:
360 case PIPE_FORMAT_R16G16B16A16_SNORM:
361 case PIPE_FORMAT_R16_USCALED:
362 case PIPE_FORMAT_R16G16_USCALED:
363 case PIPE_FORMAT_R16G16B16_USCALED:
364 case PIPE_FORMAT_R16G16B16A16_USCALED:
365 case PIPE_FORMAT_R16_SSCALED:
366 case PIPE_FORMAT_R16G16_SSCALED:
367 case PIPE_FORMAT_R16G16B16_SSCALED:
368 case PIPE_FORMAT_R16G16B16A16_SSCALED:
369 case PIPE_FORMAT_R8_UNORM:
370 case PIPE_FORMAT_R8G8_UNORM:
371 case PIPE_FORMAT_R8G8B8_UNORM:
372 case PIPE_FORMAT_R8G8B8A8_UNORM:
373 case PIPE_FORMAT_R8_SNORM:
374 case PIPE_FORMAT_R8G8_SNORM:
375 case PIPE_FORMAT_R8G8B8_SNORM:
376 case PIPE_FORMAT_R8G8B8A8_SNORM:
377 case PIPE_FORMAT_R8_USCALED:
378 case PIPE_FORMAT_R8G8_USCALED:
379 case PIPE_FORMAT_R8G8B8_USCALED:
380 case PIPE_FORMAT_R8G8B8A8_USCALED:
381 case PIPE_FORMAT_R8_SSCALED:
382 case PIPE_FORMAT_R8G8_SSCALED:
383 case PIPE_FORMAT_R8G8B8_SSCALED:
384 case PIPE_FORMAT_R8G8B8A8_SSCALED:
385 break;
386 default:
387 return false;
388 }
389 }
390
391 if (usage & PIPE_BIND_INDEX_BUFFER) {
392 switch (format) {
393 case PIPE_FORMAT_I8_UINT:
394 case PIPE_FORMAT_I16_UINT:
395 case PIPE_FORMAT_I32_UINT:
396 break;
397 default:
398 return false;
399 }
400 }
401
402 if (usage & PIPE_BIND_SAMPLER_VIEW)
403 return lima_format_texel_supported(format);
404
405 return true;
406 }
407
408 static const void *
lima_screen_get_compiler_options(struct pipe_screen * pscreen,enum pipe_shader_ir ir,enum pipe_shader_type shader)409 lima_screen_get_compiler_options(struct pipe_screen *pscreen,
410 enum pipe_shader_ir ir,
411 enum pipe_shader_type shader)
412 {
413 return lima_program_get_compiler_options(shader);
414 }
415
416 static bool
lima_screen_set_plb_max_blk(struct lima_screen * screen)417 lima_screen_set_plb_max_blk(struct lima_screen *screen)
418 {
419 if (lima_plb_max_blk) {
420 screen->plb_max_blk = lima_plb_max_blk;
421 return true;
422 }
423
424 if (screen->gpu_type == DRM_LIMA_PARAM_GPU_ID_MALI450)
425 screen->plb_max_blk = 4096;
426 else
427 screen->plb_max_blk = 512;
428
429 drmDevicePtr devinfo;
430
431 if (drmGetDevice2(screen->fd, 0, &devinfo))
432 return false;
433
434 if (devinfo->bustype == DRM_BUS_PLATFORM && devinfo->deviceinfo.platform) {
435 char **compatible = devinfo->deviceinfo.platform->compatible;
436
437 if (compatible && *compatible)
438 if (!strcmp("allwinner,sun50i-h5-mali", *compatible))
439 screen->plb_max_blk = 2048;
440 }
441
442 drmFreeDevice(&devinfo);
443
444 return true;
445 }
446
447 static bool
lima_screen_query_info(struct lima_screen * screen)448 lima_screen_query_info(struct lima_screen *screen)
449 {
450 drmVersionPtr version = drmGetVersion(screen->fd);
451 if (!version)
452 return false;
453
454 if (version->version_major > 1 || version->version_minor > 0)
455 screen->has_growable_heap_buffer = true;
456
457 drmFreeVersion(version);
458
459 if (lima_debug & LIMA_DEBUG_NO_GROW_HEAP)
460 screen->has_growable_heap_buffer = false;
461
462 struct drm_lima_get_param param;
463
464 memset(¶m, 0, sizeof(param));
465 param.param = DRM_LIMA_PARAM_GPU_ID;
466 if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, ¶m))
467 return false;
468
469 switch (param.value) {
470 case DRM_LIMA_PARAM_GPU_ID_MALI400:
471 case DRM_LIMA_PARAM_GPU_ID_MALI450:
472 screen->gpu_type = param.value;
473 break;
474 default:
475 return false;
476 }
477
478 memset(¶m, 0, sizeof(param));
479 param.param = DRM_LIMA_PARAM_NUM_PP;
480 if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, ¶m))
481 return false;
482
483 screen->num_pp = param.value;
484
485 lima_screen_set_plb_max_blk(screen);
486
487 return true;
488 }
489
490 static void
lima_screen_query_dmabuf_modifiers(struct pipe_screen * pscreen,enum pipe_format format,int max,uint64_t * modifiers,unsigned int * external_only,int * count)491 lima_screen_query_dmabuf_modifiers(struct pipe_screen *pscreen,
492 enum pipe_format format, int max,
493 uint64_t *modifiers,
494 unsigned int *external_only,
495 int *count)
496 {
497 uint64_t available_modifiers[] = {
498 DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED,
499 DRM_FORMAT_MOD_LINEAR,
500 };
501
502 int num_modifiers = ARRAY_SIZE(available_modifiers);
503
504 if (!modifiers) {
505 *count = num_modifiers;
506 return;
507 }
508
509 *count = MIN2(max, num_modifiers);
510 for (int i = 0; i < *count; i++) {
511 modifiers[i] = available_modifiers[i];
512 if (external_only)
513 external_only[i] = false;
514 }
515 }
516
517 static const struct debug_named_value debug_options[] = {
518 { "gp", LIMA_DEBUG_GP,
519 "print GP shader compiler result of each stage" },
520 { "pp", LIMA_DEBUG_PP,
521 "print PP shader compiler result of each stage" },
522 { "dump", LIMA_DEBUG_DUMP,
523 "dump GPU command stream to $PWD/lima.dump" },
524 { "shaderdb", LIMA_DEBUG_SHADERDB,
525 "print shader information for shaderdb" },
526 { "nobocache", LIMA_DEBUG_NO_BO_CACHE,
527 "disable BO cache" },
528 { "bocache", LIMA_DEBUG_BO_CACHE,
529 "print debug info for BO cache" },
530 { "notiling", LIMA_DEBUG_NO_TILING,
531 "don't use tiled buffers" },
532 { "nogrowheap", LIMA_DEBUG_NO_GROW_HEAP,
533 "disable growable heap buffer" },
534 { "singlejob", LIMA_DEBUG_SINGLE_JOB,
535 "disable multi job optimization" },
536 { NULL }
537 };
538
539 DEBUG_GET_ONCE_FLAGS_OPTION(lima_debug, "LIMA_DEBUG", debug_options, 0)
540 uint32_t lima_debug;
541
542 static void
lima_screen_parse_env(void)543 lima_screen_parse_env(void)
544 {
545 lima_debug = debug_get_option_lima_debug();
546
547 lima_ctx_num_plb = debug_get_num_option("LIMA_CTX_NUM_PLB", LIMA_CTX_PLB_DEF_NUM);
548 if (lima_ctx_num_plb > LIMA_CTX_PLB_MAX_NUM ||
549 lima_ctx_num_plb < LIMA_CTX_PLB_MIN_NUM) {
550 fprintf(stderr, "lima: LIMA_CTX_NUM_PLB %d out of range [%d %d], "
551 "reset to default %d\n", lima_ctx_num_plb, LIMA_CTX_PLB_MIN_NUM,
552 LIMA_CTX_PLB_MAX_NUM, LIMA_CTX_PLB_DEF_NUM);
553 lima_ctx_num_plb = LIMA_CTX_PLB_DEF_NUM;
554 }
555
556 lima_plb_max_blk = debug_get_num_option("LIMA_PLB_MAX_BLK", 0);
557 if (lima_plb_max_blk < 0 || lima_plb_max_blk > 65536) {
558 fprintf(stderr, "lima: LIMA_PLB_MAX_BLK %d out of range [%d %d], "
559 "reset to default %d\n", lima_plb_max_blk, 0, 65536, 0);
560 lima_plb_max_blk = 0;
561 }
562
563 lima_ppir_force_spilling = debug_get_num_option("LIMA_PPIR_FORCE_SPILLING", 0);
564 if (lima_ppir_force_spilling < 0) {
565 fprintf(stderr, "lima: LIMA_PPIR_FORCE_SPILLING %d less than 0, "
566 "reset to default 0\n", lima_ppir_force_spilling);
567 lima_ppir_force_spilling = 0;
568 }
569
570 lima_plb_pp_stream_cache_size = debug_get_num_option("LIMA_PLB_PP_STREAM_CACHE_SIZE", 0);
571 if (lima_plb_pp_stream_cache_size < 0) {
572 fprintf(stderr, "lima: LIMA_PLB_PP_STREAM_CACHE_SIZE %d less than 0, "
573 "reset to default 0\n", lima_plb_pp_stream_cache_size);
574 lima_plb_pp_stream_cache_size = 0;
575 }
576 }
577
578 struct pipe_screen *
lima_screen_create(int fd,struct renderonly * ro)579 lima_screen_create(int fd, struct renderonly *ro)
580 {
581 uint64_t system_memory;
582 struct lima_screen *screen;
583
584 screen = rzalloc(NULL, struct lima_screen);
585 if (!screen)
586 return NULL;
587
588 screen->fd = fd;
589
590 lima_screen_parse_env();
591
592 /* Limit PP PLB stream cache size to 0.1% of system memory */
593 if (!lima_plb_pp_stream_cache_size &&
594 os_get_total_physical_memory(&system_memory))
595 lima_plb_pp_stream_cache_size = system_memory >> 10;
596
597 /* Set lower limit on PP PLB cache size */
598 lima_plb_pp_stream_cache_size = MAX2(128 * 1024 * lima_ctx_num_plb,
599 lima_plb_pp_stream_cache_size);
600
601 if (!lima_screen_query_info(screen))
602 goto err_out0;
603
604 if (!lima_bo_cache_init(screen))
605 goto err_out0;
606
607 if (!lima_bo_table_init(screen))
608 goto err_out1;
609
610 screen->pp_ra = ppir_regalloc_init(screen);
611 if (!screen->pp_ra)
612 goto err_out2;
613
614 screen->pp_buffer = lima_bo_create(screen, pp_buffer_size, 0);
615 if (!screen->pp_buffer)
616 goto err_out2;
617 screen->pp_buffer->cacheable = false;
618
619 /* fs program for clear buffer?
620 * const0 1 0 0 -1.67773, mov.v0 $0 ^const0.xxxx, stop
621 */
622 static const uint32_t pp_clear_program[] = {
623 0x00020425, 0x0000000c, 0x01e007cf, 0xb0000000,
624 0x000005f5, 0x00000000, 0x00000000, 0x00000000,
625 };
626 memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_program_offset,
627 pp_clear_program, sizeof(pp_clear_program));
628
629 /* copy texture to framebuffer, used to reload gpu tile buffer
630 * load.v $1 0.xy, texld_2d 0, mov.v0 $0 ^tex_sampler, sync, stop
631 */
632 static const uint32_t pp_reload_program[] = {
633 0x000005e6, 0xf1003c20, 0x00000000, 0x39001000,
634 0x00000e4e, 0x000007cf, 0x00000000, 0x00000000,
635 };
636 memcpy(lima_bo_map(screen->pp_buffer) + pp_reload_program_offset,
637 pp_reload_program, sizeof(pp_reload_program));
638
639 /* 0/1/2 vertex index for reload/clear draw */
640 static const uint8_t pp_shared_index[] = { 0, 1, 2 };
641 memcpy(lima_bo_map(screen->pp_buffer) + pp_shared_index_offset,
642 pp_shared_index, sizeof(pp_shared_index));
643
644 /* 4096x4096 gl pos used for partial clear */
645 static const float pp_clear_gl_pos[] = {
646 4096, 0, 1, 1,
647 0, 0, 1, 1,
648 0, 4096, 1, 1,
649 };
650 memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_gl_pos_offset,
651 pp_clear_gl_pos, sizeof(pp_clear_gl_pos));
652
653 /* is pp frame render state static? */
654 uint32_t *pp_frame_rsw = lima_bo_map(screen->pp_buffer) + pp_frame_rsw_offset;
655 memset(pp_frame_rsw, 0, 0x40);
656 pp_frame_rsw[8] = 0x0000f008;
657 pp_frame_rsw[9] = screen->pp_buffer->va + pp_clear_program_offset;
658 pp_frame_rsw[13] = 0x00000100;
659
660 if (ro) {
661 screen->ro = renderonly_dup(ro);
662 if (!screen->ro) {
663 fprintf(stderr, "Failed to dup renderonly object\n");
664 goto err_out3;
665 }
666 }
667
668 screen->base.destroy = lima_screen_destroy;
669 screen->base.get_name = lima_screen_get_name;
670 screen->base.get_vendor = lima_screen_get_vendor;
671 screen->base.get_device_vendor = lima_screen_get_device_vendor;
672 screen->base.get_param = lima_screen_get_param;
673 screen->base.get_paramf = lima_screen_get_paramf;
674 screen->base.get_shader_param = lima_screen_get_shader_param;
675 screen->base.context_create = lima_context_create;
676 screen->base.is_format_supported = lima_screen_is_format_supported;
677 screen->base.get_compiler_options = lima_screen_get_compiler_options;
678 screen->base.query_dmabuf_modifiers = lima_screen_query_dmabuf_modifiers;
679
680 lima_resource_screen_init(screen);
681 lima_fence_screen_init(screen);
682
683 slab_create_parent(&screen->transfer_pool, sizeof(struct lima_transfer), 16);
684
685 screen->refcnt = 1;
686
687 return &screen->base;
688
689 err_out3:
690 lima_bo_unreference(screen->pp_buffer);
691 err_out2:
692 lima_bo_table_fini(screen);
693 err_out1:
694 lima_bo_cache_fini(screen);
695 err_out0:
696 ralloc_free(screen);
697 return NULL;
698 }
699