1 /*
2 * Copyright (c) 2021-2022 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24 #include "src/common/cpuinfo/CpuModel.h"
25
26 namespace arm_compute
27 {
28 namespace cpuinfo
29 {
cpu_model_to_string(CpuModel model)30 std::string cpu_model_to_string(CpuModel model)
31 {
32 switch(model)
33 {
34 #define X(MODEL) \
35 case CpuModel::MODEL: \
36 return #MODEL;
37 ARM_COMPUTE_CPU_MODEL_LIST
38 #undef X
39 default:
40 {
41 return std::string("GENERIC");
42 }
43 };
44 }
45
model_supports_fp16(CpuModel model)46 bool model_supports_fp16(CpuModel model)
47 {
48 switch(model)
49 {
50 case CpuModel::GENERIC_FP16:
51 case CpuModel::GENERIC_FP16_DOT:
52 case CpuModel::A55r1:
53 case CpuModel::A510:
54 case CpuModel::X1:
55 case CpuModel::V1:
56 case CpuModel::A64FX:
57 case CpuModel::N1:
58 return true;
59 default:
60 return false;
61 }
62 }
63
model_supports_dot(CpuModel model)64 bool model_supports_dot(CpuModel model)
65 {
66 switch(model)
67 {
68 case CpuModel::GENERIC_FP16_DOT:
69 case CpuModel::A55r1:
70 case CpuModel::A510:
71 case CpuModel::X1:
72 case CpuModel::V1:
73 case CpuModel::N1:
74 return true;
75 default:
76 return false;
77 }
78 }
79
midr_to_model(uint32_t midr)80 CpuModel midr_to_model(uint32_t midr)
81 {
82 CpuModel model = CpuModel::GENERIC;
83
84 // Unpack variant and CPU ID
85 const int implementer = (midr >> 24) & 0xFF;
86 const int variant = (midr >> 20) & 0xF;
87 const int cpunum = (midr >> 4) & 0xFFF;
88
89 // Only CPUs we have code paths for are detected. All other CPUs can be safely classed as "GENERIC"
90 if(implementer == 0x41) // Arm CPUs
91 {
92 switch(cpunum)
93 {
94 case 0xd03: // A53
95 case 0xd04: // A35
96 model = CpuModel::A53;
97 break;
98 case 0xd05: // A55
99 if(variant != 0)
100 {
101 model = CpuModel::A55r1;
102 }
103 else
104 {
105 model = CpuModel::A55r0;
106 }
107 break;
108 case 0xd09: // A73
109 model = CpuModel::A73;
110 break;
111 case 0xd0a: // A75
112 if(variant != 0)
113 {
114 model = CpuModel::GENERIC_FP16_DOT;
115 }
116 else
117 {
118 model = CpuModel::GENERIC_FP16;
119 }
120 break;
121 case 0xd0c: // N1
122 model = CpuModel::N1;
123 break;
124 case 0xd06: // A65
125 case 0xd0b: // A76
126 case 0xd0d: // A77
127 case 0xd0e: // A76AE
128 case 0xd41: // A78
129 case 0xd42: // A78AE
130 case 0xd4a: // E1
131 model = CpuModel::GENERIC_FP16_DOT;
132 break;
133 case 0xd40: // V1
134 model = CpuModel::V1;
135 break;
136 case 0xd44: // X1
137 model = CpuModel::X1;
138 break;
139 case 0xd46:
140 model = CpuModel::A510;
141 break;
142 default:
143 model = CpuModel::GENERIC;
144 break;
145 }
146 }
147 else if(implementer == 0x46)
148 {
149 switch(cpunum)
150 {
151 case 0x001: // A64FX
152 model = CpuModel::A64FX;
153 break;
154 default:
155 model = CpuModel::GENERIC;
156 break;
157 }
158 }
159 else if(implementer == 0x48)
160 {
161 switch(cpunum)
162 {
163 case 0xd40: // A76
164 model = CpuModel::GENERIC_FP16_DOT;
165 break;
166 default:
167 model = CpuModel::GENERIC;
168 break;
169 }
170 }
171 else if(implementer == 0x51)
172 {
173 switch(cpunum)
174 {
175 case 0x800: // A73
176 model = CpuModel::A73;
177 break;
178 case 0x801: // A53
179 model = CpuModel::A53;
180 break;
181 case 0x803: // A55r0
182 model = CpuModel::A55r0;
183 break;
184 case 0x804: // A76
185 model = CpuModel::GENERIC_FP16_DOT;
186 break;
187 case 0x805: // A55r1
188 model = CpuModel::A55r1;
189 break;
190 default:
191 model = CpuModel::GENERIC;
192 break;
193 }
194 }
195
196 return model;
197 }
198 } // namespace cpuinfo
199 } // namespace arm_compute