| /external/libffi/include/ |
| D | ffi_cfi.h | 14 # define cfi_def_cfa(reg, off) .cfi_def_cfa reg, off argument
15 # define cfi_def_cfa_register(reg) .cfi_def_cfa_register reg argument
18 # define cfi_offset(reg, off) .cfi_offset reg, off argument
19 # define cfi_rel_offset(reg, off) .cfi_rel_offset reg, off argument
21 # define cfi_return_column(reg) .cfi_return_column reg argument
22 # define cfi_restore(reg) .cfi_restore reg argument
23 # define cfi_same_value(reg) .cfi_same_value reg argument
24 # define cfi_undefined(reg) .cfi_undefined reg argument
36 # define cfi_def_cfa(reg, off) argument
37 # define cfi_def_cfa_register(reg) argument
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_cs.h | 43 static inline void radeon_set_config_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_config_reg_seq()
52 static inline void radeon_set_config_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_config_reg()
58 static inline void radeon_set_context_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_context_reg_seq()
67 static inline void radeon_set_context_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_context_reg()
75 unsigned reg, unsigned idx, in radeon_set_context_reg_idx()
86 unsigned reg, unsigned value, in radeon_set_context_reg_rmw()
97 static inline void radeon_set_sh_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_sh_reg_seq()
106 static inline void radeon_set_sh_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_sh_reg()
114 unsigned reg, unsigned idx, in radeon_set_sh_reg_idx()
130 static inline void radeon_set_uconfig_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_uconfig_reg_seq()
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| /external/tensorflow/tensorflow/lite/kernels/internal/optimized/ |
| D | depthwiseconv_uint8_transitional.h | 40 inline void util_vst1_u8(uint8* data_addr, uint8x8_t reg) { in util_vst1_u8()
43 inline void util_vst1_x8(uint8* data_addr, int8x8_t reg) { in util_vst1_x8()
46 inline void util_vst1_x8(int8* data_addr, int8x8_t reg) { in util_vst1_x8()
54 #define vst1_lane_s8x4(dst, reg, lane_num) \ argument
58 #define vst1_lane_u8x4(dst, reg, lane_num) \ argument
62 #define vst1q_lane_s8x4(dst, reg, lane_num) \ argument
66 #define vst1q_lane_u8x4(dst, reg, lane_num) \ argument
74 #define vld1q_lane_s8x8(src, reg, lane_num) \ argument
77 #define vld1_lane_8x4(src, reg, lane_num) \ argument
80 #define vld1q_lane_8x4(src, reg, lane_num) \ argument
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| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_sanity.c | 67 scan_register_key(const scan_register *reg) in scan_register_key()
77 fill_scan_register1d(scan_register *reg, in fill_scan_register1d()
87 fill_scan_register2d(scan_register *reg, in fill_scan_register2d()
97 scan_register_dst(scan_register *reg, in scan_register_dst()
115 scan_register_src(scan_register *reg, in scan_register_src()
135 scan_register *reg = MALLOC(sizeof(scan_register)); in create_scan_register_src() local
144 scan_register *reg = MALLOC(sizeof(scan_register)); in create_scan_register_dst() local
203 const scan_register *reg) in is_register_declared()
220 scan_register *reg = (scan_register *)cso_hash_iter_data(iter); in is_any_register_declared() local
232 scan_register *reg) in is_register_used()
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| D | tgsi_util.c | 54 tgsi_util_get_src_register_swizzle(const struct tgsi_src_register *reg, in tgsi_util_get_src_register_swizzle()
75 const struct tgsi_full_src_register *reg, in tgsi_util_get_full_src_register_swizzle()
83 tgsi_util_set_src_register_swizzle(struct tgsi_src_register *reg, in tgsi_util_set_src_register_swizzle()
108 const struct tgsi_full_src_register *reg, in tgsi_util_get_full_src_register_sign_mode()
137 tgsi_util_set_full_src_register_sign_mode(struct tgsi_full_src_register *reg, in tgsi_util_set_full_src_register_sign_mode()
433 tgsi_util_get_src_from_ind(const struct tgsi_ind_register *reg) in tgsi_util_get_src_from_ind()
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| /external/virglrenderer/src/gallium/auxiliary/tgsi/ |
| D | tgsi_sanity.c | 66 scan_register_key(const scan_register *reg) in scan_register_key()
76 fill_scan_register1d(scan_register *reg, in fill_scan_register1d()
86 fill_scan_register2d(scan_register *reg, in fill_scan_register2d()
96 scan_register_dst(scan_register *reg, in scan_register_dst()
114 scan_register_src(scan_register *reg, in scan_register_src()
134 scan_register *reg = MALLOC(sizeof(scan_register)); in create_scan_register_src() local
143 scan_register *reg = MALLOC(sizeof(scan_register)); in create_scan_register_dst() local
202 const scan_register *reg) in is_register_declared()
219 scan_register *reg = (scan_register *)cso_hash_iter_data(iter); in is_any_register_declared() local
231 scan_register *reg) in is_register_used()
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| D | tgsi_util.c | 53 const struct tgsi_src_register *reg, in tgsi_util_get_src_register_swizzle()
74 const struct tgsi_full_src_register *reg, in tgsi_util_get_full_src_register_swizzle()
84 struct tgsi_src_register *reg, in tgsi_util_set_src_register_swizzle()
108 const struct tgsi_full_src_register *reg, in tgsi_util_get_full_src_register_sign_mode()
137 struct tgsi_full_src_register *reg, in tgsi_util_set_full_src_register_sign_mode()
350 tgsi_util_get_src_from_ind(const struct tgsi_ind_register *reg) in tgsi_util_get_src_from_ind()
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_build_pm4.h | 42 static inline void radeon_set_config_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_config_reg_seq()
51 static inline void radeon_set_config_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_config_reg()
57 static inline void radeon_set_context_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_context_reg_seq()
66 static inline void radeon_set_context_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_context_reg()
72 static inline void radeon_set_context_reg_seq_array(struct radeon_cmdbuf *cs, unsigned reg, in radeon_set_context_reg_seq_array()
79 static inline void radeon_set_context_reg_idx(struct radeon_cmdbuf *cs, unsigned reg, unsigned idx, in radeon_set_context_reg_idx()
90 static inline void radeon_set_sh_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_sh_reg_seq()
99 static inline void radeon_set_sh_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_sh_reg()
105 static inline void radeon_set_uconfig_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_uconfig_reg_seq()
114 static inline void radeon_set_uconfig_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_uconfig_reg()
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| /external/mesa3d/src/mesa/drivers/dri/radeon/ |
| D | radeon_sanity.c | 322 struct reg { struct
324 struct reg_names *closest; argument
334 static struct reg regs[ARRAY_SIZE(reg_names)+1]; argument
370 static int find_or_add_value( struct reg *reg, int val ) in find_or_add_value()
388 static struct reg *lookup_reg( struct reg *tab, int reg ) in lookup_reg()
402 static const char *get_reg_name( struct reg *reg ) in get_reg_name()
429 static int print_int_reg_assignment( struct reg *reg, int data ) in print_int_reg_assignment()
453 static int print_float_reg_assignment( struct reg *reg, float data ) in print_float_reg_assignment()
484 static int print_reg_assignment( struct reg *reg, int data ) in print_reg_assignment()
495 static void print_reg( struct reg *reg ) in print_reg()
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| /external/google-breakpad/src/common/ |
| D | dwarf_cfi_to_module.cc | 178 unsigned reg = i; in RegisterName() local
192 void DwarfCFIToModule::Record(Module::Address address, int reg, in Record()
212 bool DwarfCFIToModule::UndefinedRule(uint64_t address, int reg) { in UndefinedRule()
218 bool DwarfCFIToModule::SameValueRule(uint64_t address, int reg) { in SameValueRule()
225 bool DwarfCFIToModule::OffsetRule(uint64_t address, int reg, in OffsetRule()
233 bool DwarfCFIToModule::ValOffsetRule(uint64_t address, int reg, in ValOffsetRule()
241 bool DwarfCFIToModule::RegisterRule(uint64_t address, int reg, in RegisterRule()
249 bool DwarfCFIToModule::ExpressionRule(uint64_t address, int reg, in ExpressionRule()
256 bool DwarfCFIToModule::ValExpressionRule(uint64_t address, int reg, in ValExpressionRule()
269 void DwarfCFIToModule::Reporter::UnnamedRegister(size_t offset, int reg) { in UnnamedRegister()
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| /external/mesa3d/src/mesa/drivers/dri/r200/ |
| D | r200_sanity.c | 600 struct reg { struct
602 struct reg_names *closest; argument
612 static struct reg regs[ARRAY_SIZE(reg_names)+1]; argument
648 static int find_or_add_value( struct reg *reg, int val ) in find_or_add_value()
666 static struct reg *lookup_reg( struct reg *tab, int reg ) in lookup_reg()
680 static const char *get_reg_name( struct reg *reg ) in get_reg_name()
707 static int print_int_reg_assignment( struct reg *reg, int data ) in print_int_reg_assignment()
731 static int print_float_reg_assignment( struct reg *reg, float data ) in print_float_reg_assignment()
762 static int print_reg_assignment( struct reg *reg, int data ) in print_reg_assignment()
773 static void print_reg( struct reg *reg ) in print_reg()
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| /external/compiler-rt/lib/sanitizer_common/ |
| D | sanitizer_asm.h | 27 # define CFI_REL_OFFSET(reg, n) .cfi_rel_offset reg, n argument
28 # define CFI_OFFSET(reg, n) .cfi_offset reg, n argument
29 # define CFI_DEF_CFA_REGISTER(reg) .cfi_def_cfa_register reg argument
30 # define CFI_DEF_CFA(reg, n) .cfi_def_cfa reg, n argument
31 # define CFI_RESTORE(reg) .cfi_restore reg argument
39 # define CFI_REL_OFFSET(reg, n) argument
40 # define CFI_OFFSET(reg, n) argument
41 # define CFI_DEF_CFA_REGISTER(reg) argument
42 # define CFI_DEF_CFA(reg, n) argument
43 # define CFI_RESTORE(reg) argument
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| /external/mesa3d/src/intel/compiler/ |
| D | brw_ir_vec4.h | 57 retype(src_reg reg, enum brw_reg_type type) in retype()
66 add_byte_offset(backend_reg *reg, unsigned bytes) in add_byte_offset()
100 byte_offset(src_reg reg, unsigned bytes) in byte_offset()
107 offset(src_reg reg, unsigned width, unsigned delta) in offset()
115 horiz_offset(src_reg reg, unsigned delta) in horiz_offset()
125 swizzle(src_reg reg, unsigned swizzle) in swizzle()
136 negate(src_reg reg) in negate()
144 is_uniform(const src_reg ®) in is_uniform()
174 retype(dst_reg reg, enum brw_reg_type type) in retype()
181 byte_offset(dst_reg reg, unsigned bytes) in byte_offset()
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| D | brw_ir_fs.h | 58 negate(fs_reg reg) in negate()
66 retype(fs_reg reg, enum brw_reg_type type) in retype()
73 byte_offset(fs_reg reg, unsigned delta) in byte_offset()
104 horiz_offset(const fs_reg ®, unsigned delta) in horiz_offset()
132 offset(fs_reg reg, unsigned width, unsigned delta) in offset()
155 component(fs_reg reg, unsigned idx) in component()
248 is_periodic(const fs_reg ®, unsigned n) in is_periodic()
272 is_uniform(const fs_reg ®) in is_uniform()
281 quarter(const fs_reg ®, unsigned idx) in quarter()
292 subscript(fs_reg reg, brw_reg_type type, unsigned i) in subscript()
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| D | brw_reg.h | 415 struct brw_reg reg; in brw_reg() local
556 retype(struct brw_reg reg, enum brw_reg_type type) in retype()
563 firsthalf(struct brw_reg reg) in firsthalf()
569 sechalf(struct brw_reg reg) in sechalf()
577 offset(struct brw_reg reg, unsigned delta) in offset()
585 byte_offset(struct brw_reg reg, unsigned bytes) in byte_offset()
594 suboffset(struct brw_reg reg, unsigned delta) in suboffset()
765 brw_address(struct brw_reg reg) in brw_address()
906 brw_flag_reg(int reg, int subreg) in brw_flag_reg()
988 stride(struct brw_reg reg, unsigned vstride, unsigned width, unsigned hstride) in stride()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r600_cs.h | 131 static inline void radeon_set_config_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_config_reg_seq()
139 static inline void radeon_set_config_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_config_reg()
145 static inline void radeon_set_context_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_context_reg_seq()
153 static inline void radeon_set_context_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_context_reg()
160 unsigned reg, unsigned idx, in radeon_set_context_reg_idx()
170 static inline void radeon_set_sh_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_sh_reg_seq()
178 static inline void radeon_set_sh_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_sh_reg()
184 static inline void radeon_set_uconfig_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_uconfig_reg_seq()
192 static inline void radeon_set_uconfig_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_uconfig_reg()
199 unsigned reg, unsigned idx, in radeon_set_uconfig_reg_idx()
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| /external/mesa3d/src/mesa/drivers/dri/i915/ |
| D | i915_program.c | 42 #define A0_DEST( reg ) (((reg)&UREG_TYPE_NR_MASK)>>UREG_A0_DEST_SHIFT_LEFT) argument
43 #define D0_DEST( reg ) (((reg)&UREG_TYPE_NR_MASK)>>UREG_A0_DEST_SHIFT_LEFT) argument
44 #define T0_DEST( reg ) (((reg)&UREG_TYPE_NR_MASK)>>UREG_A0_DEST_SHIFT_LEFT) argument
45 #define A0_SRC0( reg ) (((reg)&UREG_MASK)>>UREG_A0_SRC0_SHIFT_LEFT) argument
46 #define A1_SRC0( reg ) (((reg)&UREG_MASK)<<UREG_A1_SRC0_SHIFT_RIGHT) argument
47 #define A1_SRC1( reg ) (((reg)&UREG_MASK)>>UREG_A1_SRC1_SHIFT_LEFT) argument
48 #define A2_SRC1( reg ) (((reg)&UREG_MASK)<<UREG_A2_SRC1_SHIFT_RIGHT) argument
49 #define A2_SRC2( reg ) (((reg)&UREG_MASK)>>UREG_A2_SRC2_SHIFT_LEFT) argument
53 #define T0_SAMPLER( reg ) (GET_UREG_NR(reg)<<T0_SAMPLER_NR_SHIFT) argument
54 #define T1_ADDRESS_REG( reg ) ((GET_UREG_NR(reg)<<T1_ADDRESS_REG_NR_SHIFT) | \ argument
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| /external/mesa3d/src/mesa/state_tracker/ |
| D | st_glsl_to_tgsi_private.cpp | 54 st_src_reg *reg = ralloc(input, st_src_reg); in dup_reladdr() local
141 st_src_reg::st_src_reg(const st_src_reg ®) in st_src_reg()
146 void st_src_reg::operator=(const st_src_reg ®) in operator =()
163 st_src_reg::st_src_reg(st_dst_reg reg) in st_src_reg()
182 st_src_reg reg = *this; in get_abs() local
226 std::ostream& operator << (std::ostream& os, const st_src_reg& reg) in operator <<()
262 st_dst_reg::st_dst_reg(st_src_reg reg) in st_dst_reg()
316 st_dst_reg::st_dst_reg(const st_dst_reg ®) in st_dst_reg()
321 void st_dst_reg::operator=(const st_dst_reg ®) in operator =()
366 std::ostream& operator << (std::ostream& os, const st_dst_reg& reg) in operator <<()
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| /external/igt-gpu-tools/lib/ |
| D | intel_mmio.c | 245 intel_register_read(uint32_t reg) in intel_register_read()
286 intel_register_write(uint32_t reg, uint32_t val) in intel_register_write()
322 uint32_t INREG(uint32_t reg) in INREG()
339 uint16_t INREG16(uint32_t reg) in INREG16()
356 uint8_t INREG8(uint32_t reg) in INREG8()
372 void OUTREG(uint32_t reg, uint32_t val) in OUTREG()
388 void OUTREG16(uint32_t reg, uint16_t val) in OUTREG16()
404 void OUTREG8(uint32_t reg, uint8_t val) in OUTREG8()
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| /external/wpa_supplicant_8/src/wps/ |
| D | wps_registrar.c | 234 static void wps_registrar_add_authorized_mac(struct wps_registrar *reg, in wps_registrar_add_authorized_mac()
255 static void wps_registrar_remove_authorized_mac(struct wps_registrar *reg, in wps_registrar_remove_authorized_mac()
293 static struct wps_registrar_device * wps_device_get(struct wps_registrar *reg, in wps_device_get()
325 int wps_device_store(struct wps_registrar *reg, in wps_device_store()
346 static void wps_registrar_add_pbc_session(struct wps_registrar *reg, in wps_registrar_add_pbc_session()
398 static void wps_registrar_remove_pbc_session(struct wps_registrar *reg, in wps_registrar_remove_pbc_session()
429 int wps_registrar_pbc_overlap(struct wps_registrar *reg, in wps_registrar_pbc_overlap()
527 static int wps_build_selected_registrar(struct wps_registrar *reg, in wps_build_selected_registrar()
540 static int wps_build_sel_reg_dev_password_id(struct wps_registrar *reg, in wps_build_sel_reg_dev_password_id()
556 static int wps_build_sel_pbc_reg_uuid_e(struct wps_registrar *reg, in wps_build_sel_pbc_reg_uuid_e()
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| /external/igt-gpu-tools/tools/ |
| D | intel_reg_spec.h | 54 struct reg { struct
71 int parse_port_desc(struct reg *reg, const char *s); argument
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| D | intel_error_decode.c | 63 print_head(unsigned int reg) in print_head()
70 print_ctl(unsigned int reg) in print_ctl()
74 #define BIT_STR(reg, x, on, off) ((1 << (x)) & reg) ? on : off in print_ctl() argument
86 print_acthd(unsigned int reg, unsigned int ring_length) in print_acthd()
123 print_i830_pgtbl_err(unsigned int reg) in print_i830_pgtbl_err()
160 print_i915_pgtbl_err(unsigned int reg) in print_i915_pgtbl_err()
207 print_i965_pgtbl_err(unsigned int reg) in print_i965_pgtbl_err()
238 print_pgtbl_err(unsigned int reg, unsigned int devid) in print_pgtbl_err()
249 static void print_ivb_error(unsigned int reg, unsigned int devid) in print_ivb_error()
271 static void print_snb_error(unsigned int reg) in print_snb_error()
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| /external/igt-gpu-tools/assembler/ |
| D | brw_reg.h | 190 struct brw_reg reg; in brw_reg() local
300 retype(struct brw_reg reg, unsigned type) in retype()
307 sechalf(struct brw_reg reg) in sechalf()
315 suboffset(struct brw_reg reg, unsigned delta) in suboffset()
323 offset(struct brw_reg reg, unsigned delta) in offset()
331 byte_offset(struct brw_reg reg, unsigned bytes) in byte_offset()
465 brw_address(struct brw_reg reg) in brw_address()
566 brw_flag_reg(int reg, int subreg) in brw_flag_reg()
605 stride(struct brw_reg reg, unsigned vstride, unsigned width, unsigned hstride) in stride()
615 vec16(struct brw_reg reg) in vec16()
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| /external/arm-trusted-firmware/drivers/renesas/rcar/qos/ |
| D | qos_init.c | 61 #define PRR_PRODUCT_ERR(reg) \ argument
68 #define PRR_CUT_ERR(reg) \ argument
77 uint32_t reg; in rcar_qos_init() local
300 uint32_t reg; in get_refperiod() local
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| /external/arm-trusted-firmware/drivers/renesas/rzg/qos/ |
| D | qos_init.c | 45 #define PRR_PRODUCT_ERR(reg) \ argument
52 #define PRR_CUT_ERR(reg) \ argument
61 uint32_t reg; in rzg_qos_init() local
196 uint32_t reg; in get_refperiod() local
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