Home
last modified time | relevance | path

Searched defs:reg2 (Results 1 – 25 of 69) sorted by relevance

123

/external/libvpx/vpx_ports/
Dasmdefs_mmi.h21 #define MMI_ADDU(reg1, reg2, reg3) \ argument
24 #define MMI_ADDIU(reg1, reg2, immediate) \ argument
27 #define MMI_ADDI(reg1, reg2, immediate) \ argument
30 #define MMI_SUBU(reg1, reg2, reg3) \ argument
36 #define MMI_SRL(reg1, reg2, shift) \ argument
39 #define MMI_SLL(reg1, reg2, shift) \ argument
50 #define MMI_ADDU(reg1, reg2, reg3) \ argument
53 #define MMI_ADDIU(reg1, reg2, immediate) \ argument
56 #define MMI_ADDI(reg1, reg2, immediate) \ argument
59 #define MMI_SUBU(reg1, reg2, reg3) \ argument
[all …]
/external/vixl/src/aarch64/
Dregisters-aarch64.cc174 const CPURegister& reg2, in AreAliased()
225 const CPURegister& reg2, in AreSameSizeAndType()
245 const CPURegister& reg2, in AreEven()
265 const CPURegister& reg2, in AreConsecutive()
295 const CPURegister& reg2, in AreSameFormat()
307 const CPURegister& reg2, in AreSameLaneSize()
/external/arm-trusted-firmware/plat/mediatek/common/drivers/gpio/
Dmtgpio_common.c94 uintptr_t reg2; in mt_gpio_set_spec_pull_pupd() local
119 uintptr_t reg2; in mt_gpio_set_pull_pu_pd() local
158 uintptr_t reg2; in mt_gpio_get_spec_pull_pupd() local
186 uintptr_t reg2; in mt_gpio_get_pull_pu_pd() local
/external/arm-trusted-firmware/bl32/tsp/aarch64/
Dtsp_entrypoint.S35 .macro save_eret_context reg1 reg2
42 .macro restore_eret_context reg1 reg2
/external/libvpx/vp8/encoder/loongarch/
Dencodeopt_lsx.c18 __m128i reg0, reg1, reg2, reg3, error; in vp8_block_error_lsx() local
43 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, error; in vp8_mbblock_error_lsx() local
/external/llvm/test/MC/MachO/
Dbad-macro.s5 .macro test_macro reg1, reg2
/external/libmpeg2/common/armv8/
Dimpeg2_neon_macros.s53 .macro swp reg1, reg2
/external/libabigail/tests/data/test-abidiff-exit/
Dtest-decl-enum-v0.c5 void reg2(const enum disembodied_enum * foo) { (void)foo; } in reg2() function
Dtest-decl-enum-v1.c5 void reg2(const enum disembodied_enum * foo) { (void)foo; } in reg2() function
Dtest-decl-struct-v1.c5 void reg2(const struct disembodied * foo) { (void)foo; } in reg2() function
Dtest-decl-struct-v0.c5 void reg2(const struct disembodied * foo) { (void)foo; } in reg2() function
Dtest-member-size-v0.cc26 void reg2(U*) { } in reg2() function
Dtest-member-size-v1.cc27 void reg2(U*) { } in reg2() function
/external/libavc/common/armv8/
Dih264_neon_macros.s36 .macro swp reg1, reg2
/external/libxaac/decoder/armv8/
Dixheaacd_sbr_qmfsyn64_winadd.s39 .macro swp reg1, reg2
Dixheaacd_post_twiddle.s38 .macro swp reg1, reg2
Dixheaacd_pre_twiddle.s47 .macro swp reg1, reg2
Dixheaacd_sbr_imdct_using_fft.s47 .macro swp reg1, reg2
Dixheaacd_imdct_using_fft.s47 .macro swp reg1, reg2
/external/libprotobuf-mutator/examples/libfuzzer/
Dlibfuzzer_example.cc34 static PostProcessor<google::protobuf::Any> reg2 = { variable
Dlibfuzzer_bin_example.cc34 static PostProcessor<google::protobuf::Any> reg2 = { variable
/external/libvpx/vpx_dsp/loongarch/
Didct32x32_lsx.c93 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct32x8_row_even_process_store() local
185 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct32x8_row_odd_process_store() local
319 __m128i reg0, reg1, reg2, reg3; in idct_butterfly_transpose_store() local
450 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct8x32_column_even_process_store() local
545 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct8x32_column_odd_process_store() local
Dsubtract_lsx.c51 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in sub_blk_8x8_lsx() local
102 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in sub_blk_16x16_lsx() local
214 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in sub_blk_32x32_lsx() local
281 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in sub_blk_64x64_lsx() local
/external/libvpx/vpx_dsp/mips/
Didct32x32_msa.c45 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct32x8_row_even_process_store() local
129 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct32x8_row_odd_process_store() local
355 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct8x32_column_even_process_store() local
435 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct8x32_column_odd_process_store() local
/external/libvpx/third_party/libyuv/source/
Dcompare_msa.cc59 v4i32 reg0 = {0}, reg1 = {0}, reg2 = {0}, reg3 = {0}; in SumSquareError_MSA() local

123