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Searched defs:rm (Results 1 – 25 of 209) sorted by relevance

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/external/perfetto/src/trace_processor/containers/
Drow_map_unittest.cc29 RowMap rm(10, 20); in TEST() local
37 RowMap rm(10, 20); in TEST() local
43 RowMap rm(BitVector{true, false, false, false, true, true}); in TEST() local
49 RowMap rm(std::vector<uint32_t>{10, 17, 20, 21}); in TEST() local
55 RowMap rm(10, 20); in TEST() local
60 RowMap rm(BitVector{true, false, false, false, true, true}); in TEST() local
65 RowMap rm(std::vector<uint32_t>{10, 17, 20, 21}); in TEST() local
70 RowMap rm(10, 20); in TEST() local
76 RowMap rm(BitVector{true, false, false, false, true, true}); in TEST() local
82 RowMap rm(std::vector<uint32_t>{10, 17, 20, 21}); in TEST() local
[all …]
Drow_map_benchmark.cc62 void BenchRowMapGet(benchmark::State& state, RowMap rm) { in BenchRowMapGet()
78 RowMap rm = factory(); in BenchRowMapInsertIntoEmpty() local
88 RowMap rm, in BenchRowMapSelect()
131 RowMap rm(CreateRange(kSize)); in BM_RowMapSelectRangeWithRange() local
138 RowMap rm(CreateRange(kSize)); in BM_RowMapSelectRangeWithBv() local
145 RowMap rm(CreateRange(kSize)); in BM_RowMapSelectRangeWithIv() local
152 RowMap rm(CreateBitVector(kSize)); in BM_RowMapSelectBvWithRange() local
159 RowMap rm(CreateBitVector(kSize)); in BM_RowMapSelectBvWithBv() local
166 RowMap rm(CreateBitVector(kSize)); in BM_RowMapSelectBvWithIv() local
173 RowMap rm(CreateIndexVector(kSize, kSize)); in BM_RowMapSelectIvWithRange() local
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/external/vixl/src/aarch32/
Ddisasm-aarch32.cc1248 Register rm, in asr()
1262 Register rm, in asrs()
1342 void Disassembler::blx(Condition cond, Register rm) { in blx()
1347 void Disassembler::bx(Condition cond, Register rm) { in bx()
1352 void Disassembler::bxj(Condition cond, Register rm) { in bxj()
1374 void Disassembler::clz(Condition cond, Register rd, Register rm) { in clz()
1401 Register rm) { in crc32b()
1410 Register rm) { in crc32cb()
1419 Register rm) { in crc32ch()
1428 Register rm) { in crc32cw()
[all …]
Dmacro-assembler-aarch32.h1232 void Asr(Condition cond, Register rd, Register rm, const Operand& operand) { in Asr()
1249 void Asr(Register rd, Register rm, const Operand& operand) { in Asr()
1255 Register rm, in Asr()
1280 Register rm, in Asr()
1285 void Asrs(Condition cond, Register rd, Register rm, const Operand& operand) { in Asrs()
1295 void Asrs(Register rd, Register rm, const Operand& operand) { in Asrs()
1471 void Blx(Condition cond, Register rm) { in Blx()
1482 void Blx(Register rm) { Blx(al, rm); } in Blx()
1484 void Bx(Condition cond, Register rm) { in Bx()
1495 void Bx(Register rm) { Bx(al, rm); } in Bx()
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Dassembler-aarch32.cc1956 Register rm = operand.GetBaseRegister(); in adc() local
1993 Register rm = operand.GetBaseRegister(); in adc() local
2044 Register rm = operand.GetBaseRegister(); in adcs() local
2081 Register rm = operand.GetBaseRegister(); in adcs() local
2217 Register rm = operand.GetBaseRegister(); in add() local
2298 Register rm = operand.GetBaseRegister(); in add() local
2331 Register rm = operand.GetBaseRegister(); in add() local
2411 Register rm = operand.GetBaseRegister(); in adds() local
2467 Register rm = operand.GetBaseRegister(); in adds() local
2730 Register rm = operand.GetBaseRegister(); in and_() local
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Dassembler-aarch32.h2015 void asr(Register rd, Register rm, const Operand& operand) { in asr()
2018 void asr(Condition cond, Register rd, Register rm, const Operand& operand) { in asr()
2023 Register rm, in asr()
2033 void asrs(Register rd, Register rm, const Operand& operand) { in asrs()
2036 void asrs(Condition cond, Register rd, Register rm, const Operand& operand) { in asrs()
2041 Register rm, in asrs()
2118 void blx(Register rm) { blx(al, rm); } in blx()
2121 void bx(Register rm) { bx(al, rm); } in bx()
2124 void bxj(Register rm) { bxj(al, rm); } in bxj()
2140 void clz(Register rd, Register rm) { clz(al, rd, rm); } in clz()
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Doperands-aarch32.h65 Operand(Register rm) // NOLINT(runtime/explicit) in Operand()
73 Operand(Register rm, Shift shift) in Operand()
83 Operand(Register rm, Shift shift, uint32_t amount) in Operand()
111 Operand(Register rm, Shift shift, Register rs) in Operand()
372 NeonOperand(const VRegister& rm) // NOLINT(runtime/explicit) in NeonOperand()
423 SOperand(SRegister rm) // NOLINT(runtime/explicit) in SOperand()
464 DOperand(DRegister rm) // NOLINT(runtime/explicit) in DOperand()
501 QOperand(QRegister rm) // NOLINT(runtime/explicit) in QOperand()
884 Register rm, in AlignedMemOperand()
/external/perfetto/src/trace_processor/db/
Dcolumn_storage_overlay_unittest.cc29 ColumnStorageOverlay rm(0, 10000); in TEST() local
40 ColumnStorageOverlay rm(100, 10000); in TEST() local
49 ColumnStorageOverlay rm(100, 10000); in TEST() local
60 ColumnStorageOverlay rm(93, 157); in TEST() local
70 ColumnStorageOverlay rm(100000, 100010); in TEST() local
79 ColumnStorageOverlay rm(0, 100000); in TEST() local
90 ColumnStorageOverlay rm( in TEST() local
101 ColumnStorageOverlay rm(std::vector<uint32_t>{33, 2u, 45u, 7u, 8u, 9u}); in TEST() local
111 ColumnStorageOverlay rm(27, 31); in TEST() local
121 ColumnStorageOverlay rm(BitVector{true, false, true, true, false, true}); in TEST() local
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Dstorage_unittest.cc35 RowMap rm(0, 9); in TEST() local
47 RowMap rm(0, 9); in TEST() local
96 RowMap rm(0, 128); in TEST() local
108 RowMap rm(0, 10); in TEST() local
125 RowMap rm(0, 10); in TEST() local
139 RowMap rm(0, 10); in TEST() local
154 RowMap rm(0, 1025); in TEST() local
166 RowMap rm(0, 1025); in TEST() local
178 RowMap rm(0, 1025); in TEST() local
207 RowMap rm(0, 10); in TEST() local
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/external/tensorflow/tensorflow/compiler/xrt/kernels/
Dxrt_state_ops.h76 xla::Shape* shape, ResourceMgr* rm) { in ParseTupleNode()
129 int* device_ordinal, ResourceMgr* rm) { in ParseTupleTree()
192 ResourceMgr* rm; in Compute() local
233 ResourceMgr* rm; in Compute() local
337 ResourceMgr* rm; in Compute() local
392 ResourceMgr* rm; in Compute() local
446 ResourceMgr* rm; in Compute() local
506 ResourceMgr* rm; in Compute() local
559 ResourceMgr* rm; in Compute() local
652 ResourceMgr* rm; in Compute() local
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/external/vogar/src/vogar/tasks/
DRmTask.java24 private final Rm rm; field in RmTask
27 public RmTask(Rm rm, File file) { in RmTask()
/external/vogar/src/vogar/
DLocalTarget.java39 private final Rm rm; field in LocalTarget
41 public LocalTarget(Log log, Mkdir mkdir, Rm rm) { in LocalTarget()
62 @Override public void rm(File file) { in rm() method in LocalTarget
/external/arm-trusted-firmware/plat/mediatek/common/lpm/
Dmt_lp_rm.c17 int mt_lp_rm_register(struct mt_resource_manager *rm) in mt_lp_rm_register()
62 struct mt_resource_manager *rm = plat_mt_rm.plat_rm; in mt_lp_rm_find_and_run_constraint() local
94 struct mt_resource_manager *rm = plat_mt_rm.plat_rm; in mt_lp_rm_do_update() local
/external/XNNPACK/src/jit/
Daarch32-assembler.cc84 void Assembler::add(CoreRegister rd, CoreRegister rn, CoreRegister rm) { in add()
156 void Assembler::bx(CoreRegister rm) { in bx()
164 void Assembler::cmp(CoreRegister rn, CoreRegister rm) { in cmp()
194 void Assembler::mov(CoreRegister rd, CoreRegister rm) { in mov()
243 void Assembler::sub(CoreRegister rd, CoreRegister rn, CoreRegister rm) { in sub()
318 const uint8_t rm = op.mode() == AddressingMode::kPostIndexed ? 0xD : 0xF; in vld1() local
322 void Assembler::vld1(DataSize size, DRegisterList regs, MemOperand op, CoreRegister rm) { in vld1()
337 const uint32_t rm = op.mode() == AddressingMode::kPostIndexed ? 0xD : 0xF; in vld1_32() local
347 const uint32_t rm = op.mode() == AddressingMode::kPostIndexed ? 0xD : 0xF; in vld1r_32() local
363 const uint32_t rm = op.mode() == AddressingMode::kPostIndexed ? op.base().code : 0xF; in vld2r_32() local
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/external/tensorflow/tensorflow/core/framework/
Dresource_mgr_test.cc59 string Find(const ResourceMgr& rm, const string& container, in Find()
69 string LookupOrCreate(ResourceMgr* rm, const string& container, in LookupOrCreate()
89 Status FindErr(const ResourceMgr& rm, const string& container, in FindErr()
98 ResourceMgr rm; in TEST() local
152 ResourceMgr rm; in TEST() local
215 ResourceMgr rm; in TEST() local
228 ResourceMgr rm; in TEST() local
/external/cronet/third_party/protobuf/src/google/protobuf/util/
Dmessage_differencer_unittest.proto65 repeated TestField rm = 7; // Test TreatAsMap when key is a repeated field
75 repeated TestField rm = 12 [deprecated = true]; // Test for combinations field
/external/protobuf/src/google/protobuf/util/
Dmessage_differencer_unittest.proto65 repeated TestField rm = 7; // Test TreatAsMap when key is a repeated field
75 repeated TestField rm = 12 [deprecated = true]; // Test for combinations field
/external/perfetto/src/trace_processor/tables/
Dmacros_internal.h89 for (const auto& rm : parent.overlays()) { in MacroTable() local
128 RowMap rm = FilterToRowMap(cs, optimize_for); in FilterAndApplyToOverlays() local
194 for (const auto& rm : overlays_) { in AbstractConstIterator() local
/external/XNNPACK/src/xnnpack/
Daarch32-assembler.h369 void add(CoreRegister rn, CoreRegister rm) { add(rn, rn, rm); } in add()
393 void moveq(CoreRegister rd, CoreRegister rm) { mov(kEQ, rd, rm); } in moveq()
394 void movlo(CoreRegister rd, CoreRegister rm) { mov(kLO, rd, rm); } in movlo()
395 void movls(CoreRegister rd, CoreRegister rm) { mov(kLS, rd, rm); } in movls()
420 void vld1_8(DRegisterList regs, MemOperand op, CoreRegister rm) { vld1(k8, regs, op, rm); } in vld1_8()
481 void vst1_8(DRegisterList regs, MemOperand op, CoreRegister rm) { vst1(k8, regs, op, rm); } in vst1_8()
487 void vst1_16(DRegisterList regs, MemOperand op, CoreRegister rm) { vst1(k16, regs, op, rm); } in vst1_16()
493 void vst1_32(DRegisterList regs, MemOperand op, CoreRegister rm) { vst1(k32, regs, op, rm); } in vst1_32()
/external/vixl/test/aarch32/
Dtest-simulator-rd-rn-rm-t32.cc138 Register rm; member
145 uint32_t rm; member
504 Register rm = kTests[i].operands.rm; in TestHelper() local
578 uint32_t rm = results[i]->outputs[j].rm; in TestHelper() local
Dtest-simulator-rd-rn-rm-a32.cc138 Register rm; member
145 uint32_t rm; member
504 Register rm = kTests[i].operands.rm; in TestHelper() local
578 uint32_t rm = results[i]->outputs[j].rm; in TestHelper() local
Dtest-simulator-cond-dt-drt-drd-drn-drm-float-f64-t32.cc135 DRegister rm; member
143 uint64_t rm; member
1425 DRegister rm = kTests[i].operands.rm; in TestHelper() local
1511 uint64_t rm = results[i]->outputs[j].rm; in TestHelper() local
Dtest-simulator-cond-dt-drt-drd-drn-drm-float-f64-a32.cc135 DRegister rm; member
143 uint64_t rm; member
1425 DRegister rm = kTests[i].operands.rm; in TestHelper() local
1511 uint64_t rm = results[i]->outputs[j].rm; in TestHelper() local
/external/tensorflow/tensorflow/compiler/xrt/
Dxrt_device.cc56 OpKernelContext* ctx, ResourceMgr** rm) { in GetResourceManager()
66 ResourceMgr* rm; in GetOrCreateCompilationCache() local
/external/tensorflow/tensorflow/core/tpu/kernels/
Dtpu_embedding_ops.cc57 ResourceMgr* rm = GetTPUConfigResourceMgr(); in Compile() local
139 ResourceMgr* rm = GetTPUConfigResourceMgr(); in Compile() local
211 ResourceMgr* rm = GetTPUConfigResourceMgr(); in Compile() local

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