Searched defs:sqshlu (Results 1 – 6 of 6) sorted by relevance
/external/llvm/test/MC/AArch64/ |
D | arm64-advsimd.s | 1363 sqshlu d0, d0, #4 define
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/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 1658 __ sqshlu(b13, b14, 6); in GenerateTestSequenceNEON() local 1659 __ sqshlu(d0, d16, 44); in GenerateTestSequenceNEON() local 1660 __ sqshlu(h5, h29, 15); in GenerateTestSequenceNEON() local 1661 __ sqshlu(s29, s8, 13); in GenerateTestSequenceNEON() local 1662 __ sqshlu(v27.V16B(), v20.V16B(), 2); in GenerateTestSequenceNEON() local 1663 __ sqshlu(v24.V2D(), v12.V2D(), 11); in GenerateTestSequenceNEON() local 1664 __ sqshlu(v12.V2S(), v19.V2S(), 22); in GenerateTestSequenceNEON() local 1665 __ sqshlu(v8.V4H(), v12.V4H(), 11); in GenerateTestSequenceNEON() local 1666 __ sqshlu(v18.V4S(), v3.V4S(), 8); in GenerateTestSequenceNEON() local 1667 __ sqshlu(v3.V8B(), v10.V8B(), 1); in GenerateTestSequenceNEON() local [all …]
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D | test-api-movprfx-aarch64.cc | 2253 __ sqshlu(z10.VnB(), p1.Merging(), z10.VnB(), 0); in TEST() local 3628 __ sqshlu(z10.VnB(), p1.Merging(), z10.VnB(), 0); in TEST() local
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.cc | 5024 void Assembler::sqshlu(const VRegister& vd, const VRegister& vn, int shift) { in sqshlu() function in vixl::aarch64::Assembler
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D | assembler-sve-aarch64.cc | 8529 void Assembler::sqshlu(const ZRegister& zd, in sqshlu() function in vixl::aarch64::Assembler
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D | logic-aarch64.cc | 1689 LogicVRegister Simulator::sqshlu(VectorFormat vform, in sqshlu() function in vixl::aarch64::Simulator
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