• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 /*
2  * Copyright (c) 2021 Arm Limited.
3  *
4  * SPDX-License-Identifier: MIT
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to
8  * deal in the Software without restriction, including without limitation the
9  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10  * sell copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in all
14  * copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22  * SOFTWARE.
23  */
24 
25 #include <cstddef>
26 #include <cstdint>
27 
28 #if defined(ARM_COMPUTE_ENABLE_SVE)
29 
30 namespace arm_conv {
31 namespace depthwise {
32 
sve_fp32_nhwc_generic_output9_mla_depthfirst_impl(const float * const * const inptrs,float * const * const outptrs,const void * params,const void * bias,const unsigned int n_points,const unsigned int n_channels,const float activation_min,const float activation_max)33 void sve_fp32_nhwc_generic_output9_mla_depthfirst_impl(
34   const float *const *const inptrs,
35   float *const *const outptrs,
36   const void *params,
37   const void *bias,
38   const unsigned int n_points,
39   const unsigned int n_channels,
40   const float activation_min,
41   const float activation_max
42 )
43 {
44   const float minmax_vals[2] = { activation_min, activation_max };
45 
46   __asm__ __volatile__(
47     "ptrue p1.b\n"
48     "ld1rw { z4.s }, p1/Z, [%x[minmax_vals]]\n"
49     "mov x28, #0x0\n"
50     "ld1rw { z3.s }, p1/Z, [%x[minmax_vals], #4]\n"
51     "whilelt p0.s, x28, %x[n_channels]\n"
52     "1:"  // Channel loop
53     "mov z2.b, #0x0\n"
54     "cbz %x[bias], 2f\n"
55     "ld1w { z2.s }, p0/Z, [%x[bias], x28, LSL #2]\n"
56     "2:"  // Channel loop: Load bias: Done
57     "mov z1.d, z2.d\n"
58     "ld1w { z0.s }, p1/Z, [%x[params]]\n"
59     "mov x22, %x[inptrs]\n"
60     "mov z31.d, z2.d\n"
61     "ldp x20, x19, [x22], #0x10\n"
62     "subs x21, %x[n_points], #0x1\n"
63     "mov z30.d, z2.d\n"
64     "ld1w { z29.s }, p0/Z, [x20, x28, LSL #2]\n"
65     "mov z28.d, z2.d\n"
66     "addvl %x[params], %x[params], #1\n"
67     "mov z27.d, z2.d\n"
68     "ld1w { z26.s }, p0/Z, [x19, x28, LSL #2]\n"
69     "mov z25.d, z2.d\n"
70     "ldp x20, x19, [x22], #0x10\n"
71     "mov z24.d, z2.d\n"
72     "ld1w { z23.s }, p0/Z, [x20, x28, LSL #2]\n"
73     "mov z22.d, z2.d\n"
74     "ld1w { z21.s }, p0/Z, [x19, x28, LSL #2]\n"
75     "ldp x20, x19, [x22], #0x10\n"
76     "ld1w { z20.s }, p0/Z, [x20, x28, LSL #2]\n"
77     "ld1w { z19.s }, p0/Z, [x19, x28, LSL #2]\n"
78     "ldp x20, x19, [x22], #0x10\n"
79     "ld1w { z18.s }, p0/Z, [x20, x28, LSL #2]\n"
80     "ld1w { z17.s }, p0/Z, [x19, x28, LSL #2]\n"
81     "ldr x19, [x22], #0x8\n"
82     "ld1w { z16.s }, p0/Z, [x19, x28, LSL #2]\n"
83     "ble 4f\n"
84     "3:"  // Channel loop: Planar loop
85     "fmla z2.s, p1/M, z29.s, z0.s\n"
86     "ldp x20, x19, [x22], #0x10\n"
87     "subs x21, x21, #0x1\n"
88     "fmla z1.s, p1/M, z26.s, z0.s\n"
89     "ld1w { z29.s }, p0/Z, [x20, x28, LSL #2]\n"
90     "fmla z31.s, p1/M, z23.s, z0.s\n"
91     "fmla z30.s, p1/M, z21.s, z0.s\n"
92     "ld1w { z26.s }, p0/Z, [x19, x28, LSL #2]\n"
93     "fmla z28.s, p1/M, z20.s, z0.s\n"
94     "ldp x20, x19, [x22], #0x10\n"
95     "fmla z27.s, p1/M, z19.s, z0.s\n"
96     "ld1w { z23.s }, p0/Z, [x20, x28, LSL #2]\n"
97     "fmla z25.s, p1/M, z18.s, z0.s\n"
98     "fmla z24.s, p1/M, z17.s, z0.s\n"
99     "ld1w { z21.s }, p0/Z, [x19, x28, LSL #2]\n"
100     "fmla z22.s, p1/M, z16.s, z0.s\n"
101     "ld1w { z0.s }, p1/Z, [%x[params]]\n"
102     "addvl %x[params], %x[params], #1\n"
103     "ldp x20, x19, [x22], #0x10\n"
104     "ld1w { z20.s }, p0/Z, [x20, x28, LSL #2]\n"
105     "ld1w { z19.s }, p0/Z, [x19, x28, LSL #2]\n"
106     "ldp x20, x19, [x22], #0x10\n"
107     "ld1w { z18.s }, p0/Z, [x20, x28, LSL #2]\n"
108     "ld1w { z17.s }, p0/Z, [x19, x28, LSL #2]\n"
109     "ldr x19, [x22], #0x8\n"
110     "ld1w { z16.s }, p0/Z, [x19, x28, LSL #2]\n"
111     "bgt 3b\n"
112     "4:"  // Channel loop: Planar tail
113     "fmla z2.s, p1/M, z29.s, z0.s\n"
114     "ldp x27, x26, [%x[outptrs], #0x0]\n"
115     "fmla z1.s, p1/M, z26.s, z0.s\n"
116     "ldp x25, x24, [%x[outptrs], #0x10]\n"
117     "fmla z31.s, p1/M, z23.s, z0.s\n"
118     "ldp x23, x22, [%x[outptrs], #0x20]\n"
119     "fmla z30.s, p1/M, z21.s, z0.s\n"
120     "ldp x21, x20, [%x[outptrs], #0x30]\n"
121     "fmla z28.s, p1/M, z20.s, z0.s\n"
122     "ldr x19, [%x[outptrs], #0x40]\n"
123     "fmla z27.s, p1/M, z19.s, z0.s\n"
124     "fmla z25.s, p1/M, z18.s, z0.s\n"
125     "fmla z24.s, p1/M, z17.s, z0.s\n"
126     "fmla z22.s, p1/M, z16.s, z0.s\n"
127     "fmax z2.s, p1/M, z2.s, z4.s\n"
128     "fmax z1.s, p1/M, z1.s, z4.s\n"
129     "fmax z31.s, p1/M, z31.s, z4.s\n"
130     "fmax z30.s, p1/M, z30.s, z4.s\n"
131     "fmin z2.s, p1/M, z2.s, z3.s\n"
132     "st1w { z2.s }, p0, [x27, x28, LSL #2]\n"
133     "fmin z1.s, p1/M, z1.s, z3.s\n"
134     "fmin z31.s, p1/M, z31.s, z3.s\n"
135     "st1w { z1.s }, p0, [x26, x28, LSL #2]\n"
136     "fmin z30.s, p1/M, z30.s, z3.s\n"
137     "fmax z28.s, p1/M, z28.s, z4.s\n"
138     "st1w { z31.s }, p0, [x25, x28, LSL #2]\n"
139     "fmax z27.s, p1/M, z27.s, z4.s\n"
140     "st1w { z30.s }, p0, [x24, x28, LSL #2]\n"
141     "fmin z28.s, p1/M, z28.s, z3.s\n"
142     "fmax z25.s, p1/M, z25.s, z4.s\n"
143     "st1w { z28.s }, p0, [x23, x28, LSL #2]\n"
144     "fmin z27.s, p1/M, z27.s, z3.s\n"
145     "fmin z25.s, p1/M, z25.s, z3.s\n"
146     "st1w { z27.s }, p0, [x22, x28, LSL #2]\n"
147     "fmax z24.s, p1/M, z24.s, z4.s\n"
148     "fmax z22.s, p1/M, z22.s, z4.s\n"
149     "st1w { z25.s }, p0, [x21, x28, LSL #2]\n"
150     "fmin z24.s, p1/M, z24.s, z3.s\n"
151     "st1w { z24.s }, p0, [x20, x28, LSL #2]\n"
152     "fmin z22.s, p1/M, z22.s, z3.s\n"
153     "st1w { z22.s }, p0, [x19, x28, LSL #2]\n"
154     "incw x28\n"
155     "whilelt p0.s, x28, %x[n_channels]\n"
156     "b.any 1b\n"
157     : [params] "+&r" (params)
158     : [bias] "r" (bias), [inptrs] "r" (inptrs), [minmax_vals] "r" (minmax_vals), [n_channels] "r" ((uint64_t) n_channels), [n_points] "r" ((uint64_t) n_points), [outptrs] "r" (outptrs)
159     : "cc", "memory", "p0", "p1", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
160   );
161 }
162 
163 }  // namespace depthwise
164 }  // namespace arm_conv
165 
166 #endif  // defined(ARM_COMPUTE_ENABLE_SVE)
167