| /external/llvm/test/MC/AArch64/ |
| D | arm64-fp-encoding.s | 504 ucvtf d1, w2 define
505 ucvtf d1, w2, #1 define
510 ucvtf d1, x2 define
511 ucvtf d1, x2, #1 define
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| D | arm64-advsimd.s | 1379 ucvtf d0, d0, #2 define
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| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 595 __ ucvtf(d0, d9); in GenerateTestSequenceFP() local
596 __ ucvtf(d5, d22, 47); in GenerateTestSequenceFP() local
597 __ ucvtf(d30, w27); in GenerateTestSequenceFP() local
598 __ ucvtf(d3, w19, 1); in GenerateTestSequenceFP() local
599 __ ucvtf(d28, x21); in GenerateTestSequenceFP() local
600 __ ucvtf(d27, x30, 35); in GenerateTestSequenceFP() local
601 __ ucvtf(s11, s5); in GenerateTestSequenceFP() local
602 __ ucvtf(s0, s23, 14); in GenerateTestSequenceFP() local
603 __ ucvtf(s20, w19); in GenerateTestSequenceFP() local
604 __ ucvtf(s21, w22, 18); in GenerateTestSequenceFP() local
[all …]
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| D | test-api-movprfx-aarch64.cc | 586 __ ucvtf(z13.VnD(), p4.Merging(), z13.VnS()); in TEST() local
589 __ ucvtf(z6.VnH(), p0.Merging(), z6.VnH()); in TEST() local
592 __ ucvtf(z19.VnH(), p4.Merging(), z19.VnS()); in TEST() local
595 __ ucvtf(z0.VnH(), p5.Merging(), z0.VnD()); in TEST() local
1067 __ ucvtf(z8.VnD(), p3.Merging(), z1.VnS()); in TEST() local
1070 __ ucvtf(z0.VnH(), p0.Merging(), z12.VnH()); in TEST() local
1073 __ ucvtf(z8.VnH(), p3.Merging(), z4.VnS()); in TEST() local
1076 __ ucvtf(z20.VnH(), p2.Merging(), z11.VnD()); in TEST() local
1933 __ ucvtf(z7.VnD(), p3.Merging(), z26.VnS()); in TEST() local
1936 __ ucvtf(z13.VnD(), p7.Merging(), z17.VnD()); in TEST() local
[all …]
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| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.cc | 3229 void Assembler::ucvtf(const VRegister& vd, const VRegister& vn, int fbits) { in ucvtf() function in vixl::aarch64::Assembler
3280 void Assembler::ucvtf(const VRegister& vd, const Register& rn, int fbits) { in ucvtf() function in vixl::aarch64::Assembler
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| D | logic-aarch64.cc | 6882 LogicVRegister Simulator::ucvtf(VectorFormat vform, in ucvtf() function in vixl::aarch64::Simulator
6926 LogicVRegister Simulator::ucvtf(VectorFormat vform, in ucvtf() function in vixl::aarch64::Simulator
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| D | assembler-sve-aarch64.cc | 1949 void Assembler::ucvtf(const ZRegister& zd, in ucvtf() function in vixl::aarch64::Assembler
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