1 /*
2 * Copyright (c) 2021-2023 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24 #include "src/cpu/operators/CpuGemmConv2d.h"
25
26 #include "arm_compute/core/Size2D.h"
27 #include "arm_compute/core/TensorInfo.h"
28 #include "arm_compute/core/Utils.h"
29 #include "arm_compute/core/Validate.h"
30 #include "arm_compute/core/utils/misc/ShapeCalculator.h"
31 #include "arm_compute/core/utils/quantization/AsymmHelpers.h"
32 #include "arm_compute/runtime/NEON/NEScheduler.h"
33
34 #include "src/common/utils/Log.h"
35 #include "src/core/helpers/MemoryHelpers.h"
36 #include "src/cpu/kernels/CpuCol2ImKernel.h"
37 #include "src/cpu/kernels/CpuIm2ColKernel.h"
38 #include "src/cpu/kernels/CpuReshapeKernel.h"
39 #include "src/cpu/kernels/CpuWeightsReshapeKernel.h"
40 #include "src/cpu/operators/CpuGemm.h"
41 #include "src/cpu/operators/CpuGemmLowpMatrixMultiplyCore.h"
42 #include "src/cpu/operators/CpuGemmLowpOutputStage.h"
43 #include "src/cpu/utils/CpuAuxTensorHandler.h"
44
45 #include <set>
46 #include <tuple>
47
48 using namespace arm_compute::misc::shape_calculator;
49 using namespace arm_compute::experimental;
50
51 namespace arm_compute
52 {
53 namespace cpu
54 {
skip_im_col_info(const ITensorInfo * src,const ITensorInfo * weights,const PadStrideInfo & conv_info,const Size2D & dilation,const ActivationLayerInfo & act_info)55 CpuGemmConv2d::SkipInfo CpuGemmConv2d::skip_im_col_info(const ITensorInfo *src, const ITensorInfo *weights, const PadStrideInfo &conv_info,
56 const Size2D &dilation, const ActivationLayerInfo &act_info)
57 {
58 const DataLayout data_layout = src->data_layout();
59 const int idx_width = get_data_layout_dimension_index(data_layout, DataLayoutDimension::WIDTH);
60 const int idx_height = get_data_layout_dimension_index(data_layout, DataLayoutDimension::HEIGHT);
61 const unsigned int kernel_width = weights->dimension(idx_width);
62 const unsigned int kernel_height = weights->dimension(idx_height);
63 unsigned int conv_w = 0;
64 unsigned int conv_h = 0;
65 std::tie(conv_w, conv_h) = scaled_dimensions(src->dimension(idx_width),
66 src->dimension(idx_height),
67 kernel_width,
68 kernel_height,
69 conv_info,
70 dilation);
71 const bool skip_im2col = (data_layout == DataLayout::NHWC && kernel_width == 1 && kernel_height == 1 && conv_info.stride().first == 1 && conv_info.stride().second == 1);
72
73 if(skip_im2col)
74 {
75 const bool skip_col2im = (data_layout == DataLayout::NHWC && (bool(CpuGemmConv2d::validate_gemm3d(src, weights, act_info, conv_h, /*skip_im2col*/ true))));
76 if(skip_col2im)
77 {
78 return { true, true };
79 }
80 }
81 else
82 {
83 const bool skip_col2im = (data_layout == DataLayout::NHWC && (bool(CpuGemmConv2d::validate_gemm3d(src, weights, act_info, conv_h, /*skip_im2col*/ false))));
84 if(skip_col2im)
85 {
86 return { false, true };
87 }
88 }
89
90 // Default case when we cannot reinterpret the input and output as 3D.
91 return { false, false };
92 }
93
CpuGemmConv2d()94 CpuGemmConv2d::CpuGemmConv2d()
95 : _weights_reshape_kernel(nullptr), _im2col_kernel(), _mm_gemm(), _mm_gemmlowp(), _col2im_kernel(), _reshape_kernel(), _im2col_output(), _weights_reshaped(), _gemm_output(), _gemm_output_3d(),
96 _data_layout(DataLayout::NCHW), _skip_im2col(false), _skip_col2im(false), _is_quantized(false), _is_prepared(false), _aux_mem(AuxTensorIdx::Count)
97 {
98 }
99 CpuGemmConv2d::~CpuGemmConv2d() = default;
100
configure_mm(const ITensorInfo * src,const ITensorInfo * weights,const ITensorInfo * biases,ITensorInfo * dst,const ActivationLayerInfo & act_info,bool enable_fast_math,int gemm_3d_depth,bool fixed_format,arm_compute::WeightFormat weight_format)101 void CpuGemmConv2d::configure_mm(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, ITensorInfo *dst, const ActivationLayerInfo &act_info,
102 bool enable_fast_math, int gemm_3d_depth, bool fixed_format, arm_compute::WeightFormat weight_format)
103 {
104 ARM_COMPUTE_ERROR_ON_NULLPTR(src, weights);
105 ARM_COMPUTE_ERROR_THROW_ON(validate_mm(src, weights, biases, dst, act_info, enable_fast_math, gemm_3d_depth, _skip_im2col, fixed_format, weight_format));
106
107 // Create GEMMInfo structure
108 const GEMMInfo &gemm_info = GEMMInfo(false, false, true /* Reshape weights only for the first run */,
109 gemm_3d_depth, _skip_im2col /* Reinterpret the input as 3D if im2col is skipped */,
110 false, GEMMLowpOutputStageInfo(), false, enable_fast_math, false, act_info, experimental::PostOpList<ITensorInfo *>(), fixed_format, weight_format);
111
112 // Supported activations in GEMM
113 const std::set<ActivationLayerInfo::ActivationFunction> supported_acts = { ActivationLayerInfo::ActivationFunction::RELU,
114 ActivationLayerInfo::ActivationFunction::BOUNDED_RELU,
115 ActivationLayerInfo::ActivationFunction::LU_BOUNDED_RELU
116 };
117
118 if(_is_quantized)
119 {
120 TensorInfo tmp_src{ *src };
121 TensorInfo tmp_weights{ *weights };
122 // Since we need negative offsets for computing convolution, we need to change QuantizationInfo()
123 // Extract and negate input and weights offset
124 const QuantizationInfo iqinfo = src->quantization_info();
125 const QuantizationInfo wqinfo = weights->quantization_info();
126 const QuantizationInfo oqinfo = (dst->total_size() == 0) ? iqinfo : dst->quantization_info();
127 const UniformQuantizationInfo uiqinfo = iqinfo.uniform();
128 const UniformQuantizationInfo uoqinfo = oqinfo.uniform();
129 const DataType data_type = src->data_type();
130
131 tmp_src.set_quantization_info(QuantizationInfo(uiqinfo.scale, -uiqinfo.offset));
132 if(!is_data_type_quantized_per_channel(tmp_weights.data_type()))
133 {
134 const UniformQuantizationInfo uwqinfo = wqinfo.uniform();
135 tmp_weights.set_quantization_info(QuantizationInfo(uwqinfo.scale, -uwqinfo.offset));
136 }
137
138 // Merge activation with output stage
139 PixelValue type_min{};
140 PixelValue type_max{};
141 std::tie(type_min, type_max) = get_min_max(data_type);
142 int32_t min_activation = type_min.get<int32_t>();
143 int32_t max_activation = type_max.get<int32_t>();
144
145 if(supported_acts.count(act_info.activation()) != 0)
146 {
147 std::tie(min_activation, max_activation) = get_quantized_activation_min_max(act_info, data_type, uoqinfo);
148 }
149
150 GEMMLowpOutputStageInfo output_info;
151 output_info.type = GEMMLowpOutputStageType::QUANTIZE_DOWN_FIXEDPOINT;
152 output_info.gemmlowp_offset = uoqinfo.offset;
153 output_info.gemmlowp_min_bound = min_activation;
154 output_info.gemmlowp_max_bound = max_activation;
155 output_info.is_quantized_per_channel = (tmp_weights.data_type() == DataType::QSYMM8_PER_CHANNEL);
156 quantization::calculate_quantized_multipliers(iqinfo, wqinfo, oqinfo, output_info);
157
158 _mm_gemmlowp = std::make_unique<CpuGemmLowpMatrixMultiplyCore>();
159 _mm_gemmlowp->configure(&tmp_src, &tmp_weights, biases, dst, GEMMInfo(false, false, true, gemm_3d_depth, _skip_im2col, false, output_info, false, enable_fast_math, false, act_info,
160 experimental::PostOpList<ITensorInfo *>(), fixed_format, weight_format));
161
162 auto mm_mem_req = _mm_gemmlowp->workspace();
163 for(unsigned int cont = 0; cont < mm_mem_req.size(); ++cont)
164 {
165 _aux_mem[cont] = mm_mem_req[cont];
166 }
167 }
168 else
169 {
170 // Configure matrix multiply function
171 _mm_gemm = std::make_unique<CpuGemm>();
172 _mm_gemm->configure(src, weights, biases, dst, 1.0f, 0.0f, gemm_info);
173 auto mm_mem_req = _mm_gemm->workspace();
174 for(unsigned int cont = 0; cont < mm_mem_req.size(); ++cont)
175 {
176 _aux_mem[cont] = mm_mem_req[cont];
177 }
178 }
179 }
180
validate_mm(const ITensorInfo * src,const ITensorInfo * weights,const ITensorInfo * biases,const ITensorInfo * dst,const ActivationLayerInfo & act_info,bool enable_fast_math,int gemm_3d_depth,bool skip_im2col,bool fixed_format,arm_compute::WeightFormat weight_format)181 Status CpuGemmConv2d::validate_mm(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *dst,
182 const ActivationLayerInfo &act_info, bool enable_fast_math, int gemm_3d_depth, bool skip_im2col, bool fixed_format, arm_compute::WeightFormat weight_format)
183 {
184 const DataType data_type = src->data_type();
185 const bool is_quantized = is_data_type_quantized_asymmetric(data_type);
186 const bool is_activation_enabled = act_info.enabled();
187
188 // Create GEMMInfo structure
189 const GEMMInfo gemm_info = GEMMInfo(false, false, true /* Reshape weights only for the first run */,
190 gemm_3d_depth, skip_im2col /* Reinterpret the input as 3D if im2col is skipped */,
191 false, GEMMLowpOutputStageInfo(), false, enable_fast_math, false, act_info, experimental::PostOpList<ITensorInfo *>(), fixed_format, weight_format);
192
193 if(is_quantized)
194 {
195 // Since we need negative offsets for computing convolution, we need to change QuantizationInfo()
196 // Extract and negate input and weights offset
197 const QuantizationInfo &iqinfo = src->quantization_info();
198 const QuantizationInfo &wqinfo = weights->quantization_info();
199 const QuantizationInfo &oqinfo = (dst->total_size() == 0) ? iqinfo : dst->quantization_info();
200 const UniformQuantizationInfo uoqinfo = oqinfo.uniform();
201
202 // Merge activation with output stage
203 PixelValue type_min{};
204 PixelValue type_max{};
205 std::tie(type_min, type_max) = get_min_max(data_type);
206 int32_t min_activation = type_min.get<int32_t>();
207 int32_t max_activation = type_max.get<int32_t>();
208
209 const std::set<ActivationLayerInfo::ActivationFunction> supported_acts = { ActivationLayerInfo::ActivationFunction::RELU,
210 ActivationLayerInfo::ActivationFunction::BOUNDED_RELU,
211 ActivationLayerInfo::ActivationFunction::LU_BOUNDED_RELU
212 };
213 if(is_activation_enabled && supported_acts.count(act_info.activation()) != 0)
214 {
215 std::tie(min_activation, max_activation) = get_quantized_activation_min_max(act_info, data_type, uoqinfo);
216 }
217
218 GEMMLowpOutputStageInfo output_info;
219 output_info.type = GEMMLowpOutputStageType::QUANTIZE_DOWN_FIXEDPOINT;
220 output_info.gemmlowp_offset = uoqinfo.offset;
221 output_info.gemmlowp_min_bound = min_activation;
222 output_info.gemmlowp_max_bound = max_activation;
223 output_info.is_quantized_per_channel = (weights->data_type() == DataType::QSYMM8_PER_CHANNEL);
224 ARM_COMPUTE_RETURN_ON_ERROR(quantization::calculate_quantized_multipliers(iqinfo, wqinfo, oqinfo, output_info));
225
226 // Perform validation step on GEMMLowp
227 std::unique_ptr<ITensorInfo> input_qa = src->clone();
228 std::unique_ptr<ITensorInfo> weights_qa = weights->clone();
229 input_qa->set_quantization_info(QuantizationInfo(iqinfo.uniform().scale, -iqinfo.uniform().offset));
230 weights_qa->set_quantization_info(QuantizationInfo(wqinfo.uniform().scale, -wqinfo.uniform().offset));
231
232 return CpuGemmLowpMatrixMultiplyCore::validate(input_qa.get(), weights_qa.get(), biases, dst, GEMMInfo(false, false, true, gemm_3d_depth, skip_im2col, false, output_info, false, enable_fast_math,
233 false, act_info));
234 }
235 else
236 {
237 // Perform validation step on Matrix multiply function
238 return CpuGemm::validate(src, weights, nullptr, dst, 1.0f, 0.0f, gemm_info);
239 }
240 }
241
validate_gemm3d(const ITensorInfo * input_info,const ITensorInfo * weights_info,const ActivationLayerInfo & act_info,int gemm_3d_depth,bool skip_im2col)242 Status CpuGemmConv2d::validate_gemm3d(const ITensorInfo *input_info, const ITensorInfo *weights_info, const ActivationLayerInfo &act_info, int gemm_3d_depth, bool skip_im2col)
243 {
244 const DataType data_type = input_info->data_type();
245 const unsigned int mult_y = skip_im2col ? 1U : gemm_3d_depth;
246 const unsigned int mult_z = skip_im2col ? gemm_3d_depth : 1U;
247
248 // Set dummy tensor shapes for the validation
249 const TensorInfo dummy_input_info(TensorShape(4U, 4U * mult_y, 1U * mult_z), 1, data_type, input_info->quantization_info());
250 const TensorInfo dummy_weights_info(TensorShape(4U, 4U), 1, data_type, weights_info->quantization_info());
251 const TensorInfo dummy_output_info(TensorShape(4U, 4U, gemm_3d_depth), 1, data_type, input_info->quantization_info());
252
253 return validate_mm(&dummy_input_info, &dummy_weights_info, nullptr, &dummy_output_info, act_info, false, gemm_3d_depth, skip_im2col);
254 }
255
configure(const ITensorInfo * src,const ITensorInfo * weights,const ITensorInfo * biases,ITensorInfo * dst,const PadStrideInfo & conv_info,const WeightsInfo & weights_info,const Size2D & dilation,const ActivationLayerInfo & act_info,bool enable_fast_math,unsigned int num_groups)256 void CpuGemmConv2d::configure(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, ITensorInfo *dst, const PadStrideInfo &conv_info, const WeightsInfo &weights_info,
257 const Size2D &dilation, const ActivationLayerInfo &act_info, bool enable_fast_math, unsigned int num_groups)
258 {
259 ARM_COMPUTE_ERROR_ON_NULLPTR(src, weights, dst);
260 ARM_COMPUTE_UNUSED(num_groups, weights_info);
261 ARM_COMPUTE_ERROR_THROW_ON(CpuGemmConv2d::validate(src,
262 weights,
263 biases,
264 dst,
265 conv_info,
266 weights_info,
267 dilation,
268 act_info,
269 enable_fast_math,
270 num_groups));
271 ARM_COMPUTE_LOG_PARAMS(src, weights, biases, dst, conv_info, weights_info, dilation, act_info, enable_fast_math, num_groups);
272
273 const DataType data_type = src->data_type();
274 const DataLayout data_layout = src->data_layout();
275 const int idx_width = get_data_layout_dimension_index(data_layout, DataLayoutDimension::WIDTH);
276 const int idx_height = get_data_layout_dimension_index(data_layout, DataLayoutDimension::HEIGHT);
277 const int idx_kernels = get_data_layout_dimension_index(data_layout, DataLayoutDimension::BATCHES);
278
279 const unsigned int kernel_width = weights->dimension(idx_width);
280 const unsigned int kernel_height = weights->dimension(idx_height);
281
282 _is_prepared = weights_info.retain_internal_weights();
283 _is_quantized = is_data_type_quantized_asymmetric(src->data_type());
284 _data_layout = data_layout;
285 _skip_im2col = (data_layout == DataLayout::NHWC && kernel_width == 1 && kernel_height == 1 && conv_info.stride().first == 1 && conv_info.stride().second == 1);
286
287 const ITensorInfo *gemm_input_to_use = src;
288 ITensorInfo *gemm_output_to_use = dst;
289
290 // Get convolved dimensions
291 unsigned int conv_w = 0;
292 unsigned int conv_h = 0;
293 std::tie(conv_w, conv_h) = scaled_dimensions(src->dimension(idx_width),
294 src->dimension(idx_height),
295 kernel_width,
296 kernel_height,
297 conv_info,
298 dilation);
299
300 ARM_COMPUTE_ERROR_ON_MSG((dst->dimension(idx_width) != conv_w) || (dst->dimension(idx_height) != conv_h),
301 "Output shape does not match the expected one");
302
303 // Check if GEMM3D is supported
304 const CpuGemmConv2d::SkipInfo skip_info = CpuGemmConv2d::skip_im_col_info(src, weights, conv_info, dilation, act_info);
305 _skip_im2col = skip_info.skip_im2col;
306 _skip_col2im = skip_info.skip_col2im;
307
308 // Get parameters from conv_info
309 unsigned int stride_x = 0;
310 unsigned int stride_y = 0;
311 std::tie(stride_x, stride_y) = conv_info.stride();
312
313 unsigned int mat_weights_cols = weights->dimension(idx_kernels);
314
315 // _weights_reshaped will be auto configured in the kernel.
316 // Just append biases and do not transpose 1xW as it will be reshaped in CpuGemm
317 _weights_reshape_kernel = std::make_unique<kernels::CpuWeightsReshapeKernel>();
318 _weights_reshape_kernel->configure(weights, nullptr, &_weights_reshaped);
319 _weights_reshaped.set_quantization_info(weights->quantization_info());
320
321 // Create tensor to store im2col reshaped inputs
322 if(!_skip_im2col)
323 {
324 // Configure
325 _im2col_kernel = std::make_unique<kernels::CpuIm2ColKernel>();
326 _im2col_kernel->configure(src, &_im2col_output, Size2D(kernel_width, kernel_height), conv_info, false, dilation);
327
328 // Update GEMM input
329 gemm_input_to_use = &_im2col_output;
330 }
331
332 // Create temporary GEMM output tensor in case we cannot skip col2im
333 const DataType output_data_type = data_type == DataType::BFLOAT16 ? DataType::F32 : data_type;
334 if(!_skip_col2im)
335 {
336 TensorShape shape_gemm;
337
338 // Calculate GEMM output shape
339 shape_gemm = _im2col_output.tensor_shape();
340 shape_gemm.set(0, mat_weights_cols);
341 shape_gemm.set(1, conv_w * conv_h);
342
343 _gemm_output = TensorInfo(shape_gemm, 1, output_data_type);
344 _gemm_output.set_quantization_info(dst->quantization_info()).set_data_layout(src->data_layout());
345 _gemm_output_3d = TensorInfo(_gemm_output);
346
347 // Update GEMM output
348 gemm_output_to_use = &_gemm_output;
349 }
350 else
351 {
352 _gemm_output_3d = TensorInfo(*dst);
353 _gemm_output_3d.set_data_type(output_data_type).set_data_layout(src->data_layout()).set_is_resizable(true);
354 _gemm_output = TensorInfo(_gemm_output_3d);
355
356 // Update GEMM output
357 gemm_output_to_use = &_gemm_output_3d;
358 }
359
360 // Configure GEMM
361 // In case we need to skip col2im, GEMM3D (gemm_3d_depth != 0) must be called in order to avoid reshaping the output matrix
362 const unsigned int gemm_3d_depth = _skip_col2im ? conv_h : 0;
363 const bool fixed_format = weights_info.weight_format() != arm_compute::WeightFormat::UNSPECIFIED;
364 configure_mm(gemm_input_to_use, &_weights_reshaped, biases, gemm_output_to_use, act_info, enable_fast_math, gemm_3d_depth, fixed_format, weights_info.weight_format());
365
366 if(!_skip_col2im && _data_layout == DataLayout::NCHW)
367 {
368 // Configure col2im
369 _col2im_kernel = std::make_unique<kernels::CpuCol2ImKernel>();
370 _col2im_kernel->configure(gemm_output_to_use, dst, Size2D(conv_w, conv_h));
371 }
372 else
373 {
374 // Configure reshape layer
375 _reshape_kernel = std::make_unique<kernels::CpuReshapeKernel>();
376 _reshape_kernel->configure(gemm_output_to_use, dst);
377 }
378
379 // Check if GEMM transforms weights
380 // Modernise through COMPMID-4535
381 bool gemm_trans_wei = _aux_mem[1].size > 0; // Asm Pretranspose
382 gemm_trans_wei = _mm_gemm != nullptr ? _aux_mem[3].size > 0 : gemm_trans_wei; // Tranpose RHS
383 gemm_trans_wei = _mm_gemmlowp != nullptr ? _aux_mem[5].size > 0 : gemm_trans_wei; // Transpose RHS
384
385 // Check lifetime
386 _aux_mem[Im2ColOutput] = MemoryInfo(offset_int_vec(Im2ColOutput), MemoryLifetime::Temporary, _im2col_output.total_size());
387 _aux_mem[WeightsReshaped] = MemoryInfo(offset_int_vec(WeightsReshaped), gemm_trans_wei ? MemoryLifetime::Prepare : MemoryLifetime::Persistent, _weights_reshaped.total_size());
388 _aux_mem[GemmOutput] = MemoryInfo(offset_int_vec(GemmOutput), MemoryLifetime::Temporary, _gemm_output.total_size());
389 }
390
has_opt_impl(arm_compute::WeightFormat & expected_weight_format,const ITensorInfo * src,const ITensorInfo * weights,const ITensorInfo * biases,const ITensorInfo * dst,const PadStrideInfo & conv_info,const WeightsInfo & weights_info,const Size2D & dilation,const ActivationLayerInfo & act_info,const bool enable_fast_math)391 Status CpuGemmConv2d::has_opt_impl(arm_compute::WeightFormat &expected_weight_format, const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *dst,
392 const PadStrideInfo &conv_info,
393 const WeightsInfo &weights_info, const Size2D &dilation, const ActivationLayerInfo &act_info, const bool enable_fast_math)
394 {
395 const DataLayout data_layout = src->data_layout();
396 const int idx_width = get_data_layout_dimension_index(data_layout, DataLayoutDimension::WIDTH);
397 const int idx_height = get_data_layout_dimension_index(data_layout, DataLayoutDimension::HEIGHT);
398 const unsigned int kernel_width = weights->dimension(idx_width);
399 const unsigned int kernel_height = weights->dimension(idx_height);
400 unsigned int conv_w = 0;
401 unsigned int conv_h = 0;
402 std::tie(conv_w, conv_h) = scaled_dimensions(src->dimension(idx_width),
403 src->dimension(idx_height),
404 kernel_width,
405 kernel_height,
406 conv_info,
407 dilation);
408
409 const CpuGemmConv2d::SkipInfo skip_info = CpuGemmConv2d::skip_im_col_info(src, weights, conv_info,
410 dilation, act_info);
411
412 const bool skip_im2col = skip_info.skip_im2col;
413 const bool skip_col2im = skip_info.skip_col2im;
414 const unsigned int gemm_3d_depth = skip_col2im ? conv_h : 0;
415 const bool fixed_format = weights_info.weight_format() != arm_compute::WeightFormat::UNSPECIFIED;
416 const GEMMInfo gemm_info = GEMMInfo(false, false, true /* Reshape weights only for the first run */,
417 gemm_3d_depth, skip_im2col /* Reinterpret the input as 3D if im2col is skipped */,
418 false, GEMMLowpOutputStageInfo(), false, enable_fast_math, false, act_info, experimental::PostOpList<ITensorInfo *>(), fixed_format, weights_info.weight_format());
419
420 return CpuGemm::has_opt_impl(expected_weight_format, src, weights, biases, dst, gemm_info);
421 }
422
validate(const ITensorInfo * src,const ITensorInfo * weights,const ITensorInfo * biases,const ITensorInfo * dst,const PadStrideInfo & conv_info,const WeightsInfo & weights_info,const Size2D & dilation,const ActivationLayerInfo & act_info,bool enable_fast_math,unsigned int num_groups)423 Status CpuGemmConv2d::validate(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *dst, const PadStrideInfo &conv_info,
424 const WeightsInfo &weights_info, const Size2D &dilation, const ActivationLayerInfo &act_info, bool enable_fast_math, unsigned int num_groups)
425 {
426 ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(src, weights, dst);
427 ARM_COMPUTE_RETURN_ERROR_ON_MSG(weights_info.are_reshaped(), "Weights already reshaped are not supported!");
428 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(src, 1, DataType::QASYMM8, DataType::QASYMM8_SIGNED, DataType::BFLOAT16, DataType::F16, DataType::F32);
429 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(weights, 1, DataType::QASYMM8, DataType::QASYMM8_SIGNED, DataType::QSYMM8_PER_CHANNEL, DataType::BFLOAT16, DataType::F16, DataType::F32);
430
431 if (!is_fixed_format(weights_info.weight_format()))
432 {
433 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_LAYOUT(src, weights);
434 }
435
436 ARM_COMPUTE_RETURN_ERROR_ON_MSG(num_groups > 1, "Grouping (num_groups != 1) is not supported");
437
438 const DataLayout data_layout = src->data_layout();
439 const DataType data_type = src->data_type();
440 const int idx_width = get_data_layout_dimension_index(data_layout, DataLayoutDimension::WIDTH);
441 const int idx_height = get_data_layout_dimension_index(data_layout, DataLayoutDimension::HEIGHT);
442 const int idx_channel = get_data_layout_dimension_index(data_layout, DataLayoutDimension::CHANNEL);
443 const int idx_kernels = get_data_layout_dimension_index(data_layout, DataLayoutDimension::BATCHES);
444
445 const unsigned int kernel_width = weights->dimension(idx_width);
446 const unsigned int kernel_height = weights->dimension(idx_height);
447
448 TensorInfo im2col_reshaped_info{};
449 TensorInfo info_gemm{};
450 TensorInfo tmp_info{};
451 TensorInfo weights_reshaped_info{};
452 const ITensorInfo *gemm_input_to_use = src;
453 const ITensorInfo *gemm_output_to_use = dst;
454 const ITensorInfo *weights_to_use = weights;
455
456 const bool append_bias = false;
457 const bool is_quantized = is_data_type_quantized_asymmetric(data_type);
458 const bool is_bf16 = data_type == DataType::BFLOAT16;
459
460 // Get convolved dimensions
461 unsigned int conv_w = 0;
462 unsigned int conv_h = 0;
463
464 std::tie(conv_w, conv_h) = scaled_dimensions(src->dimension(idx_width),
465 src->dimension(idx_height),
466 kernel_width,
467 kernel_height,
468 conv_info,
469 dilation);
470
471 // Check if GEMM3D is supported
472 const CpuGemmConv2d::SkipInfo skip_info = CpuGemmConv2d::skip_im_col_info(src, weights, conv_info,
473 dilation, act_info);
474 const bool skip_im2col = skip_info.skip_im2col, skip_col2im = skip_info.skip_col2im;
475
476 ARM_COMPUTE_RETURN_ERROR_ON(weights->dimension(idx_channel) != src->dimension(idx_channel));
477 ARM_COMPUTE_RETURN_ERROR_ON(weights->num_dimensions() > 4);
478
479 // Validate biases
480 if(biases != nullptr)
481 {
482 if(is_quantized)
483 {
484 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(biases, 1, DataType::S32);
485 }
486 else if(is_bf16)
487 {
488 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(biases, 1, DataType::F32);
489 }
490 else
491 {
492 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(src, biases);
493 }
494 ARM_COMPUTE_RETURN_ERROR_ON(biases->dimension(0) != dst->dimension(idx_channel));
495 ARM_COMPUTE_RETURN_ERROR_ON(biases->num_dimensions() > 1);
496 }
497
498 unsigned int mat_weights_cols = weights->dimension(idx_kernels);
499 unsigned int mat_weights_rows = weights->dimension(idx_width) * weights->dimension(idx_height) * weights->dimension(idx_channel);
500
501 weights_reshaped_info = TensorInfo(compute_weights_reshaped_shape(*weights, append_bias), 1, weights->data_type());
502 weights_reshaped_info.set_quantization_info(weights->quantization_info());
503 weights_to_use = &weights_reshaped_info;
504
505 if(!skip_im2col)
506 {
507 // Create tensor info for im2col reshaped inputs
508 // For CPU, the batch size is on the fourth dimension
509 TensorShape shape_im2col = src->tensor_shape();
510 shape_im2col.set(0, mat_weights_rows);
511 shape_im2col.set(1, conv_w * conv_h);
512 shape_im2col.set(2, 1);
513
514 im2col_reshaped_info = TensorInfo(shape_im2col, 1, data_type);
515 im2col_reshaped_info.set_quantization_info(src->quantization_info());
516 ARM_COMPUTE_RETURN_ON_ERROR(kernels::CpuIm2ColKernel::validate(src, &im2col_reshaped_info, Size2D(kernel_width, kernel_height), conv_info, append_bias, dilation, 1));
517 gemm_input_to_use = &im2col_reshaped_info;
518 }
519
520 // Create temporary GEMM output tensor in case we cannot skip col2im
521 const DataType output_data_type = data_type == DataType::BFLOAT16 ? DataType::F32 : data_type;
522 if(!skip_col2im)
523 {
524 TensorShape shape_gemm = gemm_input_to_use->tensor_shape();
525 shape_gemm.set(0, mat_weights_cols);
526 shape_gemm.set(1, conv_w * conv_h);
527 info_gemm = TensorInfo(shape_gemm, 1, output_data_type);
528 }
529 else
530 {
531 info_gemm = TensorInfo(dst->tensor_shape(), 1, output_data_type);
532 }
533 info_gemm.set_quantization_info(dst->quantization_info()).set_data_layout(src->data_layout());
534 gemm_output_to_use = &info_gemm;
535 const bool fixed_format = weights_info.weight_format() != arm_compute::WeightFormat::UNSPECIFIED;
536
537 ARM_COMPUTE_RETURN_ON_ERROR(validate_mm(gemm_input_to_use, weights_to_use, biases, gemm_output_to_use, act_info, enable_fast_math, skip_col2im ? conv_h : 0, skip_im2col, fixed_format,
538 weights_info.weight_format()));
539
540 // Validate Col2Im/ReshapeLayer
541 if(!skip_col2im && (data_layout == DataLayout::NCHW))
542 {
543 ARM_COMPUTE_RETURN_ON_ERROR(kernels::CpuCol2ImKernel::validate(gemm_output_to_use, dst, Size2D(conv_w, conv_h)));
544 }
545
546 return Status{};
547 }
548
run(ITensorPack & tensors)549 void CpuGemmConv2d::run(ITensorPack &tensors)
550 {
551 prepare(tensors);
552
553 auto src = tensors.get_const_tensor(ACL_SRC_0);
554 auto dst = tensors.get_tensor(ACL_DST);
555 auto gemm_input_to_use = src;
556
557 CpuAuxTensorHandler im2col_output(offset_int_vec(Im2ColOutput), _im2col_output, tensors, false);
558 CpuAuxTensorHandler gemm_output(offset_int_vec(GemmOutput), _gemm_output, tensors, false);
559 CpuAuxTensorHandler reshaped_wei(offset_int_vec(WeightsReshaped), _weights_reshaped, tensors, false);
560
561 bool out_has_padding = _skip_col2im && (dst->info()->padding().bottom != 0 || dst->info()->padding().top != 0);
562 if(!_skip_im2col)
563 {
564 // Run input reshaping
565 unsigned int y_dim = get_data_layout_dimension_index(_data_layout, DataLayoutDimension::HEIGHT);
566 ITensorPack pack =
567 {
568 { TensorType::ACL_SRC, src },
569 { TensorType::ACL_DST, im2col_output.get() }
570 };
571 NEScheduler::get().schedule_op(_im2col_kernel.get(), y_dim, _im2col_kernel->window(), pack);
572 gemm_input_to_use = im2col_output.get();
573 }
574
575 // Handle the case where output has top/bottom padding
576 const ITensor *out_to_use = out_has_padding ? gemm_output.get() : dst;
577 Tensor gemm3d;
578 _gemm_output_3d.extend_padding(out_to_use->info()->padding());
579 gemm3d.allocator()->soft_init(_gemm_output_3d);
580 gemm3d.allocator()->import_memory(out_to_use->buffer());
581 auto gemm_output_to_use = gemm_output.get();
582
583 if(_skip_im2col)
584 {
585 gemm_output_to_use = &gemm3d;
586 }
587 if(_skip_col2im && !out_has_padding)
588 {
589 gemm_output_to_use = dst;
590 }
591
592 // Runs CpuGemm or CpuGemmLowpMatrixMultiplyCore functions
593 ITensorPack pack_mm = tensors;
594 pack_mm.add_const_tensor(TensorType::ACL_SRC_0, gemm_input_to_use);
595 if(!this->isVarWeightsKernel())
596 {
597 pack_mm.add_const_tensor(TensorType::ACL_SRC_1, reshaped_wei.get());
598 }
599 pack_mm.add_tensor(TensorType::ACL_DST, gemm_output_to_use);
600 if(_is_quantized)
601 {
602 // Run gemmlowp
603 _mm_gemmlowp->run(pack_mm);
604 }
605 else
606 {
607 // Run gemm
608 _mm_gemm->run(pack_mm);
609 }
610
611 // Reshape output matrix
612 if(!_skip_col2im)
613 {
614 if(_data_layout == DataLayout::NCHW)
615 {
616 ITensorPack pack =
617 {
618 { TensorType::ACL_SRC, gemm_output.get() },
619 { TensorType::ACL_DST, dst }
620 };
621 NEScheduler::get().schedule_op(_col2im_kernel.get(), Window::DimY, _col2im_kernel->window(), pack);
622 }
623 else
624 {
625 ITensorPack pack =
626 {
627 { TensorType::ACL_SRC, gemm_output_to_use },
628 { TensorType::ACL_DST, dst }
629 };
630 NEScheduler::get().schedule_op(_reshape_kernel.get(), Window::DimY, _reshape_kernel->window(), pack);
631 }
632 }
633 else if(out_has_padding)
634 {
635 ITensorPack pack =
636 {
637 { TensorType::ACL_SRC, gemm_output_to_use },
638 { TensorType::ACL_DST, dst }
639 };
640 NEScheduler::get().schedule_op(_reshape_kernel.get(), Window::DimY, _reshape_kernel->window(), pack);
641 }
642 }
643
prepare(ITensorPack & tensors)644 void CpuGemmConv2d::prepare(ITensorPack &tensors)
645 {
646 if(!_is_prepared)
647 {
648 // Variable weights executions that use fixed-format kernels
649 // need no reshaping of the weights.
650 if(this->isVarWeightsKernel())
651 {
652 _is_quantized ? _mm_gemmlowp->prepare(tensors) : _mm_gemm->prepare(tensors);
653 _is_prepared = true;
654 return;
655 }
656
657 // Run weights reshaping and mark original weights tensor as unused
658 CpuAuxTensorHandler weights_reshaped(offset_int_vec(WeightsReshaped), _weights_reshaped, tensors);
659 auto weights = tensors.get_const_tensor(TensorType::ACL_SRC_1);
660 ITensorPack pack =
661 {
662 { TensorType::ACL_SRC, weights },
663 { TensorType::ACL_DST, weights_reshaped.get() }
664 };
665 NEScheduler::get().schedule_op(_weights_reshape_kernel.get(), 3, _weights_reshape_kernel->window(), pack);
666 weights->mark_as_unused();
667 ITensorPack gemm_pack = tensors;
668 gemm_pack.add_const_tensor(TensorType::ACL_SRC_1, weights_reshaped.get());
669 _is_quantized ? _mm_gemmlowp->prepare(gemm_pack) : _mm_gemm->prepare(gemm_pack);
670 _is_prepared = true;
671 }
672 }
workspace() const673 experimental::MemoryRequirements CpuGemmConv2d::workspace() const
674 {
675 return _aux_mem;
676 }
isVarWeightsKernel() const677 bool CpuGemmConv2d::isVarWeightsKernel() const
678 {
679 return _mm_gemm && _mm_gemm->isVarWeightsKernel();
680 }
681 } // namespace cpu
682 } // namespace arm_compute
683