Searched defs:zm (Results 1 – 8 of 8) sorted by relevance
| /external/vixl/src/aarch64/ |
| D | assembler-sve-aarch64.cc | 132 const ZRegister& zm) { in and_()
141 const ZRegister& zm) { in bic()
150 const ZRegister& zm) { in eor()
159 const ZRegister& zm) { in orr()
198 const ZRegister& zm) { in asr()
238 const ZRegister& zm) { in asrr()
273 const ZRegister& zm) { in lsl()
295 const ZRegister& zm) { in lslr()
330 const ZRegister& zm) { in lsr()
352 const ZRegister& zm) { in lsrr()
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| D | macro-assembler-sve-aarch64.cc | 505 const ZRegister& zm, in NoncommutativeArithmeticHelper()
527 const ZRegister& zm, in FPCommutativeArithmeticHelper()
721 const ZRegister& zm, in Fabd()
736 const ZRegister& zm, in Fmul()
751 const ZRegister& zm, in Fmulx()
766 const ZRegister& zm, in Fmax()
781 const ZRegister& zm, in Fmin()
796 const ZRegister& zm, in Fmaxnm()
811 const ZRegister& zm, in Fminnm()
968 const ZRegister& zm) { in Mla()
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| D | macro-assembler-aarch64.h | 3490 void Add(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm) { in Add()
3525 void And(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm) { in And()
3561 void Asr(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm) { in Asr()
3582 void Bic(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm) { in Bic()
3691 const ZRegister& zm) { in Clasta()
3699 const ZRegister& zm) { in Clasta()
3711 const ZRegister& zm) { in Clastb()
3719 const ZRegister& zm) { in Clastb()
3741 const ZRegister& zm) { in Cmpeq()
3762 const ZRegister& zm) { in Cmpge()
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| D | simulator-aarch64.cc | 1994 SimVRegister& zm = ReadVRegister(instr->GetRm()); in Simulate_PdT_PgZ_ZnT_ZmT() local
2058 SimVRegister& zm = ReadVRegister(instr->GetRm()); in Simulate_ZdB_ZnB_ZmB() local
2359 SimVRegister& zm = ReadVRegister(instr->GetRm()); in Simulate_ZdT_PgZ_ZnT_ZmT() local
2375 SimVRegister& zm = ReadVRegister(instr->GetRm()); in Simulate_ZdT_ZnT_ZmT() local
2423 SimVRegister& zm = ReadVRegister(instr->GetRm()); in Simulate_ZdT_ZnT_ZmTb() local
2588 SimVRegister& zm = ReadVRegister(instr->GetRm()); in SimulateSVEInterleavedArithLong() local
2666 SimVRegister& zm = ReadVRegister(instr->GetRm()); in SimulateSVEIntMulLongVec() local
2715 SimVRegister& zm = ReadVRegister(instr->GetRm()); in SimulateSVEAddSubHigh() local
2848 SimVRegister& zm = ReadVRegister(zm_code); in SimulateSVESaturatingMulAddHigh() local
2864 SimVRegister& zm = ReadVRegister(instr->ExtractBits(19, 16)); in Simulate_ZdaD_ZnS_ZmS_imm() local
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| D | logic-aarch64.cc | 7118 const LogicVRegister& zm) { in SVEBitwiseLogicalUnpredicatedHelper()
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| /external/mesa3d/src/gallium/drivers/zink/ |
| D | zink_program.c | 117 zink_destroy_shader_module(struct zink_screen *screen, struct zink_shader_module *zm) in zink_destroy_shader_module()
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| /external/vixl/test/aarch64/ |
| D | test-assembler-sve-aarch64.cc | 383 ZRegister zm = z3.WithLaneSize(lane_size_in_bits); in MlaMlsHelper() local
5048 ZRegister zm = z27.WithLaneSize(lane_size_in_bits); in IntArithHelper() local
11630 int index_fn) { in SdotUdotHelper()
11649 ZRegister zm = z3.WithLaneSize(lane_size_in_bits / 4); in SdotUdotHelper() local
12113 ZRegister zm = z31.WithLaneSize(lane_size_in_bits); in FPBinArithHelper() local
12299 ZRegister zm = z28.WithLaneSize(lane_size_in_bits); in FPBinArithHelper() local
12810 ZRegister zm = z28.WithLaneSize(kDRegSize); in BitwiseShiftWideElementsHelper() local
16662 ZRegister zm = z3.WithLaneSize(lane_size_in_bits); in FPMulAccHelper() local
17874 double zm[] = {-0.0, inf_n, inf_n, -2.0, inf_n, nan, nan, inf_p}; in TEST_SVE() local
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| /external/cronet/net/base/registry_controlled_domains/ |
| D | effective_tld_names.gperf | 9571 zm, 0 keyword
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