| /external/vixl/src/aarch64/ |
| D | assembler-sve-aarch64.cc | 100 void Assembler::and_(const ZRegister& zd, const ZRegister& zn, uint64_t imm) { in and_()
115 void Assembler::eor(const ZRegister& zd, const ZRegister& zn, uint64_t imm) { in eor()
122 void Assembler::orr(const ZRegister& zd, const ZRegister& zn, uint64_t imm) { in orr()
131 const ZRegister& zn, in and_()
140 const ZRegister& zn, in bic()
149 const ZRegister& zn, in eor()
158 const ZRegister& zn, in orr()
180 const ZRegister& zn, in asr()
197 const ZRegister& zn, in asr()
219 const ZRegister& zn, in asrd()
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| D | macro-assembler-aarch64.h | 3485 void Abs(const ZRegister& zd, const PRegisterM& pg, const ZRegister& zn) { in Abs()
3490 void Add(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm) { in Add()
3495 void Add(const ZRegister& zd, const ZRegister& zn, IntegerOperand imm) { in Add()
3515 void And(const ZRegister& zd, const ZRegister& zn, uint64_t imm) { in And()
3525 void And(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm) { in And()
3539 void Andv(const VRegister& vd, const PRegister& pg, const ZRegister& zn) { in Andv()
3546 const ZRegister& zn, in Asr()
3556 void Asr(const ZRegister& zd, const ZRegister& zn, int shift) { in Asr()
3561 void Asr(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm) { in Asr()
3568 const ZRegister& zn, in Asrd()
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| D | macro-assembler-sve-aarch64.cc | 34 const ZRegister& zn, in AddSubHelper()
71 const ZRegister& zn, in TrySingleAddSub()
95 const ZRegister& zn, in IntWideImmHelper()
130 const ZRegister& zn, in Mul()
139 const ZRegister& zn, in Smin()
149 const ZRegister& zn, in Smax()
159 const ZRegister& zn, in Umax()
169 const ZRegister& zn, in Umin()
504 const ZRegister& zn, in NoncommutativeArithmeticHelper()
526 const ZRegister& zn, in FPCommutativeArithmeticHelper()
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| D | simulator-aarch64.cc | 1995 SimVRegister& zn = ReadVRegister(instr->GetRn()); in Simulate_PdT_PgZ_ZnT_ZmT() local
2046 SimVRegister& zn = ReadVRegister(instr->GetRn()); in Simulate_ZdB_Zn1B_Zn2B_imm() local
2059 SimVRegister& zn = ReadVRegister(instr->GetRn()); in Simulate_ZdB_ZnB_ZmB() local
2085 SimVRegister& zn = ReadVRegister(instr->GetRn()); in SimulateSVEMulIndex() local
2104 SimVRegister& zn = ReadVRegister(instr->GetRn()); in SimulateSVEMlaMlsIndex() local
2128 SimVRegister& zn = ReadVRegister(instr->GetRn()); in SimulateSVESaturatingMulHighIndex() local
2158 SimVRegister& zn = ReadVRegister(instr->GetRn()); in SimulateSVESaturatingIntMulLongIdx() local
2241 SimVRegister& zn = ReadVRegister(instr->GetRn()); in Simulate_ZdH_PgM_ZnS() local
2261 SimVRegister& zn = ReadVRegister(instr->GetRn()); in Simulate_ZdS_PgM_ZnD() local
2290 SimVRegister& zn = ReadVRegister(instr->GetRn()); in SimulateSVEFPConvertLong() local
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| D | logic-aarch64.cc | 7117 const LogicVRegister& zn, in SVEBitwiseLogicalUnpredicatedHelper()
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| /external/bzip2/ |
| D | decompress.c | 130 Int32 zn; in BZ2_decompress() local
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| /external/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/test/calendar/ |
| D | CompatibilityTest.java | 780 TransitionItem(String zn, int y, int m, int d, int h) { in TestAddAcrossOffsetTransitions()
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| /external/icu/android_icu4j/src/main/tests/android/icu/dev/test/calendar/ |
| D | CompatibilityTest.java | 783 TransitionItem(String zn, int y, int m, int d, int h) { in TestAddAcrossOffsetTransitions()
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| /external/deqp/modules/internal/ |
| D | ditFrameworkTests.cpp | 706 const float zn = 0.0f; in runCase() local
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| /external/deqp/framework/referencerenderer/ |
| D | rrRenderState.hpp | 338 float zn; member
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| D | rrRenderer.cpp | 829 const float zn = state.viewport.zn; in transformVertexClipCoordsToWindowCoords() local
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| /external/vixl/test/aarch64/ |
| D | test-assembler-sve-aarch64.cc | 382 ZRegister zn = z2.WithLaneSize(lane_size_in_bits); in MlaMlsHelper() local
5047 ZRegister zn = z31.WithLaneSize(lane_size_in_bits); in IntArithHelper() local
9854 ZRegister zn = z0.WithLaneSize(esize_in_bits); in GatherLoadScalarPlusVectorHelper() local
9970 ZRegister zn = z0.WithLaneSize(esize_in_bits); in GatherLoadScalarPlusScalarOrImmHelper() local
10795 ZRegister zn = z1.WithLaneSize(lane_size_in_bits); in IntWideImmHelper() local
11630 int index_fn) { in SdotUdotHelper()
11648 ZRegister zn = z2.WithLaneSize(lane_size_in_bits / 4); in SdotUdotHelper() local
12112 ZRegister zn = z30.WithLaneSize(lane_size_in_bits); in FPBinArithHelper() local
12298 ZRegister zn = z27.WithLaneSize(lane_size_in_bits); in FPBinArithHelper() local
12695 ZRegister zn = z28.WithLaneSize(lane_size_in_bits); in BitwiseShiftImmHelper() local
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| /external/cronet/third_party/icu/source/tools/tzcode/ |
| D | tz2icu.cpp | 1830 int32_t zn = 0; in main() local
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| /external/icu/icu4c/source/tools/tzcode/ |
| D | tz2icu.cpp | 1830 int32_t zn = 0; in main() local
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| /external/swiftshader/src/Pipeline/ |
| D | SamplerCore.cpp | 1269 Int4 zn = CmpLT(z, 0.0f); // z < 0 in cubeFace() local
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| /external/eigen/bench/perf_monitoring/resources/ |
| D | s1.js | 1 …rn n&&(n.ownerDocument&&n.ownerDocument.defaultView||n.document&&n||n.defaultView)}function e(n,t)… argument
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| /external/crosvm/docs/book/ |
| D | mermaid.min.js | 1 …define&&define.amd?define([],e):"object"==typeof exports?exports.mermaid=e():t.mermaid=e()}("undef… property
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