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/external/swiftshader/third_party/llvm-10.0/
DAndroid.bp21 "llvm/lib/Analysis/AliasAnalysis.cpp",
22 "llvm/lib/Analysis/AliasAnalysisSummary.cpp",
23 "llvm/lib/Analysis/AliasSetTracker.cpp",
24 "llvm/lib/Analysis/AssumptionCache.cpp",
25 "llvm/lib/Analysis/BasicAliasAnalysis.cpp",
26 "llvm/lib/Analysis/BlockFrequencyInfo.cpp",
27 "llvm/lib/Analysis/BlockFrequencyInfoImpl.cpp",
28 "llvm/lib/Analysis/BranchProbabilityInfo.cpp",
29 "llvm/lib/Analysis/CallGraph.cpp",
30 "llvm/lib/Analysis/CallGraphSCCPass.cpp",
[all …]
DBUILD.gn85 "llvm/include/",
86 "llvm/lib/Target/AArch64/",
87 "llvm/lib/Target/ARM/",
88 "llvm/lib/Target/Mips/",
89 "llvm/lib/Target/PowerPC/",
90 "llvm/lib/Target/RISCV/",
91 "llvm/lib/Target/X86/",
114 assert(false, "llvm-10.0 not configured for target platform")
135 "llvm/lib/MC/MCWasmObjectTargetWriter.cpp",
136 "llvm/lib/MC/MCXCOFFObjectTargetWriter.cpp",
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/external/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/
DIntrinsicsAArch64.h12 namespace llvm {
16 aarch64_addg = 268, // llvm.aarch64.addg
17 aarch64_clrex, // llvm.aarch64.clrex
18 aarch64_cls, // llvm.aarch64.cls
19 aarch64_cls64, // llvm.aarch64.cls64
20 aarch64_crc32b, // llvm.aarch64.crc32b
21 aarch64_crc32cb, // llvm.aarch64.crc32cb
22 aarch64_crc32ch, // llvm.aarch64.crc32ch
23 aarch64_crc32cw, // llvm.aarch64.crc32cw
24 aarch64_crc32cx, // llvm.aarch64.crc32cx
[all …]
DIntrinsicsMips.h12 namespace llvm {
16 mips_absq_s_ph = 3635, // llvm.mips.absq.s.ph
17 mips_absq_s_qb, // llvm.mips.absq.s.qb
18 mips_absq_s_w, // llvm.mips.absq.s.w
19 mips_add_a_b, // llvm.mips.add.a.b
20 mips_add_a_d, // llvm.mips.add.a.d
21 mips_add_a_h, // llvm.mips.add.a.h
22 mips_add_a_w, // llvm.mips.add.a.w
23 mips_addq_ph, // llvm.mips.addq.ph
24 mips_addq_s_ph, // llvm.mips.addq.s.ph
[all …]
DIntrinsicsHexagon.h12 namespace llvm {
16 hexagon_A2_abs = 1869, // llvm.hexagon.A2.abs
17 hexagon_A2_absp, // llvm.hexagon.A2.absp
18 hexagon_A2_abssat, // llvm.hexagon.A2.abssat
19 hexagon_A2_add, // llvm.hexagon.A2.add
20 hexagon_A2_addh_h16_hh, // llvm.hexagon.A2.addh.h16.hh
21 hexagon_A2_addh_h16_hl, // llvm.hexagon.A2.addh.h16.hl
22 hexagon_A2_addh_h16_lh, // llvm.hexagon.A2.addh.h16.lh
23 hexagon_A2_addh_h16_ll, // llvm.hexagon.A2.addh.h16.ll
24 hexagon_A2_addh_h16_sat_hh, // llvm.hexagon.A2.addh.h16.sat.hh
[all …]
DIntrinsicEnums.inc10 addressofreturnaddress = 1, // llvm.addressofreturnaddress
11 adjust_trampoline, // llvm.adjust.trampoline
12 annotation, // llvm.annotation
13 assume, // llvm.assume
14 bitreverse, // llvm.bitreverse
15 bswap, // llvm.bswap
16 canonicalize, // llvm.canonicalize
17 ceil, // llvm.ceil
18 clear_cache, // llvm.clear_cache
19 codeview_annotation, // llvm.codeview.annotation
[all …]
DIntrinsicsX86.h12 namespace llvm {
16 x86_3dnow_pavgusb = 6322, // llvm.x86.3dnow.pavgusb
17 x86_3dnow_pf2id, // llvm.x86.3dnow.pf2id
18 x86_3dnow_pfacc, // llvm.x86.3dnow.pfacc
19 x86_3dnow_pfadd, // llvm.x86.3dnow.pfadd
20 x86_3dnow_pfcmpeq, // llvm.x86.3dnow.pfcmpeq
21 x86_3dnow_pfcmpge, // llvm.x86.3dnow.pfcmpge
22 x86_3dnow_pfcmpgt, // llvm.x86.3dnow.pfcmpgt
23 x86_3dnow_pfmax, // llvm.x86.3dnow.pfmax
24 x86_3dnow_pfmin, // llvm.x86.3dnow.pfmin
[all …]
DIntrinsicsS390.h12 namespace llvm {
16 s390_efpc = 6057, // llvm.s390.efpc
17 s390_etnd, // llvm.s390.etnd
18 s390_lcbb, // llvm.s390.lcbb
19 s390_ntstg, // llvm.s390.ntstg
20 s390_ppa_txassist, // llvm.s390.ppa.txassist
21 s390_sfpc, // llvm.s390.sfpc
22 s390_tabort, // llvm.s390.tabort
23 s390_tbegin, // llvm.s390.tbegin
24 s390_tbegin_nofloat, // llvm.s390.tbegin.nofloat
[all …]
DIntrinsicsPowerPC.h12 namespace llvm {
16 ppc_addf128_round_to_odd = 5598, // llvm.ppc.addf128.round.to.odd
17 ppc_altivec_crypto_vcipher, // llvm.ppc.altivec.crypto.vcipher
18 ppc_altivec_crypto_vcipherlast, // llvm.ppc.altivec.crypto.vcipherlast
19 ppc_altivec_crypto_vncipher, // llvm.ppc.altivec.crypto.vncipher
20 ppc_altivec_crypto_vncipherlast, // llvm.ppc.altivec.crypto.vncipherlast
21 ppc_altivec_crypto_vpermxor, // llvm.ppc.altivec.crypto.vpermxor
22 ppc_altivec_crypto_vpmsumb, // llvm.ppc.altivec.crypto.vpmsumb
23 ppc_altivec_crypto_vpmsumd, // llvm.ppc.altivec.crypto.vpmsumd
24 ppc_altivec_crypto_vpmsumh, // llvm.ppc.altivec.crypto.vpmsumh
[all …]
DIntrinsicsARM.h12 namespace llvm {
16 arm_cdp = 1498, // llvm.arm.cdp
17 arm_cdp2, // llvm.arm.cdp2
18 arm_clrex, // llvm.arm.clrex
19 arm_cls, // llvm.arm.cls
20 arm_cls64, // llvm.arm.cls64
21 arm_cmse_tt, // llvm.arm.cmse.tt
22 arm_cmse_tta, // llvm.arm.cmse.tta
23 arm_cmse_ttat, // llvm.arm.cmse.ttat
24 arm_cmse_ttt, // llvm.arm.cmse.ttt
[all …]
DIntrinsicsNVPTX.h12 namespace llvm {
16 nvvm_add_rm_d = 4302, // llvm.nvvm.add.rm.d
17 nvvm_add_rm_f, // llvm.nvvm.add.rm.f
18 nvvm_add_rm_ftz_f, // llvm.nvvm.add.rm.ftz.f
19 nvvm_add_rn_d, // llvm.nvvm.add.rn.d
20 nvvm_add_rn_f, // llvm.nvvm.add.rn.f
21 nvvm_add_rn_ftz_f, // llvm.nvvm.add.rn.ftz.f
22 nvvm_add_rp_d, // llvm.nvvm.add.rp.d
23 nvvm_add_rp_f, // llvm.nvvm.add.rp.f
24 nvvm_add_rp_ftz_f, // llvm.nvvm.add.rp.ftz.f
[all …]
DIntrinsicsAMDGPU.h12 namespace llvm {
16 amdgcn_alignbit = 821, // llvm.amdgcn.alignbit
17 amdgcn_alignbyte, // llvm.amdgcn.alignbyte
18 amdgcn_atomic_dec, // llvm.amdgcn.atomic.dec
19 amdgcn_atomic_inc, // llvm.amdgcn.atomic.inc
20 amdgcn_buffer_atomic_add, // llvm.amdgcn.buffer.atomic.add
21 amdgcn_buffer_atomic_and, // llvm.amdgcn.buffer.atomic.and
22 amdgcn_buffer_atomic_cmpswap, // llvm.amdgcn.buffer.atomic.cmpswap
23 amdgcn_buffer_atomic_fadd, // llvm.amdgcn.buffer.atomic.fadd
24 amdgcn_buffer_atomic_or, // llvm.amdgcn.buffer.atomic.or
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/
DLinkAllPasses.h1 //===- llvm/LinkAllPasses.h ------------ Reference All Passes ---*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
17 #include "llvm/ADT/Statistic.h"
18 #include "llvm/Analysis/AliasAnalysisEvaluator.h"
19 #include "llvm/Analysis/AliasSetTracker.h"
20 #include "llvm/Analysis/BasicAliasAnalysis.h"
21 #include "llvm/Analysis/CFLAndersAliasAnalysis.h"
22 #include "llvm/Analysis/CFLSteensAliasAnalysis.h"
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/external/llvm/test/CodeGen/PowerPC/
Dpr15031.ll19 %"class.llvm::MachineMemOperand" = type { %"struct.llvm::MachinePointerInfo", i64, i32, %"class.llv…
20 %"struct.llvm::MachinePointerInfo" = type { %"class.llvm::Value"*, i64 }
21 %"class.llvm::Value" = type { i32 (...)**, i8, i8, i16, %"class.llvm::Type"*, %"class.llvm::Use"*, …
22 %"class.llvm::Type" = type { %"class.llvm::LLVMContext"*, i32, i32, %"class.llvm::Type"** }
23 %"class.llvm::LLVMContext" = type { %"class.llvm::LLVMContextImpl"* }
24 %"class.llvm::LLVMContextImpl" = type opaque
25 %"class.llvm::Use" = type { %"class.llvm::Value"*, %"class.llvm::Use"*, %"class.llvm::PointerIntPai…
26 %"class.llvm::PointerIntPair" = type { i64 }
27 %"class.llvm::StringMapEntry" = type opaque
28 %"class.llvm::MDNode" = type { %"class.llvm::Value", %"class.llvm::FoldingSetImpl::Node", i32, i32 }
[all …]
/external/cronet/buildtools/third_party/libc++abi/trunk/test/
Dtest_demangle.pass.cpp3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
12 // https://llvm.org/PR51407 was not fixed in some previously-released
652 …foIjEENS1_IcEEE6insertERKSt4pairIjcE", "llvm::DenseMap<unsigned int, char, llvm::DenseMapInfo<unsi…
653 …6InsertIntoBucketERKjRKcPSt4pairIjcE", "llvm::DenseMap<unsigned int, char, llvm::DenseMapInfo<unsi…
654 …S_12DenseMapInfoIjEENS1_IcEEE4growEj", "llvm::DenseMap<unsigned int, char, llvm::DenseMapInfo<unsi…
655 …9MachinePassRegistry3AddEPNS_23MachinePassRegistryNodeE", "llvm::MachinePassRegistry::Add(llvm::Ma…
656 …{"_ZN4llvm2cl6valuesIiEENS0_11ValuesClassIT_EEPKcS3_S6_z", "llvm::cl::ValuesClass<int> llvm::cl::v…
657 …{"_ZN4llvm2cl11ValuesClassIiEC2EPKciS4_P13__va_list_tag", "llvm::cl::ValuesClass<int>::ValuesClass…
[all …]
/external/libcxxabi/test/
Dtest_demangle.pass.cpp3 // The LLVM Compiler Infrastructure
638 …foIjEENS1_IcEEE6insertERKSt4pairIjcE", "llvm::DenseMap<unsigned int, char, llvm::DenseMapInfo<unsi…
639 …6InsertIntoBucketERKjRKcPSt4pairIjcE", "llvm::DenseMap<unsigned int, char, llvm::DenseMapInfo<unsi…
640 …S_12DenseMapInfoIjEENS1_IcEEE4growEj", "llvm::DenseMap<unsigned int, char, llvm::DenseMapInfo<unsi…
641 …9MachinePassRegistry3AddEPNS_23MachinePassRegistryNodeE", "llvm::MachinePassRegistry::Add(llvm::Ma…
642 …{"_ZN4llvm2cl6valuesIiEENS0_11ValuesClassIT_EEPKcS3_S6_z", "llvm::cl::ValuesClass<int> llvm::cl::v…
643 …{"_ZN4llvm2cl11ValuesClassIiEC2EPKciS4_P13__va_list_tag", "llvm::cl::ValuesClass<int>::ValuesClass…
644 …{"_ZN4llvm24PassRegistrationListenerC2Ev", "llvm::PassRegistrationListener::PassRegistrationListen…
645 …{"_ZN4llvm24PassRegistrationListener15enumeratePassesEv", "llvm::PassRegistrationListener::enumera…
646 {"_ZN4llvm12PassRegistry15getPassRegistryEv", "llvm::PassRegistry::getPassRegistry()"},
[all …]
/external/llvm/include/llvm/
DLinkAllPasses.h1 //===- llvm/LinkAllPasses.h ------------ Reference All Passes ---*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
18 #include "llvm/ADT/Statistic.h"
19 #include "llvm/Analysis/AliasSetTracker.h"
20 #include "llvm/Analysis/AliasAnalysisEvaluator.h"
21 #include "llvm/Analysis/BasicAliasAnalysis.h"
22 #include "llvm/Analysis/CFLAndersAliasAnalysis.h"
23 #include "llvm/Analysis/CFLSteensAliasAnalysis.h"
24 #include "llvm/Analysis/CallPrinter.h"
25 #include "llvm/Analysis/DomPrinter.h"
[all …]
/external/llvm/test/Transforms/IndVarSimplify/
D2004-04-05-InvokeCastCrash.ll4 …x::_Hashtable_node<const llvm::Constant*>" = type { %"struct.__gnu_cxx::_Hashtable_node<const llvm…
5 …t llvm::Value* const, int> >" = type { %"struct.__gnu_cxx::_Hashtable_node<std::pair<const llvm::V…
6 …llvm::Value*,int,__gnu_cxx::hash<const llvm::Value*>,std::equal_to<const llvm::Value*>,std::alloca…
7 …llvm::Constant*,__gnu_cxx::hash<const llvm::Constant*>,std::equal_to<const llvm::Constant*>,std::a…
8 …llvm::Constant*,const llvm::Constant*,__gnu_cxx::hash<const llvm::Constant*>,std::_Identity<const …
9 …llvm::Value* const, int>,const llvm::Value*,__gnu_cxx::hash<const llvm::Value*>,std::_Select1st<st…
10 %"struct.llvm::AbstractTypeUser" = type { i32 (...)** }
11 %"struct.llvm::Annotable" = type { i32 (...)**, %"struct.llvm::Annotation"* }
12 …%"struct.llvm::Annotation" = type { i32 (...)**, %"struct.llvm::AnnotationID", %"struct.llvm::Anno…
13 %"struct.llvm::AnnotationID" = type { i32 }
[all …]
/external/swiftshader/third_party/llvm-subzero/
DCMakeLists.txt16 "build/Android/include/llvm/Config/abi-breaking.h"
17 "build/Android/include/llvm/Config/config.h"
18 "build/Android/include/llvm/Config/llvm-config.h"
19 "build/Android/include/llvm/Support/DataTypes.h"
20 "build/Fuchsia/include/llvm/Config/abi-breaking.h"
21 "build/Fuchsia/include/llvm/Config/config.h"
22 "build/Fuchsia/include/llvm/Config/llvm-config.h"
23 "build/Fuchsia/include/llvm/Support/DataTypes.h"
24 "build/Linux/include/llvm/Config/abi-breaking.h"
25 "build/Linux/include/llvm/Config/config.h"
[all …]
/external/tensorflow/tensorflow/compiler/xla/service/
Delemental_ir_emitter.h24 #include "llvm/IR/IRBuilder.h"
25 #include "llvm/IR/Module.h"
26 #include "llvm/IR/Value.h"
41 ElementalIrEmitter(llvm::Module* module, llvm::IRBuilder<>* b) in ElementalIrEmitter()
52 llvm::IRBuilder<>* b() { return b_; } in b()
55 llvm::IRBuilder<>* builder() { return b_; } in builder()
57 llvm::Module* module() { return module_; } in module()
66 virtual StatusOr<llvm::Value*> EmitFloatBinaryOp(const HloInstruction* op,
67 llvm::Value* lhs_value,
68 llvm::Value* rhs_value);
[all …]
/external/clang/test/CodeGen/
Dbuiltins-hexagon.c2 // RUN: %clang_cc1 -triple hexagon-unknown-elf -emit-llvm %s -o - | FileCheck %s
11 // CHECK: @llvm.hexagon.brev.ldb in foo()
13 // CHECK: @llvm.hexagon.brev.ldd in foo()
15 // CHECK: @llvm.hexagon.brev.ldh in foo()
17 // CHECK: @llvm.hexagon.brev.ldub in foo()
19 // CHECK: @llvm.hexagon.brev.lduh in foo()
21 // CHECK: @llvm.hexagon.brev.ldw in foo()
23 // CHECK: @llvm.hexagon.brev.stb in foo()
25 // CHECK: @llvm.hexagon.brev.std in foo()
27 // CHECK: @llvm.hexagon.brev.sth in foo()
[all …]
Dbuiltins-ppc-altivec.c2 // RUN: %clang_cc1 -faltivec -triple powerpc-unknown-unknown -emit-llvm %s \
4 // RUN: %clang_cc1 -faltivec -triple powerpc64-unknown-unknown -emit-llvm %s \
6 // RUN: %clang_cc1 -faltivec -triple powerpc64le-unknown-unknown -emit-llvm %s \
8 // RUN: not %clang_cc1 -triple powerpc64le-unknown-unknown -emit-llvm %s \
63 // CHECK: @llvm.ppc.altivec.vmaxsb in test1()
65 // CHECK-LE: @llvm.ppc.altivec.vmaxsb in test1()
69 // CHECK: @llvm.ppc.altivec.vmaxsh in test1()
71 // CHECK-LE: @llvm.ppc.altivec.vmaxsh in test1()
75 // CHECK: @llvm.ppc.altivec.vmaxsw in test1()
77 // CHECK-LE: @llvm.ppc.altivec.vmaxsw in test1()
[all …]
/external/tensorflow/tensorflow/compiler/xla/service/cpu/
Dvector_support_library.h22 #include "llvm/IR/IRBuilder.h"
23 #include "llvm/IR/Value.h"
31 // Simple wrappers around llvm::APFloat::APFloat to make the calling code more
34 inline llvm::APFloat GetIeeeF32(float f) { return llvm::APFloat(f); } in GetIeeeF32()
35 inline llvm::APFloat GetIeeeF32FromBitwiseRep(int32_t bitwise_value) { in GetIeeeF32FromBitwiseRep()
36 return llvm::APFloat(llvm::APFloat::IEEEsingle(), in GetIeeeF32FromBitwiseRep()
37 llvm::APInt(/*numBits=*/32, /*val=*/bitwise_value)); in GetIeeeF32FromBitwiseRep()
49 llvm::IRBuilder<>* b, std::string name);
51 llvm::Value* Mul(llvm::Value* lhs, llvm::Value* rhs);
52 llvm::Value* Mul(int64_t lhs, llvm::Value* rhs) { in Mul()
[all …]
/external/tensorflow/tensorflow/compiler/xla/mlir_hlo/
DBUILD5 load("@llvm-project//mlir:tblgen.bzl", "gentbl_cc_library", "gentbl_filegroup", "td_library")
32 "@llvm-project//mlir:BuiltinDialectTdFiles",
33 "@llvm-project//mlir:ControlFlowInterfacesTdFiles",
34 "@llvm-project//mlir:CopyOpInterfaceTdFiles",
35 "@llvm-project//mlir:InferTypeOpInterfaceTdFiles",
36 "@llvm-project//mlir:LoopLikeInterfaceTdFiles",
37 "@llvm-project//mlir:MemRefOpsTdFiles",
38 "@llvm-project//mlir:OpBaseTdFiles",
39 "@llvm-project//mlir:QuantizationOpsTdFiles",
40 "@llvm-project//mlir:ShapeOpsTdFiles",
[all …]
/external/tensorflow/tensorflow/compiler/mlir/hlo/tests/
Ddisc_ral_legalize_to_llvm.mlir1 // RUN: mlir-hlo-opt -disc-ral-to-llvm -split-input-file %s -o - | FileCheck %s
3 // CHECK: llvm.mlir.global internal constant @ral_recv_input___cpu___pvoid_i64___m2df32("ral_recv_i…
4 // CHECK: llvm.func @disc_ral_call(!llvm.ptr<i8>, !llvm.ptr<i8>, !llvm.ptr<ptr<i8>>)
7 // CHECK-SAME: (%[[CTX:.*]]: !llvm.ptr<i8>)
9 // CHECK-DAG: %[[i64_0:.*]] = llvm.mlir.constant(0 : index) : i64
10 // CHECK-DAG: %[[i32_0:.*]] = llvm.mlir.constant(0 : i32) : i32
11 // CHECK-DAG: %[[i32_1:.*]] = llvm.mlir.constant(1 : i32) : i32
13 …// CHECK: %[[T0:.*]] = llvm.alloca %[[i32_1]] x !llvm.struct<"", (ptr<i8>, i64, struct<(ptr<f32>, …
14 // CHECK: %[[T1:.*]] = llvm.mlir.constant(3 : i32) : i32
15 // CHECK: %[[T2:.*]] = llvm.alloca %[[T1]] x !llvm.ptr<i8> : (i32) -> !llvm.ptr<ptr<i8>>
[all …]

12345678910>>...568