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/external/capstone/suite/MC/AArch64/
Dbasic-a64-instructions.s.cs9 0xa3,0xe0,0x29,0x8b = add x3, x5, x9, sxtx
29 0xa3,0xe0,0x29,0xcb = sub x3, x5, x9, sxtx
45 0xa3,0xe8,0x29,0xab = adds x3, x5, x9, sxtx #2
61 0xa3,0xe8,0x29,0xeb = subs x3, x5, x9, sxtx #2
77 0xbf,0xe8,0x29,0xeb = cmp x5, x9, sxtx #2
93 0xbf,0xe8,0x29,0xab = cmn x5, x9, sxtx #2
110 0xe3,0x6b,0x29,0xeb = subs x3, sp, x9, lsl #2
162 0x69,0x28,0x1f,0x8b = add x9, x3, xzr, lsl #10
169 0x28,0xfd,0x8a,0x8b = add x8, x9, x10, asr #63
188 0x69,0x28,0x1f,0xab = adds x9, x3, xzr, lsl #10
[all …]
/external/ComputeLibrary/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_u8u32_dot_6x4VL/
Dgeneric.cpp91 "ldr x9, [%x[args_ptr], %[offsetof_B_ptr]]\n" in sve_hybrid_u8u32_dot_6x4VL()
133 "ld1b { z6.b }, p5/Z, [x9]\n" in sve_hybrid_u8u32_dot_6x4VL()
135 "ld1b { z7.b }, p5/Z, [x9, #1, MUL VL]\n" in sve_hybrid_u8u32_dot_6x4VL()
139 "ld1b { z6.b }, p5/Z, [x9, #2, MUL VL]\n" in sve_hybrid_u8u32_dot_6x4VL()
142 "ld1b { z7.b }, p5/Z, [x9, #3, MUL VL]\n" in sve_hybrid_u8u32_dot_6x4VL()
145 "ld1b { z6.b }, p5/Z, [x9, #4, MUL VL]\n" in sve_hybrid_u8u32_dot_6x4VL()
147 "ld1b { z7.b }, p5/Z, [x9, #5, MUL VL]\n" in sve_hybrid_u8u32_dot_6x4VL()
149 "ld1b { z6.b }, p5/Z, [x9, #6, MUL VL]\n" in sve_hybrid_u8u32_dot_6x4VL()
151 "ld1b { z7.b }, p5/Z, [x9, #7, MUL VL]\n" in sve_hybrid_u8u32_dot_6x4VL()
152 "addvl x9, x9, #16\n" in sve_hybrid_u8u32_dot_6x4VL()
[all …]
/external/ComputeLibrary/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8s32_dot_6x4VL/
Dgeneric.cpp91 "ldr x9, [%x[args_ptr], %[offsetof_B_ptr]]\n" in sve_hybrid_s8s32_dot_6x4VL()
133 "ld1b { z6.b }, p5/Z, [x9]\n" in sve_hybrid_s8s32_dot_6x4VL()
135 "ld1b { z7.b }, p5/Z, [x9, #1, MUL VL]\n" in sve_hybrid_s8s32_dot_6x4VL()
139 "ld1b { z6.b }, p5/Z, [x9, #2, MUL VL]\n" in sve_hybrid_s8s32_dot_6x4VL()
142 "ld1b { z7.b }, p5/Z, [x9, #3, MUL VL]\n" in sve_hybrid_s8s32_dot_6x4VL()
145 "ld1b { z6.b }, p5/Z, [x9, #4, MUL VL]\n" in sve_hybrid_s8s32_dot_6x4VL()
147 "ld1b { z7.b }, p5/Z, [x9, #5, MUL VL]\n" in sve_hybrid_s8s32_dot_6x4VL()
149 "ld1b { z6.b }, p5/Z, [x9, #6, MUL VL]\n" in sve_hybrid_s8s32_dot_6x4VL()
151 "ld1b { z7.b }, p5/Z, [x9, #7, MUL VL]\n" in sve_hybrid_s8s32_dot_6x4VL()
152 "addvl x9, x9, #16\n" in sve_hybrid_s8s32_dot_6x4VL()
[all …]
/external/boringssl/win-aarch64/crypto/fipsmodule/
Dp256-armv8-asm-win.S138 mov x9,x15
168 mov x9,x15
179 mov x9,x5
257 umulh x9,x5,x3
268 adcs x16,x16,x9
269 lsr x9,x14,#32
274 sbc x11,x14,x9
277 adcs x15,x16,x9
278 mul x9,x5,x3 // lo(a[1]*b[i])
287 adcs x15,x15,x9
[all …]
/external/cronet/third_party/boringssl/win-aarch64/crypto/fipsmodule/
Dp256-armv8-asm-win.S138 mov x9,x15
168 mov x9,x15
179 mov x9,x5
257 umulh x9,x5,x3
268 adcs x16,x16,x9
269 lsr x9,x14,#32
274 sbc x11,x14,x9
277 adcs x15,x16,x9
278 mul x9,x5,x3 // lo(a[1]*b[i])
287 adcs x15,x15,x9
[all …]
/external/boringssl/linux-aarch64/crypto/fipsmodule/
Dp256-armv8-asm-linux.S130 mov x9,x15
158 mov x9,x15
169 mov x9,x5
241 umulh x9,x5,x3
252 adcs x16,x16,x9
253 lsr x9,x14,#32
258 sbc x11,x14,x9
261 adcs x15,x16,x9
262 mul x9,x5,x3 // lo(a[1]*b[i])
271 adcs x15,x15,x9
[all …]
/external/cronet/third_party/boringssl/linux-aarch64/crypto/fipsmodule/
Dp256-armv8-asm-linux.S130 mov x9,x15
158 mov x9,x15
169 mov x9,x5
241 umulh x9,x5,x3
252 adcs x16,x16,x9
253 lsr x9,x14,#32
258 sbc x11,x14,x9
261 adcs x15,x16,x9
262 mul x9,x5,x3 // lo(a[1]*b[i])
271 adcs x15,x15,x9
[all …]
/external/boringssl/apple-aarch64/crypto/fipsmodule/
Dp256-armv8-asm-apple.S130 mov x9,x15
158 mov x9,x15
169 mov x9,x5
241 umulh x9,x5,x3
252 adcs x16,x16,x9
253 lsr x9,x14,#32
258 sbc x11,x14,x9
261 adcs x15,x16,x9
262 mul x9,x5,x3 // lo(a[1]*b[i])
271 adcs x15,x15,x9
[all …]
/external/cronet/third_party/boringssl/apple-aarch64/crypto/fipsmodule/
Dp256-armv8-asm-apple.S130 mov x9,x15
158 mov x9,x15
169 mov x9,x5
241 umulh x9,x5,x3
252 adcs x16,x16,x9
253 lsr x9,x14,#32
258 sbc x11,x14,x9
261 adcs x15,x16,x9
262 mul x9,x5,x3 // lo(a[1]*b[i])
271 adcs x15,x15,x9
[all …]
/external/ComputeLibrary/src/core/NEON/kernels/arm_gemm/kernels/sme2_gemv_bf16fp32_dot_16VL/
Dgeneric.cpp75 "mov x9, #0x0\n" in sme2_gemv_bf16fp32_dot_16VL()
112 ".inst 0xc0042c00 // mova za.d[x9, #0], { z0.d-z3.d }\n" in sme2_gemv_bf16fp32_dot_16VL()
124 ".inst 0xc15ab018 // bfdot za.s[x9, 0], { z0.h-z3.h }, z10.h[0]\n" in sme2_gemv_bf16fp32_dot_16VL()
128 ".inst 0xc15ab718 // bfdot za.s[x9, 0], { z24.h-z27.h }, z10.h[1]\n" in sme2_gemv_bf16fp32_dot_16VL()
132 ".inst 0xc15ab998 // bfdot za.s[x9, 0], { z12.h-z15.h }, z10.h[2]\n" in sme2_gemv_bf16fp32_dot_16VL()
135 ".inst 0xc15abe18 // bfdot za.s[x9, 0], { z16.h-z19.h }, z10.h[3]\n" in sme2_gemv_bf16fp32_dot_16VL()
144 ".inst 0xc15ab018 // bfdot za.s[x9, 0], { z0.h-z3.h }, z10.h[0]\n" in sme2_gemv_bf16fp32_dot_16VL()
149 ".inst 0xc15ab718 // bfdot za.s[x9, 0], { z24.h-z27.h }, z10.h[1]\n" in sme2_gemv_bf16fp32_dot_16VL()
154 ".inst 0xc15ab998 // bfdot za.s[x9, 0], { z12.h-z15.h }, z10.h[2]\n" in sme2_gemv_bf16fp32_dot_16VL()
158 ".inst 0xc15abe18 // bfdot za.s[x9, 0], { z16.h-z19.h }, z10.h[3]\n" in sme2_gemv_bf16fp32_dot_16VL()
[all …]
/external/ComputeLibrary/src/core/NEON/kernels/arm_gemm/kernels/sme2_gemv_fp32_mla_16VL/
Dgeneric.cpp74 "mov x9, #0x0\n" in sme2_gemv_fp32_mla_16VL()
111 ".inst 0xc0042c00 // mova za.d[x9, #0], { z0.d-z3.d }\n" in sme2_gemv_fp32_mla_16VL()
123 ".inst 0xc15aa000 // fmla za.s[x9, 0], { z0.s-z3.s }, z10.s[0]\n" in sme2_gemv_fp32_mla_16VL()
127 ".inst 0xc15aa700 // fmla za.s[x9, 0], { z24.s-z27.s }, z10.s[1]\n" in sme2_gemv_fp32_mla_16VL()
131 ".inst 0xc15aa980 // fmla za.s[x9, 0], { z12.s-z15.s }, z10.s[2]\n" in sme2_gemv_fp32_mla_16VL()
134 ".inst 0xc15aae00 // fmla za.s[x9, 0], { z16.s-z19.s }, z10.s[3]\n" in sme2_gemv_fp32_mla_16VL()
143 ".inst 0xc15aa000 // fmla za.s[x9, 0], { z0.s-z3.s }, z10.s[0]\n" in sme2_gemv_fp32_mla_16VL()
148 ".inst 0xc15aa700 // fmla za.s[x9, 0], { z24.s-z27.s }, z10.s[1]\n" in sme2_gemv_fp32_mla_16VL()
153 ".inst 0xc15aa980 // fmla za.s[x9, 0], { z12.s-z15.s }, z10.s[2]\n" in sme2_gemv_fp32_mla_16VL()
157 ".inst 0xc15aae00 // fmla za.s[x9, 0], { z16.s-z19.s }, z10.s[3]\n" in sme2_gemv_fp32_mla_16VL()
[all …]
/external/llvm/test/CodeGen/AArch64/
Darm64-fast-isel-intrinsic.ll52 ; ARM64: adrp x9, _message@PAGE
53 ; ARM64: add x9, x9, _message@PAGEOFF
54 ; ARM64: ldr x10, [x9]
56 ; ARM64: ldr x10, [x9, #8]
58 ; ARM64: ldrb w11, [x9, #16]
69 ; ARM64: adrp x9, _message@PAGE
70 ; ARM64: add x9, x9, _message@PAGEOFF
71 ; ARM64: ldr x10, [x9]
73 ; ARM64: ldr x10, [x9, #8]
75 ; ARM64: ldrb w11, [x9, #16]
[all …]
/external/llvm/test/MC/Disassembler/AArch64/
Dbasic-a64-instructions.txt114 # CHECK: add x9, x3, xzr, lsl #10
121 # CHECK: add x8, x9, x10, asr #63
168 # CHECK: adds x9, x3, xzr, lsl #10
175 # CHECK: adds x8, x9, x10, asr #63
222 # CHECK: sub x9, x3, xzr, lsl #10
229 # CHECK: sub x8, x9, x10, asr #63
276 # CHECK: subs x9, x3, xzr, lsl #10
283 # CHECK: subs x8, x9, x10, asr #63
314 0x1f 0x3d 0x9 0x2b
327 # CHECK: cmn x8, x9, lsl #15
[all …]
/external/ComputeLibrary/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8s32_mmla_6x4VL/
Dgeneric.cpp91 "ldr x9, [%x[args_ptr], %[offsetof_B_ptr]]\n" in sve_hybrid_s8s32_mmla_6x4VL()
145 "ld1b { z7.b }, p5/Z, [x9]\n" in sve_hybrid_s8s32_mmla_6x4VL()
147 "ld1b { z6.b }, p5/Z, [x9, #1, MUL VL]\n" in sve_hybrid_s8s32_mmla_6x4VL()
155 "ld1b { z7.b }, p5/Z, [x9, #2, MUL VL]\n" in sve_hybrid_s8s32_mmla_6x4VL()
157 "ld1b { z6.b }, p5/Z, [x9, #3, MUL VL]\n" in sve_hybrid_s8s32_mmla_6x4VL()
159 "ld1b { z7.b }, p5/Z, [x9, #4, MUL VL]\n" in sve_hybrid_s8s32_mmla_6x4VL()
161 "ld1b { z6.b }, p5/Z, [x9, #5, MUL VL]\n" in sve_hybrid_s8s32_mmla_6x4VL()
163 "ld1b { z7.b }, p5/Z, [x9, #6, MUL VL]\n" in sve_hybrid_s8s32_mmla_6x4VL()
165 "ld1b { z6.b }, p5/Z, [x9, #7, MUL VL]\n" in sve_hybrid_s8s32_mmla_6x4VL()
166 "addvl x9, x9, #16\n" in sve_hybrid_s8s32_mmla_6x4VL()
[all …]
/external/ComputeLibrary/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_u8u32_mmla_6x4VL/
Dgeneric.cpp91 "ldr x9, [%x[args_ptr], %[offsetof_B_ptr]]\n" in sve_hybrid_u8u32_mmla_6x4VL()
145 "ld1b { z7.b }, p5/Z, [x9]\n" in sve_hybrid_u8u32_mmla_6x4VL()
147 "ld1b { z6.b }, p5/Z, [x9, #1, MUL VL]\n" in sve_hybrid_u8u32_mmla_6x4VL()
155 "ld1b { z7.b }, p5/Z, [x9, #2, MUL VL]\n" in sve_hybrid_u8u32_mmla_6x4VL()
157 "ld1b { z6.b }, p5/Z, [x9, #3, MUL VL]\n" in sve_hybrid_u8u32_mmla_6x4VL()
159 "ld1b { z7.b }, p5/Z, [x9, #4, MUL VL]\n" in sve_hybrid_u8u32_mmla_6x4VL()
161 "ld1b { z6.b }, p5/Z, [x9, #5, MUL VL]\n" in sve_hybrid_u8u32_mmla_6x4VL()
163 "ld1b { z7.b }, p5/Z, [x9, #6, MUL VL]\n" in sve_hybrid_u8u32_mmla_6x4VL()
165 "ld1b { z6.b }, p5/Z, [x9, #7, MUL VL]\n" in sve_hybrid_u8u32_mmla_6x4VL()
166 "addvl x9, x9, #16\n" in sve_hybrid_u8u32_mmla_6x4VL()
[all …]
/external/ComputeLibrary/src/core/NEON/kernels/arm_gemm/kernels/sme2_gemv_fp32bf16fp32_dot_16VL/
Dgeneric.cpp75 "mov x9, #0x0\n" in sme2_gemv_fp32bf16fp32_dot_16VL()
113 ".inst 0xc0042c00 // mova za.d[x9, #0], { z0.d-z3.d }\n" in sme2_gemv_fp32bf16fp32_dot_16VL()
133 ".inst 0xc150b098 // bfdot za.s[x9, 0], { z4.h-z7.h }, z0.h[0]\n" in sme2_gemv_fp32bf16fp32_dot_16VL()
137 ".inst 0xc150b618 // bfdot za.s[x9, 0], { z16.h-z19.h }, z0.h[1]\n" in sme2_gemv_fp32bf16fp32_dot_16VL()
141 ".inst 0xc150ba18 // bfdot za.s[x9, 0], { z16.h-z19.h }, z0.h[2]\n" in sme2_gemv_fp32bf16fp32_dot_16VL()
144 ".inst 0xc150bf98 // bfdot za.s[x9, 0], { z28.h-z31.h }, z0.h[3]\n" in sme2_gemv_fp32bf16fp32_dot_16VL()
159 ".inst 0xc150b098 // bfdot za.s[x9, 0], { z4.h-z7.h }, z0.h[0]\n" in sme2_gemv_fp32bf16fp32_dot_16VL()
164 ".inst 0xc150b618 // bfdot za.s[x9, 0], { z16.h-z19.h }, z0.h[1]\n" in sme2_gemv_fp32bf16fp32_dot_16VL()
169 ".inst 0xc150ba18 // bfdot za.s[x9, 0], { z16.h-z19.h }, z0.h[2]\n" in sme2_gemv_fp32bf16fp32_dot_16VL()
173 ".inst 0xc150bf98 // bfdot za.s[x9, 0], { z28.h-z31.h }, z0.h[3]\n" in sme2_gemv_fp32bf16fp32_dot_16VL()
[all …]
/external/cronet/third_party/boringssl/win-aarch64/crypto/cipher_extra/
Dchacha20_poly1305_armv8-win.S44 adcs x9, x9, x12
48 mul x13, x9, x16
49 umulh x14, x9, x16
56 mul x14, x9, x17
57 umulh x9, x9, x17
60 adc x10, x10, x9
68 adc x9, x14, x11 // No carry out since t0 is 61 bits and t3 is 63 bits
70 adcs x9, x9, x12
90 adcs x9, x9, x12
94 mul x13, x9, x16
[all …]
/external/cronet/third_party/boringssl/apple-aarch64/crypto/cipher_extra/
Dchacha20_poly1305_armv8-apple.S42 adcs x9, x9, x12
46 mul x13, x9, x16
47 umulh x14, x9, x16
54 mul x14, x9, x17
55 umulh x9, x9, x17
58 adc x10, x10, x9
66 adc x9, x14, x11 // No carry out since t0 is 61 bits and t3 is 63 bits
68 adcs x9, x9, x12
88 adcs x9, x9, x12
92 mul x13, x9, x16
[all …]
/external/boringssl/apple-aarch64/crypto/cipher_extra/
Dchacha20_poly1305_armv8-apple.S42 adcs x9, x9, x12
46 mul x13, x9, x16
47 umulh x14, x9, x16
54 mul x14, x9, x17
55 umulh x9, x9, x17
58 adc x10, x10, x9
66 adc x9, x14, x11 // No carry out since t0 is 61 bits and t3 is 63 bits
68 adcs x9, x9, x12
88 adcs x9, x9, x12
92 mul x13, x9, x16
[all …]
/external/cronet/third_party/boringssl/linux-aarch64/crypto/cipher_extra/
Dchacha20_poly1305_armv8-linux.S42 adcs x9, x9, x12
46 mul x13, x9, x16
47 umulh x14, x9, x16
54 mul x14, x9, x17
55 umulh x9, x9, x17
58 adc x10, x10, x9
66 adc x9, x14, x11 // No carry out since t0 is 61 bits and t3 is 63 bits
68 adcs x9, x9, x12
88 adcs x9, x9, x12
92 mul x13, x9, x16
[all …]
/external/boringssl/linux-aarch64/crypto/cipher_extra/
Dchacha20_poly1305_armv8-linux.S42 adcs x9, x9, x12
46 mul x13, x9, x16
47 umulh x14, x9, x16
54 mul x14, x9, x17
55 umulh x9, x9, x17
58 adc x10, x10, x9
66 adc x9, x14, x11 // No carry out since t0 is 61 bits and t3 is 63 bits
68 adcs x9, x9, x12
88 adcs x9, x9, x12
92 mul x13, x9, x16
[all …]
/external/boringssl/win-aarch64/crypto/cipher_extra/
Dchacha20_poly1305_armv8-win.S44 adcs x9, x9, x12
48 mul x13, x9, x16
49 umulh x14, x9, x16
56 mul x14, x9, x17
57 umulh x9, x9, x17
60 adc x10, x10, x9
68 adc x9, x14, x11 // No carry out since t0 is 61 bits and t3 is 63 bits
70 adcs x9, x9, x12
90 adcs x9, x9, x12
94 mul x13, x9, x16
[all …]
/external/llvm/test/MC/AArch64/
Dbasic-a64-instructions.s25 add x3, x5, x9, sxtx
33 // CHECK: add x3, x5, x9, sxtx // encoding: [0xa3,0xe0,0x29,0x8b]
71 sub x3, x5, x9, sxtx
79 // CHECK: sub x3, x5, x9, sxtx // encoding: [0xa3,0xe0,0x29,0xcb]
106 adds x3, x5, x9, sxtx #2
114 // CHECK: adds x3, x5, x9, sxtx #2 // encoding: [0xa3,0xe8,0x29,0xab]
141 subs x3, x5, x9, sxtx #2
149 // CHECK: subs x3, x5, x9, sxtx #2 // encoding: [0xa3,0xe8,0x29,0xeb]
176 cmp x5, x9, sxtx #2
184 // CHECK: cmp x5, x9, sxtx #2 // encoding: [0xbf,0xe8,0x29,0xeb]
[all …]
/external/libxaac/decoder/armv8/
Dixheaacd_sbr_qmfsyn64_winadd.s72 LSL x9, x7, #1
73 ADD x1, x1, x9
76 LSL x9, x7, #1
86 LD1 {v3.4h}, [x2], x9
91 LD1 {v5.4h}, [x2], x9
96 LD1 {v7.4h}, [x2], x9
101 LD1 {v9.4h}, [x2], x9
120 LD1 {v13.4h}, [x12], x9
125 LD1 {v15.4h}, [x12], x9
130 LD1 {v17.4h}, [x12], x9
[all …]
/external/ComputeLibrary/src/core/NEON/kernels/arm_gemm/kernels/sme2_gemv_u8qa_dot_16VL/
Dgeneric.cpp64 "mov x9, #0x0\n" in sme2_gemv_u8qa_dot_16VL()
104 ".inst 0xc0042c80 // mova za.d[x9, #0], { z4.d-z7.d }\n" in sme2_gemv_u8qa_dot_16VL()
116 ".inst 0xc153b230 // udot za.s[x9, 0], { z16.b-z19.b }, z3.b[0]\n" in sme2_gemv_u8qa_dot_16VL()
119 ".inst 0xc153b6b0 // udot za.s[x9, 0], { z20.b-z23.b }, z3.b[1]\n" in sme2_gemv_u8qa_dot_16VL()
122 ".inst 0xc153bab0 // udot za.s[x9, 0], { z20.b-z23.b }, z3.b[2]\n" in sme2_gemv_u8qa_dot_16VL()
125 ".inst 0xc153beb0 // udot za.s[x9, 0], { z20.b-z23.b }, z3.b[3]\n" in sme2_gemv_u8qa_dot_16VL()
139 ".inst 0xc153b230 // udot za.s[x9, 0], { z16.b-z19.b }, z3.b[0]\n" in sme2_gemv_u8qa_dot_16VL()
144 ".inst 0xc153b6b0 // udot za.s[x9, 0], { z20.b-z23.b }, z3.b[1]\n" in sme2_gemv_u8qa_dot_16VL()
149 ".inst 0xc153bab0 // udot za.s[x9, 0], { z20.b-z23.b }, z3.b[2]\n" in sme2_gemv_u8qa_dot_16VL()
153 ".inst 0xc153beb0 // udot za.s[x9, 0], { z20.b-z23.b }, z3.b[3]\n" in sme2_gemv_u8qa_dot_16VL()
[all …]

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