1 // Copyright 2017 Google LLC 2 // Copyright 2020 Intel Corporation 3 // 4 // Licensed under the Apache License, Version 2.0 (the "License"); 5 // you may not use this file except in compliance with the License. 6 // You may obtain a copy of the License at 7 // 8 // http://www.apache.org/licenses/LICENSE-2.0 9 // 10 // Unless required by applicable law or agreed to in writing, software 11 // distributed under the License is distributed on an "AS IS" BASIS, 12 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 // See the License for the specific language governing permissions and 14 // limitations under the License. 15 16 #ifndef CPU_FEATURES_INCLUDE_CPUINFO_X86_H_ 17 #define CPU_FEATURES_INCLUDE_CPUINFO_X86_H_ 18 19 #include "cpu_features_cache_info.h" 20 #include "cpu_features_macros.h" 21 22 CPU_FEATURES_START_CPP_NAMESPACE 23 24 // CPUID Vendors 25 #define CPU_FEATURES_VENDOR_GENUINE_INTEL "GenuineIntel" 26 #define CPU_FEATURES_VENDOR_AUTHENTIC_AMD "AuthenticAMD" 27 #define CPU_FEATURES_VENDOR_HYGON_GENUINE "HygonGenuine" 28 #define CPU_FEATURES_VENDOR_CENTAUR_HAULS "CentaurHauls" 29 #define CPU_FEATURES_VENDOR_SHANGHAI " Shanghai " 30 31 // See https://en.wikipedia.org/wiki/CPUID for a list of x86 cpu features. 32 // The field names are based on the short name provided in the wikipedia tables. 33 typedef struct { 34 int fpu : 1; 35 int tsc : 1; 36 int cx8 : 1; 37 int clfsh : 1; 38 int mmx : 1; 39 int aes : 1; 40 int erms : 1; 41 int f16c : 1; 42 int fma4 : 1; 43 int fma3 : 1; 44 int vaes : 1; 45 int vpclmulqdq : 1; 46 int bmi1 : 1; 47 int hle : 1; 48 int bmi2 : 1; 49 int rtm : 1; 50 int rdseed : 1; 51 int clflushopt : 1; 52 int clwb : 1; 53 54 int sse : 1; 55 int sse2 : 1; 56 int sse3 : 1; 57 int ssse3 : 1; 58 int sse4_1 : 1; 59 int sse4_2 : 1; 60 int sse4a : 1; 61 62 int avx : 1; 63 int avx2 : 1; 64 65 int avx512f : 1; 66 int avx512cd : 1; 67 int avx512er : 1; 68 int avx512pf : 1; 69 int avx512bw : 1; 70 int avx512dq : 1; 71 int avx512vl : 1; 72 int avx512ifma : 1; 73 int avx512vbmi : 1; 74 int avx512vbmi2 : 1; 75 int avx512vnni : 1; 76 int avx512bitalg : 1; 77 int avx512vpopcntdq : 1; 78 int avx512_4vnniw : 1; 79 int avx512_4vbmi2 : 1; 80 int avx512_second_fma : 1; 81 int avx512_4fmaps : 1; 82 int avx512_bf16 : 1; 83 int avx512_vp2intersect : 1; 84 int amx_bf16 : 1; 85 int amx_tile : 1; 86 int amx_int8 : 1; 87 88 int pclmulqdq : 1; 89 int smx : 1; 90 int sgx : 1; 91 int cx16 : 1; // aka. CMPXCHG16B 92 int sha : 1; 93 int popcnt : 1; 94 int movbe : 1; 95 int rdrnd : 1; 96 97 int dca : 1; 98 int ss : 1; 99 int adx : 1; 100 // Make sure to update X86FeaturesEnum below if you add a field here. 101 } X86Features; 102 103 typedef struct { 104 X86Features features; 105 int family; 106 int model; 107 int stepping; 108 char vendor[13]; // 0 terminated string 109 char brand_string[49]; // 0 terminated string 110 } X86Info; 111 112 // Calls cpuid and returns an initialized X86info. 113 X86Info GetX86Info(void); 114 115 // Returns cache hierarchy informations. 116 // Can call cpuid multiple times. 117 // Only works on Intel CPU at the moment. 118 CacheInfo GetX86CacheInfo(void); 119 120 typedef enum { 121 X86_UNKNOWN, 122 ZHAOXIN_ZHANGJIANG, // ZhangJiang 123 ZHAOXIN_WUDAOKOU, // WuDaoKou 124 ZHAOXIN_LUJIAZUI, // LuJiaZui 125 ZHAOXIN_YONGFENG, // YongFeng 126 INTEL_80486, // 80486 127 INTEL_P5, // P5 128 INTEL_LAKEMONT, // LAKEMONT 129 INTEL_CORE, // CORE 130 INTEL_PNR, // PENRYN 131 INTEL_NHM, // NEHALEM 132 INTEL_ATOM_BNL, // BONNELL 133 INTEL_WSM, // WESTMERE 134 INTEL_SNB, // SANDYBRIDGE 135 INTEL_IVB, // IVYBRIDGE 136 INTEL_ATOM_SMT, // SILVERMONT 137 INTEL_HSW, // HASWELL 138 INTEL_BDW, // BROADWELL 139 INTEL_SKL, // SKYLAKE 140 INTEL_ATOM_GMT, // GOLDMONT 141 INTEL_KBL, // KABY LAKE 142 INTEL_CFL, // COFFEE LAKE 143 INTEL_WHL, // WHISKEY LAKE 144 INTEL_CNL, // CANNON LAKE 145 INTEL_ICL, // ICE LAKE 146 INTEL_TGL, // TIGER LAKE 147 INTEL_SPR, // SAPPHIRE RAPIDS 148 INTEL_ADL, // ALDER LAKE 149 INTEL_RCL, // ROCKET LAKE 150 INTEL_KNIGHTS_M, // KNIGHTS MILL 151 INTEL_KNIGHTS_L, // KNIGHTS LANDING 152 INTEL_KNIGHTS_F, // KNIGHTS FERRY 153 INTEL_KNIGHTS_C, // KNIGHTS CORNER 154 INTEL_NETBURST, // NETBURST 155 AMD_HAMMER, // K8 HAMMER 156 AMD_K10, // K10 157 AMD_K11, // K11 158 AMD_K12, // K12 159 AMD_BOBCAT, // K14 BOBCAT 160 AMD_PILEDRIVER, // K15 PILEDRIVER 161 AMD_STREAMROLLER, // K15 STREAMROLLER 162 AMD_EXCAVATOR, // K15 EXCAVATOR 163 AMD_BULLDOZER, // K15 BULLDOZER 164 AMD_JAGUAR, // K16 JAGUAR 165 AMD_PUMA, // K16 PUMA 166 AMD_ZEN, // K17 ZEN 167 AMD_ZEN_PLUS, // K17 ZEN+ 168 AMD_ZEN2, // K17 ZEN 2 169 AMD_ZEN3, // K19 ZEN 3 170 X86_MICROARCHITECTURE_LAST_, 171 } X86Microarchitecture; 172 173 // Returns the underlying microarchitecture by looking at X86Info's vendor, 174 // family and model. 175 X86Microarchitecture GetX86Microarchitecture(const X86Info* info); 176 177 // Calls cpuid and fills the brand_string. 178 // - brand_string *must* be of size 49 (beware of array decaying). 179 // - brand_string will be zero terminated. 180 CPU_FEATURES_DEPRECATED("brand_string is now embedded in X86Info by default") 181 void FillX86BrandString(char brand_string[49]); 182 183 //////////////////////////////////////////////////////////////////////////////// 184 // Introspection functions 185 186 typedef enum { 187 X86_FPU, 188 X86_TSC, 189 X86_CX8, 190 X86_CLFSH, 191 X86_MMX, 192 X86_AES, 193 X86_ERMS, 194 X86_F16C, 195 X86_FMA4, 196 X86_FMA3, 197 X86_VAES, 198 X86_VPCLMULQDQ, 199 X86_BMI1, 200 X86_HLE, 201 X86_BMI2, 202 X86_RTM, 203 X86_RDSEED, 204 X86_CLFLUSHOPT, 205 X86_CLWB, 206 X86_SSE, 207 X86_SSE2, 208 X86_SSE3, 209 X86_SSSE3, 210 X86_SSE4_1, 211 X86_SSE4_2, 212 X86_SSE4A, 213 X86_AVX, 214 X86_AVX2, 215 X86_AVX512F, 216 X86_AVX512CD, 217 X86_AVX512ER, 218 X86_AVX512PF, 219 X86_AVX512BW, 220 X86_AVX512DQ, 221 X86_AVX512VL, 222 X86_AVX512IFMA, 223 X86_AVX512VBMI, 224 X86_AVX512VBMI2, 225 X86_AVX512VNNI, 226 X86_AVX512BITALG, 227 X86_AVX512VPOPCNTDQ, 228 X86_AVX512_4VNNIW, 229 X86_AVX512_4VBMI2, 230 X86_AVX512_SECOND_FMA, 231 X86_AVX512_4FMAPS, 232 X86_AVX512_BF16, 233 X86_AVX512_VP2INTERSECT, 234 X86_AMX_BF16, 235 X86_AMX_TILE, 236 X86_AMX_INT8, 237 X86_PCLMULQDQ, 238 X86_SMX, 239 X86_SGX, 240 X86_CX16, 241 X86_SHA, 242 X86_POPCNT, 243 X86_MOVBE, 244 X86_RDRND, 245 X86_DCA, 246 X86_SS, 247 X86_ADX, 248 X86_LAST_, 249 } X86FeaturesEnum; 250 251 int GetX86FeaturesEnumValue(const X86Features* features, X86FeaturesEnum value); 252 253 const char* GetX86FeaturesEnumName(X86FeaturesEnum); 254 255 const char* GetX86MicroarchitectureName(X86Microarchitecture); 256 257 CPU_FEATURES_END_CPP_NAMESPACE 258 259 #if !defined(CPU_FEATURES_ARCH_X86) 260 #error "Including cpuinfo_x86.h from a non-x86 target." 261 #endif 262 263 #endif // CPU_FEATURES_INCLUDE_CPUINFO_X86_H_ 264