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1 /******************************************************************************
2 *
3 * Copyright (C) 2012 Ittiam Systems Pvt Ltd, Bangalore
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 ******************************************************************************/
18 /**
19 *******************************************************************************
20 * @file
21 *  ihevcd_cxa.h
22 *
23 * @brief
24 *  This file contains all the necessary structure and  enumeration
25 * definitions needed for the Application  Program Interface(API) of the
26 * Ittiam HEVC decoder  on Cortex Ax
27 *
28 * @author
29 *  Harish
30 *
31 * @remarks
32 *  None
33 *
34 *******************************************************************************
35 */
36 #ifndef __IHEVCD_CXA_H__
37 #define __IHEVCD_CXA_H__
38 #ifdef __cplusplus
39 extern "C" {
40 #endif
41 #include "iv.h"
42 #include "ivd.h"
43 
44 
45 /*****************************************************************************/
46 /* Constant Macros                                                           */
47 /*****************************************************************************/
48 #define IVD_ERROR_MASK 0xFF
49 
50 /*****************************************************************************/
51 /* Function Macros                                                           */
52 /*****************************************************************************/
53 #define IS_IVD_CONCEALMENT_APPLIED(x)       (x & (1 << IVD_APPLIEDCONCEALMENT))
54 #define IS_IVD_INSUFFICIENTDATA_ERROR(x)    (x & (1 << IVD_INSUFFICIENTDATA))
55 #define IS_IVD_CORRUPTEDDATA_ERROR(x)       (x & (1 << IVD_CORRUPTEDDATA))
56 #define IS_IVD_CORRUPTEDHEADER_ERROR(x)     (x & (1 << IVD_CORRUPTEDHEADER))
57 #define IS_IVD_UNSUPPORTEDINPUT_ERROR(x)    (x & (1 << IVD_UNSUPPORTEDINPUT))
58 #define IS_IVD_UNSUPPORTEDPARAM_ERROR(x)    (x & (1 << IVD_UNSUPPORTEDPARAM))
59 #define IS_IVD_FATAL_ERROR(x)               (x & (1 << IVD_FATALERROR))
60 #define IS_IVD_INVALID_BITSTREAM_ERROR(x)   (x & (1 << IVD_INVALID_BITSTREAM))
61 #define IS_IVD_INCOMPLETE_BITSTREAM_ERROR(x) (x & (1 << IVD_INCOMPLETE_BITSTREAM))
62 
63 
64 /*****************************************************************************/
65 /* API Function Prototype                                                    */
66 /*****************************************************************************/
67 IV_API_CALL_STATUS_T ihevcd_cxa_api_function(iv_obj_t *ps_handle,
68                                              void *pv_api_ip,
69                                              void *pv_api_op);
70 
71 /*****************************************************************************/
72 /* Enums                                                                     */
73 /*****************************************************************************/
74 /* Codec Error codes for HEVC  Decoder                                       */
75 
76 
77 typedef enum {
78     /**
79      *  No error
80      */
81     IHEVCD_SUCCESS = 0,
82 
83     /**
84      *  Codec calls done without successful init
85      */
86     IHEVCD_INIT_NOT_DONE                        = IVD_DUMMY_ELEMENT_FOR_CODEC_EXTENSIONS,
87 
88 
89     IHEVCD_CXA_VID_HDR_DEC_NUM_FRM_BUF_NOT_SUFFICIENT,
90 
91     /**
92      *  Unsupported level passed as an argument
93      */
94     IHEVCD_LEVEL_UNSUPPORTED,
95     /**
96      *  Unsupported number of reference pictures passed as an argument
97      */
98     IHEVCD_NUM_REF_UNSUPPORTED,
99     /**
100      *  Unsupported number of reorder pictures passed as an argument
101      */
102     IHEVCD_NUM_REORDER_UNSUPPORTED,
103     /**
104      *  Unsupported number of extra display pictures passed as an argument
105      */
106     IHEVCD_NUM_EXTRA_DISP_UNSUPPORTED,
107     /**
108      *  Invalid display stride requested.
109      */
110     IHEVCD_INVALID_DISP_STRD,
111 
112     /**
113      * Reached end of sequence
114      */
115     IHEVCD_END_OF_SEQUENCE,
116 
117     /**
118      * Width/height greater than max width and max height
119      */
120     IHEVCD_UNSUPPORTED_DIMENSIONS,
121 
122     /**
123      *  Buffer size to hold version string is not sufficient
124      *  Allocate more to hold version string
125      */
126     IHEVCD_CXA_VERS_BUF_INSUFFICIENT,
127     /**
128      * Stream chroma format other than YUV420
129      */
130     IHEVCD_UNSUPPORTED_CHROMA_FMT_IDC,
131 
132     /**
133      * Frame info output buffer null
134      */
135     IHEVCD_FRAME_INFO_OP_BUF_NULL,
136 
137     /**
138      * Frame info insufficient buffer
139      */
140     IHEVCD_INSUFFICIENT_METADATA_BUFFER,
141 
142     /**
143      * Generic failure
144      */
145     IHEVCD_FAIL                             = 0x7FFFFFFF
146 
147 
148 }IHEVCD_CXA_ERROR_CODES_T;
149 
150 /*****************************************************************************/
151 /* Extended Structures                                                       */
152 /*****************************************************************************/
153 
154 
155 /*****************************************************************************/
156 /*  Delete Codec                                                             */
157 /*****************************************************************************/
158 
159 typedef struct {
160     ivd_delete_ip_t               s_ivd_delete_ip_t;
161 }ihevcd_cxa_delete_ip_t;
162 
163 
164 typedef struct {
165     ivd_delete_op_t               s_ivd_delete_op_t;
166 }ihevcd_cxa_delete_op_t;
167 
168 /*****************************************************************************/
169 /*   Initialize decoder                                                      */
170 /*****************************************************************************/
171 
172 typedef struct {
173     ivd_create_ip_t                         s_ivd_create_ip_t;
174 
175     /**
176      * enable_frm_info
177      */
178     UWORD32                                 u4_enable_frame_info;
179 }ihevcd_cxa_create_ip_t;
180 
181 
182 typedef struct {
183     ivd_create_op_t                         s_ivd_create_op_t;
184 }ihevcd_cxa_create_op_t;
185 
186 /*****************************************************************************/
187 /*   Video Decode                                                            */
188 /*****************************************************************************/
189 
190 typedef struct {
191 
192     /**
193      * ivd_video_decode_ip_t
194      */
195     ivd_video_decode_ip_t                   s_ivd_video_decode_ip_t;
196 
197     /**
198      * 8x8 block QP map
199      */
200     UWORD8                                  *pu1_8x8_blk_qp_map;
201 
202     /**
203      * 8x8 block type map
204      */
205     UWORD8                                  *pu1_8x8_blk_type_map;
206 
207     /**
208      * 8x8 block QP map size
209      */
210     UWORD32                                 u4_8x8_blk_qp_map_size;
211 
212     /**
213      * 8x8 block type map size
214      */
215     UWORD32                                 u4_8x8_blk_type_map_size;
216 }ihevcd_cxa_video_decode_ip_t;
217 
218 /*********************************************************************************/
219 /* QP and CU/Block type maps are defined for each 8x8 coding unit.               */
220 /* QP can range from <1, 51> and block type can be INTER/INTRA/SKIP.             */
221 /*                                                                               */
222 /* A frame with a resolution of WdxHt has a total of                             */
223 /* (align8(Wd) x align8(Ht)) / 64 entries for QP and Block type map each.        */
224 /*                                                                               */
225 /* For example, for a frame of size 60x60 shown in the figure down, both         */
226 /* maps (QP and Block type) have the same layout.                                */
227 /* Each block represents an 8x8 sub-block. Both width and height are aligned to  */
228 /* next largest multiple of 8, 64 in this case.                                  */
229 /*                                                                               */
230 /*     0     8     16    24    32    40    48    56   64                         */
231 /*  0   ------------------------------------------------                         */
232 /*     | 0th | 1st | 2nd | 3rd | 4th | 5th | 6th | 7th |                         */
233 /*  8   ------------------------------------------------                         */
234 /*     | 8th | 9th | 10th | -  |  -  | -   | -   |  -  |                         */
235 /* 16   ------------------------------------------------                         */
236 /*     |  -  |  -  |  -   | -  |  -  |  -  |  -  |  -  |                         */
237 /* 24   ------------------------------------------------                         */
238 /*     |  -  |  -  |  -   | -  |  -  |  -  |  -  |  -  |                         */
239 /* 32   ------------------------------------------------                         */
240 /*     |  -  |  -  |  -   | -  |  -  |  -  |  -  |  -  |                         */
241 /* 40   ------------------------------------------------                         */
242 /*     |  -  |  -  |  -   | -  |  -  |  -  |  -  |  -  |                         */
243 /* 48   ------------------------------------------------                         */
244 /*     |  -  |  -  |  -   | -  |  -  |  -  |  -  |  -  |                         */
245 /* 56   ------------------------------------------------                         */
246 /*     |  -  |  -  |  -   | -  |  -  |  -  |  -  |  -  |                         */
247 /* 64   ------------------------------------------------                         */
248 /*                                                                               */
249 /*********************************************************************************/
250 
251 typedef struct {
252 
253     /**
254      * ivd_video_decode_op_t
255      */
256     ivd_video_decode_op_t                   s_ivd_video_decode_op_t;
257 
258     /**
259      * 8x8 block QP map
260      */
261     UWORD8                                  *pu1_8x8_blk_qp_map;
262 
263     /**
264      * 8x8 block type map
265      */
266     UWORD8                                  *pu1_8x8_blk_type_map;
267 
268     /**
269      * 8x8 block QP map size
270      */
271     UWORD32                                 u4_8x8_blk_qp_map_size;
272 
273     /**
274      * 8x8 block type map size
275      */
276     UWORD32                                 u4_8x8_blk_type_map_size;
277 }ihevcd_cxa_video_decode_op_t;
278 
279 
280 /*****************************************************************************/
281 /*   Get Display Frame                                                       */
282 /*****************************************************************************/
283 
284 typedef struct
285 {
286     /**
287      * ivd_get_display_frame_ip_t
288      */
289     ivd_get_display_frame_ip_t              s_ivd_get_display_frame_ip_t;
290 }ihevcd_cxa_get_display_frame_ip_t;
291 
292 
293 typedef struct
294 {
295     /**
296      * ivd_get_display_frame_op_t
297      */
298     ivd_get_display_frame_op_t              s_ivd_get_display_frame_op_t;
299 }ihevcd_cxa_get_display_frame_op_t;
300 
301 /*****************************************************************************/
302 /*   Set Display Frame                                                       */
303 /*****************************************************************************/
304 
305 
306 typedef struct
307 {
308     /**
309      * ivd_set_display_frame_ip_t
310      */
311     ivd_set_display_frame_ip_t              s_ivd_set_display_frame_ip_t;
312 }ihevcd_cxa_set_display_frame_ip_t;
313 
314 
315 typedef struct
316 {
317     /**
318      * ivd_set_display_frame_op_t
319      */
320     ivd_set_display_frame_op_t              s_ivd_set_display_frame_op_t;
321 }ihevcd_cxa_set_display_frame_op_t;
322 
323 /*****************************************************************************/
324 /*   Release Display Buffers                                                 */
325 /*****************************************************************************/
326 
327 
328 typedef struct
329 {
330     /**
331      * ivd_rel_display_frame_ip_t
332      */
333 
334     ivd_rel_display_frame_ip_t                  s_ivd_rel_display_frame_ip_t;
335 }ihevcd_cxa_rel_display_frame_ip_t;
336 
337 
338 typedef struct
339 {
340     /**
341      * ivd_rel_display_frame_op_t
342      */
343     ivd_rel_display_frame_op_t                  s_ivd_rel_display_frame_op_t;
344 }ihevcd_cxa_rel_display_frame_op_t;
345 
346 
347 typedef enum
348 {
349     /** Set number of cores/threads to be used */
350     IHEVCD_CXA_CMD_CTL_SET_NUM_CORES         = IVD_CMD_CTL_CODEC_SUBCMD_START,
351 
352     /** Set processor details */
353     IHEVCD_CXA_CMD_CTL_SET_PROCESSOR         = IVD_CMD_CTL_CODEC_SUBCMD_START + 0x001,
354 
355     /** Get display buffer dimensions */
356     IHEVCD_CXA_CMD_CTL_GET_BUFFER_DIMENSIONS = IVD_CMD_CTL_CODEC_SUBCMD_START + 0x100,
357 
358     /** Get VUI parameters */
359     IHEVCD_CXA_CMD_CTL_GET_VUI_PARAMS        = IVD_CMD_CTL_CODEC_SUBCMD_START + 0x101,
360 
361     /** Get SEI Mastering display color volume parameters */
362     IHEVCD_CXA_CMD_CTL_GET_SEI_MASTERING_PARAMS   = IVD_CMD_CTL_CODEC_SUBCMD_START + 0x102,
363 
364     /** Enable/disable GPU, supported on select platforms */
365     IHEVCD_CXA_CMD_CTL_GPU_ENABLE_DISABLE    = IVD_CMD_CTL_CODEC_SUBCMD_START + 0x200,
366 
367     /** Set degrade level */
368     IHEVCD_CXA_CMD_CTL_DEGRADE               = IVD_CMD_CTL_CODEC_SUBCMD_START + 0x300
369 }IHEVCD_CXA_CMD_CTL_SUB_CMDS;
370 /*****************************************************************************/
371 /*   Video control  Flush                                                    */
372 /*****************************************************************************/
373 
374 
375 typedef struct {
376 
377     /**
378      * ivd_ctl_flush_ip_t
379      */
380     ivd_ctl_flush_ip_t                      s_ivd_ctl_flush_ip_t;
381 }ihevcd_cxa_ctl_flush_ip_t;
382 
383 
384 typedef struct {
385 
386     /**
387      * ivd_ctl_flush_op_t
388      */
389     ivd_ctl_flush_op_t                      s_ivd_ctl_flush_op_t;
390 }ihevcd_cxa_ctl_flush_op_t;
391 
392 /*****************************************************************************/
393 /*   Video control reset                                                     */
394 /*****************************************************************************/
395 
396 
397 typedef struct {
398 
399     /**
400      * ivd_ctl_reset_ip_t
401      */
402     ivd_ctl_reset_ip_t                      s_ivd_ctl_reset_ip_t;
403 }ihevcd_cxa_ctl_reset_ip_t;
404 
405 
406 typedef struct {
407 
408     /**
409      * ivd_ctl_reset_op_t
410      */
411     ivd_ctl_reset_op_t                      s_ivd_ctl_reset_op_t;
412 }ihevcd_cxa_ctl_reset_op_t;
413 
414 
415 /*****************************************************************************/
416 /*   Video control  Set Params                                               */
417 /*****************************************************************************/
418 
419 
420 typedef struct {
421 
422     /**
423      *  ivd_ctl_set_config_ip_t
424      */
425     ivd_ctl_set_config_ip_t             s_ivd_ctl_set_config_ip_t;
426 }ihevcd_cxa_ctl_set_config_ip_t;
427 
428 
429 typedef struct {
430 
431     /**
432      * ivd_ctl_set_config_op_t
433      */
434     ivd_ctl_set_config_op_t             s_ivd_ctl_set_config_op_t;
435 }ihevcd_cxa_ctl_set_config_op_t;
436 
437 /*****************************************************************************/
438 /*   Video control:Get Buf Info                                              */
439 /*****************************************************************************/
440 
441 
442 typedef struct {
443 
444     /**
445      * ivd_ctl_getbufinfo_ip_t
446      */
447     ivd_ctl_getbufinfo_ip_t             s_ivd_ctl_getbufinfo_ip_t;
448 }ihevcd_cxa_ctl_getbufinfo_ip_t;
449 
450 
451 
452 typedef struct {
453 
454     /**
455      * ivd_ctl_getbufinfo_op_t
456      */
457     ivd_ctl_getbufinfo_op_t             s_ivd_ctl_getbufinfo_op_t;
458 }ihevcd_cxa_ctl_getbufinfo_op_t;
459 
460 
461 /*****************************************************************************/
462 /*   Video control:Getstatus Call                                            */
463 /*****************************************************************************/
464 
465 
466 typedef struct {
467 
468     /**
469      * ivd_ctl_getstatus_ip_t
470      */
471     ivd_ctl_getstatus_ip_t                  s_ivd_ctl_getstatus_ip_t;
472 }ihevcd_cxa_ctl_getstatus_ip_t;
473 
474 
475 
476 typedef struct {
477 
478     /**
479      * ivd_ctl_getstatus_op_t
480      */
481     ivd_ctl_getstatus_op_t                  s_ivd_ctl_getstatus_op_t;
482 
483     /**
484      * Height of the coding picture without cropping
485      */
486     UWORD32                  u4_coded_pic_ht;
487 
488     /**
489      * Width of the coding picture without cropping
490      */
491     UWORD32                  u4_coded_pic_wd;
492 }ihevcd_cxa_ctl_getstatus_op_t;
493 
494 
495 /*****************************************************************************/
496 /*   Video control:Get Version Info                                          */
497 /*****************************************************************************/
498 
499 
500 typedef struct {
501 
502     /**
503      *  ivd_ctl_getversioninfo_ip_t
504      */
505     ivd_ctl_getversioninfo_ip_t         s_ivd_ctl_getversioninfo_ip_t;
506 }ihevcd_cxa_ctl_getversioninfo_ip_t;
507 
508 
509 
510 typedef struct {
511 
512     /**
513      *  ivd_ctl_getversioninfo_op_t
514      */
515     ivd_ctl_getversioninfo_op_t         s_ivd_ctl_getversioninfo_op_t;
516 }ihevcd_cxa_ctl_getversioninfo_op_t;
517 
518 
519 typedef struct {
520 
521     /**
522      * u4_size
523      */
524     UWORD32                                     u4_size;
525 
526     /**
527      * cmd
528      */
529     IVD_API_COMMAND_TYPE_T                      e_cmd;
530 
531     /**
532      * sub_cmd
533      */
534     IVD_CONTROL_API_COMMAND_TYPE_T              e_sub_cmd;
535 
536     /**
537      * Pictures that are are degraded
538      * 0 : No degrade
539      * 1 : Only on non-reference frames
540      * 2 : Use interval specified by u4_nondegrade_interval
541      * 3 : All non-key frames
542      * 4 : All frames
543      */
544     WORD32                                     i4_degrade_pics;
545 
546     /**
547      * Interval for pictures which are completely decoded without any degradation
548      */
549     WORD32                                     i4_nondegrade_interval;
550 
551     /**
552      * bit position (lsb is zero): Type of degradation
553      * 0 : Disable SAO
554      * 1 : Disable deblocking
555      * 2 : Faster inter prediction filters
556      * 3 : Fastest inter prediction filters
557      */
558     WORD32                                     i4_degrade_type;
559 
560 }ihevcd_cxa_ctl_degrade_ip_t;
561 
562 typedef struct
563 {
564     /**
565      * u4_size
566      */
567     UWORD32                                     u4_size;
568 
569     /**
570      * error_code
571      */
572     UWORD32                                     u4_error_code;
573 }ihevcd_cxa_ctl_degrade_op_t;
574 
575 typedef struct
576 {
577 
578     /**
579      * size
580      */
581     UWORD32                                     u4_size;
582 
583     /**
584      * cmd
585      */
586     IVD_API_COMMAND_TYPE_T                      e_cmd;
587 
588     /**
589      * sub_cmd
590      */
591     IVD_CONTROL_API_COMMAND_TYPE_T              e_sub_cmd;
592 
593     /**
594      * num_cores
595      */
596     UWORD32                                     u4_num_cores;
597 }ihevcd_cxa_ctl_set_num_cores_ip_t;
598 
599 typedef struct
600 {
601 
602     /**
603      * size
604      */
605     UWORD32                                     u4_size;
606 
607     /**
608      * error_code
609      */
610     UWORD32                                     u4_error_code;
611 }ihevcd_cxa_ctl_set_num_cores_op_t;
612 
613 typedef struct
614 {
615     /**
616      * size
617      */
618     UWORD32                                     u4_size;
619     /**
620      * cmd
621      */
622     IVD_API_COMMAND_TYPE_T                      e_cmd;
623     /**
624      * sub cmd
625      */
626     IVD_CONTROL_API_COMMAND_TYPE_T              e_sub_cmd;
627     /**
628      * Processor type
629      */
630     UWORD32                                     u4_arch;
631     /**
632      * SOC type
633      */
634     UWORD32                                     u4_soc;
635 
636     /**
637      * num_cores
638      */
639     UWORD32                                     u4_num_cores;
640 
641 }ihevcd_cxa_ctl_set_processor_ip_t;
642 
643 typedef struct
644 {
645     /**
646      * size
647      */
648     UWORD32                                     u4_size;
649     /**
650      * error_code
651      */
652     UWORD32                                     u4_error_code;
653 }ihevcd_cxa_ctl_set_processor_op_t;
654 
655 typedef struct
656 {
657 
658     /**
659      * size
660      */
661     UWORD32                                     u4_size;
662 
663     /**
664      * cmd
665      */
666     IVD_API_COMMAND_TYPE_T                      e_cmd;
667 
668     /**
669      * sub cmd
670      */
671     IVD_CONTROL_API_COMMAND_TYPE_T              e_sub_cmd;
672 }ihevcd_cxa_ctl_get_frame_dimensions_ip_t;
673 
674 
675 typedef struct {
676 
677     /**
678      * size
679      */
680     UWORD32                                     u4_size;
681 
682     /**
683      * error_code
684      */
685     UWORD32                                     u4_error_code;
686 
687     /**
688      * x_offset[3]
689      */
690     UWORD32                                     u4_x_offset[3];
691 
692     /**
693      * y_offset[3]
694      */
695     UWORD32                                     u4_y_offset[3];
696 
697     /**
698      * disp_wd[3]
699      */
700     UWORD32                                     u4_disp_wd[3];
701 
702     /**
703      * disp_ht[3]
704      */
705     UWORD32                                     u4_disp_ht[3];
706 
707     /**
708      * buffer_wd[3]
709      */
710     UWORD32                                     u4_buffer_wd[3];
711 
712     /**
713      * buffer_ht[3]
714      */
715     UWORD32                                     u4_buffer_ht[3];
716 }ihevcd_cxa_ctl_get_frame_dimensions_op_t;
717 
718 typedef struct {
719     UWORD32                                     u4_size;
720     IVD_API_COMMAND_TYPE_T                      e_cmd;
721     IVD_CONTROL_API_COMMAND_TYPE_T              e_sub_cmd;
722 }ihevcd_cxa_ctl_get_vui_params_ip_t;
723 
724 typedef struct {
725     UWORD32                                     u4_size;
726     UWORD32                                     u4_error_code;
727 
728     /**
729     *  indicates the presence of aspect_ratio
730     */
731     UWORD8 u1_aspect_ratio_info_present_flag;
732 
733     /**
734     *  specifies the aspect ratio of the luma samples
735     */
736     UWORD8 u1_aspect_ratio_idc;
737 
738     /**
739     *  width of the luma samples. user dependent
740     */
741     UWORD16 u2_sar_width;
742 
743     /**
744     *  hieght of the luma samples. user dependent
745     */
746     UWORD16 u2_sar_height;
747 
748     /**
749     * if 1, specifies that the overscan_appropriate_flag is present
750     * if 0, the preferred display method for the video signal is unspecified
751     */
752     UWORD8 u1_overscan_info_present_flag;
753 
754     /**
755     * if 1,indicates that the cropped decoded pictures output
756     * are suitable for display using overscan
757     */
758     UWORD8 u1_overscan_appropriate_flag;
759 
760     /**
761     * if 1 specifies that video_format, video_full_range_flag and
762     * colour_description_present_flag are present
763     */
764     UWORD8 u1_video_signal_type_present_flag;
765 
766     /**
767     *
768     */
769     UWORD8 u1_video_format;
770 
771     /**
772     * indicates the black level and range of the luma and chroma signals
773     */
774     UWORD8 u1_video_full_range_flag;
775 
776     /**
777     * if 1,to 1 specifies that colour_primaries, transfer_characteristics
778     * and matrix_coefficients are present
779     */
780     UWORD8 u1_colour_description_present_flag;
781 
782     /**
783     * indicates the chromaticity coordinates of the source primaries
784     */
785     UWORD8 u1_colour_primaries;
786 
787     /**
788     * indicates the opto-electronic transfer characteristic of the source picture
789     */
790     UWORD8 u1_transfer_characteristics;
791 
792     /**
793     * the matrix coefficients used in deriving luma and chroma signals
794     * from the green, blue, and red primaries
795     */
796     UWORD8 u1_matrix_coefficients;
797 
798     /**
799     * if 1, specifies that chroma_sample_loc_type_top_field and
800     * chroma_sample_loc_type_bottom_field are present
801     */
802     UWORD8 u1_chroma_loc_info_present_flag;
803 
804     /**
805     * location of chroma samples
806     */
807     UWORD8 u1_chroma_sample_loc_type_top_field;
808 
809     UWORD8 u1_chroma_sample_loc_type_bottom_field;
810 
811     /**
812     * if 1, indicates that the value of all decoded chroma samples is
813     * equal to 1 << ( BitDepthC - 1 )
814     */
815     UWORD8 u1_neutral_chroma_indication_flag;
816 
817     /**
818     *  1 indicates that the coded video sequence conveys pictures that represent fields
819     *  0 indicates the pictures that represents field
820     */
821     UWORD8 u1_field_seq_flag;
822 
823     /**
824     * specifies that picture timing SEI messages are present for every picture
825     */
826     UWORD8 u1_frame_field_info_present_flag;
827 
828     /**
829     * 1 indicates that the default display window parameters follow next in the VUI
830     */
831     UWORD8 u1_default_display_window_flag;
832 
833     /**
834     * specify the samples of the pictures in the coded video sequence
835     * that are within the default display window,
836     * in terms of a rectangular region specified in picture coordinates for display
837     */
838     UWORD32 u4_def_disp_win_left_offset;
839 
840     UWORD32 u4_def_disp_win_right_offset;
841 
842     UWORD32 u4_def_disp_win_top_offset;
843 
844     UWORD32 u4_def_disp_win_bottom_offset;
845 
846     /**
847     *  to 1 specifies that the syntax structure hrd_parameters is present in the vui_parameters syntax structue
848     */
849     UWORD8 u1_vui_hrd_parameters_present_flag;
850 
851     /**
852     *   Indicates the presence of the
853     *   num_units_in_ticks, time_scale flag
854     */
855     UWORD8 u1_vui_timing_info_present_flag;
856 
857     /**
858     *   Number of units that
859     *   correspond to one increment of the
860     *   clock. Indicates the  resolution
861     */
862     UWORD32 u4_vui_num_units_in_tick;
863 
864     /**
865     *   The number of time units that pass in one second
866     */
867     UWORD32 u4_vui_time_scale;
868     /**
869     * if 1, indicates that the POC for each picture in the coded video sequence (cvs) (not the first picture), in decoding order,
870     * is proportional to the output time of the picture relative to that of the first picture in the cvs
871     */
872     UWORD8 u1_poc_proportional_to_timing_flag;
873 
874     /**
875     * num_ticks_poc_diff_one_minus1 plus 1 specifies the number of clock ticks
876     * corresponding to a difference of poc values equal to 1
877     */
878     UWORD32 u4_num_ticks_poc_diff_one_minus1;
879 
880     /**
881     * 1, specifies that the following cvs bitstream restriction parameters are present
882     */
883     UWORD8 u1_bitstream_restriction_flag;
884 
885     /**
886     *  if 1, indicates that each pps that is active in the cvs has
887     *  the same value of the tile syntax elements
888     */
889     UWORD8 u1_tiles_fixed_structure_flag;
890 
891     /**
892     * if 0, indicates that no pel outside the pic boundaries and
893     * no sub-pels derived using pels outside the pic boundaries is used for inter prediction
894     */
895     UWORD8 u1_motion_vectors_over_pic_boundaries_flag;
896 
897     /**
898     * if 1, indicates
899     * all P/B slices belonging to the same pic have an identical refpic list0,
900     * all B slices that belong to the same picture have an identical refpic list1.
901     */
902     UWORD8 u1_restricted_ref_pic_lists_flag;
903 
904     /**
905     *
906     */
907     UWORD8 u4_min_spatial_segmentation_idc;
908     /**
909     * Indicates a number of bytes not exceeded by the sum of the sizes of the VCL NAL units
910     * associated with any coded picture
911     */
912     UWORD8 u1_max_bytes_per_pic_denom;
913 
914     /**
915     *  Indicates an upper bound for the number of bits of coding_unit() data
916     */
917     UWORD8 u1_max_bits_per_mincu_denom;
918 
919     /**
920     * Indicate the maximum absolute value of a decoded horizontal MV component
921     * in quarter-pel luma units
922     */
923     UWORD8 u1_log2_max_mv_length_horizontal;
924 
925     /**
926     * Indicate the maximum absolute value of a decoded vertical MV component
927     * in quarter-pel luma units
928     */
929     UWORD8 u1_log2_max_mv_length_vertical;
930 
931     /**
932      * HRD parameters
933      */
934 
935 
936     /**
937     *   Indicates the presence of the
938     *   num_units_in_ticks, time_scale flag
939     */
940     UWORD8 u1_timing_info_present_flag;
941 
942     /**
943     *   Number of units that
944     *   correspond to one increment of the
945     *   clock. Indicates the  resolution
946     */
947     UWORD32 u4_num_units_in_tick;
948 
949     /**
950     *   The number of time units that pass in one second
951     */
952     UWORD32 u4_time_scale;
953 
954     /**
955     * Nal- hrd parameters flag
956     */
957     UWORD8 u1_nal_hrd_parameters_present_flag;
958 
959     /**
960     * VCL- hrd parameters flag
961     */
962     UWORD8 u1_vcl_hrd_parameters_present_flag;
963 
964     /**
965     * Indicates the presence of NAL-HRD params or VCL_HRD params
966     * in the bitstream
967     */
968     UWORD8 u1_cpbdpb_delays_present_flag;
969 
970     /**
971     * specifies that sub-picture level CPB removal delay parameters are
972     * present in picture timing SEI messages
973     */
974     UWORD8 u1_sub_pic_cpb_params_present_flag;
975 
976     /**
977     * specify the clock sub-tick
978     * (the minimum interval of time that can be represented in the coded data when sub_pic_cpb_params_present_flag is equal to 1)
979     */
980     UWORD8 u1_tick_divisor_minus2;
981 
982     /**
983     * specifies the length, in bits for the du cpb delay syntax in pt_sei
984     */
985     UWORD8 u1_du_cpb_removal_delay_increment_length_minus1;
986 
987     /**
988     * Indicates presence of sub_pic_cpb_params in pic timing sei
989     */
990     UWORD8 u1_sub_pic_cpb_params_in_pic_timing_sei_flag;
991 
992     /**
993      * Indicates dpb output delay for the du
994      */
995     UWORD8 u1_dpb_output_delay_du_length_minus1;
996 
997     /**
998     * (together with bit_rate_value_minus1) specifies the
999     * maximum input bit rate of the i-th CPB
1000     */
1001     UWORD8 u4_bit_rate_scale;
1002 
1003     /**
1004     * (together with cpb_size_du_value_minus1) specfies
1005     * CPB size of the i-th CPB when the CPB operates
1006     * at the access unit level
1007     */
1008     UWORD8 u4_cpb_size_scale;
1009 
1010     /**
1011     * (together with cpb_size_du_value_minus1) specfies
1012     * CPB size of the i-th CPB when the CPB operates
1013     * at the sub-picture level
1014     */
1015     UWORD8 u4_cpb_size_du_scale;
1016 
1017 
1018     /**
1019     * specifies the length, in bits for initial cpb delay (nal/vcl)sysntax in bp sei
1020     */
1021     UWORD8  u1_initial_cpb_removal_delay_length_minus1;
1022 
1023     /**
1024     * specifies the length, in bits for the au cpb delay syntax in pt_sei
1025     */
1026     UWORD8  u1_au_cpb_removal_delay_length_minus1;
1027 
1028     /**
1029     * specifies the length, in bits, of the pic_dpb_output_delay syntax element in the pt SEI message
1030     */
1031     UWORD8  u1_dpb_output_delay_length_minus1;
1032 
1033     /**
1034     * if 1, , for the highest temporal sub-layers, the temporal distance between the HRD output times
1035     *  of consecutive pictures in output order is constrained refer to Table E-6
1036     */
1037     UWORD8 au1_fixed_pic_rate_general_flag[6];
1038 
1039     UWORD8 au1_fixed_pic_rate_within_cvs_flag[6];
1040 
1041     /**
1042     * if 1, , for the highest temporal sub-layers, the temporal distance (in clock ticks) between the
1043     * element units that specify HRD output times of consecutive pictures in output order is constrained
1044     * refer to Table E-6
1045     */
1046     UWORD16 au2_elemental_duration_in_tc_minus1[6];
1047 
1048     /**
1049     * specifies the HRD operational mode
1050     */
1051     UWORD8 au1_low_delay_hrd_flag[6];
1052 
1053     /**
1054     * 1 specifies the number of alternative CPB specifications in the
1055     * bitstream of the cvs when HighestTid is equal to i
1056     */
1057     UWORD8 au1_cpb_cnt_minus1[6];
1058 }ihevcd_cxa_ctl_get_vui_params_op_t;
1059 
1060 typedef struct
1061 {
1062     UWORD32                                     u4_size;
1063     IVD_API_COMMAND_TYPE_T                      e_cmd;
1064     IVD_CONTROL_API_COMMAND_TYPE_T              e_sub_cmd;
1065 }ihevcd_cxa_ctl_get_sei_mastering_params_ip_t;
1066 
1067 typedef struct
1068 {
1069     UWORD32                                     u4_size;
1070     UWORD32                                     u4_error_code;
1071 
1072     /**
1073      * Array to store the display_primaries_x values
1074      */
1075     UWORD16 au2_display_primaries_x[3];
1076 
1077     /**
1078      * Array to store the display_primaries_y values
1079      */
1080     UWORD16 au2_display_primaries_y[3];
1081 
1082     /**
1083      * Variable to store the white point x value
1084      */
1085     UWORD16 u2_white_point_x;
1086 
1087     /**
1088      * Variable to store the white point y value
1089      */
1090     UWORD16 u2_white_point_y;
1091 
1092     /**
1093      * Variable to store the max display mastering luminance value
1094      */
1095     UWORD32 u4_max_display_mastering_luminance;
1096 
1097     /**
1098      * Variable to store the min display mastering luminance value
1099      */
1100     UWORD32 u4_min_display_mastering_luminance;
1101 
1102 }ihevcd_cxa_ctl_get_sei_mastering_params_op_t;
1103 
1104 #ifdef __cplusplus
1105 } /* closing brace for extern "C" */
1106 #endif
1107 #endif /* __IHEVCD_CXA_H__ */
1108