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1 /*
2  * Copyright 2022 Google LLC
3  *
4  * Use of this source code is governed by a BSD-style license that can be
5  * found in the LICENSE file.
6  */
7 
8 #ifndef SkFeatures_DEFINED
9 #define SkFeatures_DEFINED
10 
11 #if !defined(SK_BUILD_FOR_ANDROID) && !defined(SK_BUILD_FOR_IOS) && !defined(SK_BUILD_FOR_WIN) && \
12     !defined(SK_BUILD_FOR_UNIX) && !defined(SK_BUILD_FOR_MAC)
13 
14     #ifdef __APPLE__
15         #include <TargetConditionals.h>
16     #endif
17 
18     #if defined(_WIN32) || defined(__SYMBIAN32__)
19         #define SK_BUILD_FOR_WIN
20     #elif defined(ANDROID) || defined(__ANDROID__)
21         #define SK_BUILD_FOR_ANDROID
22     #elif defined(linux) || defined(__linux) || defined(__FreeBSD__) || \
23           defined(__OpenBSD__) || defined(__sun) || defined(__NetBSD__) || \
24           defined(__DragonFly__) || defined(__Fuchsia__) || \
25           defined(__GLIBC__) || defined(__GNU__) || defined(__unix__)
26         #define SK_BUILD_FOR_UNIX
27     #elif TARGET_OS_IPHONE || TARGET_IPHONE_SIMULATOR
28         #define SK_BUILD_FOR_IOS
29     #else
30         #define SK_BUILD_FOR_MAC
31     #endif
32 #endif // end SK_BUILD_FOR_*
33 
34 
35 #if defined(SK_BUILD_FOR_WIN) && !defined(__clang__)
36     #if !defined(SK_RESTRICT)
37         #define SK_RESTRICT __restrict
38     #endif
39     #if !defined(SK_WARN_UNUSED_RESULT)
40         #define SK_WARN_UNUSED_RESULT
41     #endif
42 #endif
43 
44 #if !defined(SK_RESTRICT)
45     #define SK_RESTRICT __restrict__
46 #endif
47 
48 #if !defined(SK_CPU_BENDIAN) && !defined(SK_CPU_LENDIAN)
49     #if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
50         #define SK_CPU_BENDIAN
51     #elif defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__)
52         #define SK_CPU_LENDIAN
53     #elif defined(__sparc) || defined(__sparc__) || \
54       defined(_POWER) || defined(__powerpc__) || \
55       defined(__ppc__) || defined(__hppa) || \
56       defined(__PPC__) || defined(__PPC64__) || \
57       defined(_MIPSEB) || defined(__ARMEB__) || \
58       defined(__s390__) || \
59       (defined(__sh__) && defined(__BIG_ENDIAN__)) || \
60       (defined(__ia64) && defined(__BIG_ENDIAN__))
61          #define SK_CPU_BENDIAN
62     #else
63         #define SK_CPU_LENDIAN
64     #endif
65 #endif
66 
67 #if defined(__i386) || defined(_M_IX86) ||  defined(__x86_64__) || defined(_M_X64)
68   #define SK_CPU_X86 1
69 #endif
70 
71 /**
72  *  SK_CPU_SSE_LEVEL
73  *
74  *  If defined, SK_CPU_SSE_LEVEL should be set to the highest supported level.
75  *  On non-intel CPU this should be undefined.
76  */
77 #define SK_CPU_SSE_LEVEL_SSE1     10
78 #define SK_CPU_SSE_LEVEL_SSE2     20
79 #define SK_CPU_SSE_LEVEL_SSE3     30
80 #define SK_CPU_SSE_LEVEL_SSSE3    31
81 #define SK_CPU_SSE_LEVEL_SSE41    41
82 #define SK_CPU_SSE_LEVEL_SSE42    42
83 #define SK_CPU_SSE_LEVEL_AVX      51
84 #define SK_CPU_SSE_LEVEL_AVX2     52
85 #define SK_CPU_SSE_LEVEL_SKX      60
86 
87 // TODO(brianosman,kjlubick) clean up these checks
88 
89 // Are we in GCC/Clang?
90 #ifndef SK_CPU_SSE_LEVEL
91     // These checks must be done in descending order to ensure we set the highest
92     // available SSE level.
93     #if defined(__AVX512F__) && defined(__AVX512DQ__) && defined(__AVX512CD__) && \
94         defined(__AVX512BW__) && defined(__AVX512VL__)
95         #define SK_CPU_SSE_LEVEL    SK_CPU_SSE_LEVEL_SKX
96     #elif defined(__AVX2__)
97         #define SK_CPU_SSE_LEVEL    SK_CPU_SSE_LEVEL_AVX2
98     #elif defined(__AVX__)
99         #define SK_CPU_SSE_LEVEL    SK_CPU_SSE_LEVEL_AVX
100     #elif defined(__SSE4_2__)
101         #define SK_CPU_SSE_LEVEL    SK_CPU_SSE_LEVEL_SSE42
102     #elif defined(__SSE4_1__)
103         #define SK_CPU_SSE_LEVEL    SK_CPU_SSE_LEVEL_SSE41
104     #elif defined(__SSSE3__)
105         #define SK_CPU_SSE_LEVEL    SK_CPU_SSE_LEVEL_SSSE3
106     #elif defined(__SSE3__)
107         #define SK_CPU_SSE_LEVEL    SK_CPU_SSE_LEVEL_SSE3
108     #elif defined(__SSE2__)
109         #define SK_CPU_SSE_LEVEL    SK_CPU_SSE_LEVEL_SSE2
110     #endif
111 #endif
112 
113 // Are we in VisualStudio?
114 #ifndef SK_CPU_SSE_LEVEL
115     // These checks must be done in descending order to ensure we set the highest
116     // available SSE level. 64-bit intel guarantees at least SSE2 support.
117     #if defined(__AVX512F__) && defined(__AVX512DQ__) && defined(__AVX512CD__) && \
118         defined(__AVX512BW__) && defined(__AVX512VL__)
119         #define SK_CPU_SSE_LEVEL        SK_CPU_SSE_LEVEL_SKX
120     #elif defined(__AVX2__)
121         #define SK_CPU_SSE_LEVEL        SK_CPU_SSE_LEVEL_AVX2
122     #elif defined(__AVX__)
123         #define SK_CPU_SSE_LEVEL        SK_CPU_SSE_LEVEL_AVX
124     #elif defined(_M_X64) || defined(_M_AMD64)
125         #define SK_CPU_SSE_LEVEL        SK_CPU_SSE_LEVEL_SSE2
126     #elif defined(_M_IX86_FP)
127         #if _M_IX86_FP >= 2
128             #define SK_CPU_SSE_LEVEL    SK_CPU_SSE_LEVEL_SSE2
129         #elif _M_IX86_FP == 1
130             #define SK_CPU_SSE_LEVEL    SK_CPU_SSE_LEVEL_SSE1
131         #endif
132     #endif
133 #endif
134 
135 // ARM defines
136 #if defined(__arm__) && (!defined(__APPLE__) || !TARGET_IPHONE_SIMULATOR)
137     #define SK_CPU_ARM32
138 #elif defined(__aarch64__)
139     #define SK_CPU_ARM64
140 #endif
141 
142 // All 64-bit ARM chips have NEON.  Many 32-bit ARM chips do too.
143 #if !defined(SK_ARM_HAS_NEON) && defined(__ARM_NEON)
144     #define SK_ARM_HAS_NEON
145 #endif
146 
147 #if defined(__ARM_FEATURE_CRC32)
148     #define SK_ARM_HAS_CRC32
149 #endif
150 
151 #endif // SkFeatures_DEFINED
152