1 /*
2 * Copyright (C) 2015 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #ifndef ART_COMPILER_OPTIMIZING_INSTRUCTION_SIMPLIFIER_SHARED_H_
18 #define ART_COMPILER_OPTIMIZING_INSTRUCTION_SIMPLIFIER_SHARED_H_
19
20 #include "base/macros.h"
21 #include "nodes.h"
22
23 namespace art HIDDEN {
24
25 namespace helpers {
26
CanFitInShifterOperand(HInstruction * instruction)27 inline bool CanFitInShifterOperand(HInstruction* instruction) {
28 if (instruction->IsTypeConversion()) {
29 HTypeConversion* conversion = instruction->AsTypeConversion();
30 DataType::Type result_type = conversion->GetResultType();
31 DataType::Type input_type = conversion->GetInputType();
32 // We don't expect to see the same type as input and result.
33 return DataType::IsIntegralType(result_type) && DataType::IsIntegralType(input_type) &&
34 (result_type != input_type);
35 } else {
36 return (instruction->IsShl() && instruction->AsShl()->InputAt(1)->IsIntConstant()) ||
37 (instruction->IsShr() && instruction->AsShr()->InputAt(1)->IsIntConstant()) ||
38 (instruction->IsUShr() && instruction->AsUShr()->InputAt(1)->IsIntConstant());
39 }
40 }
41
HasShifterOperand(HInstruction * instr,InstructionSet isa)42 inline bool HasShifterOperand(HInstruction* instr, InstructionSet isa) {
43 // On ARM64 `neg` instructions are an alias of `sub` using the zero register
44 // as the first register input.
45 bool res = instr->IsAdd() || instr->IsAnd() ||
46 (isa == InstructionSet::kArm64 && instr->IsNeg()) ||
47 instr->IsOr() || instr->IsSub() || instr->IsXor();
48 return res;
49 }
50
51 // Check the specified sub is the last operation of the sequence:
52 // t1 = Shl
53 // t2 = Sub(t1, *)
54 // t3 = Sub(*, t2)
IsSubRightSubLeftShl(HSub * sub)55 inline bool IsSubRightSubLeftShl(HSub *sub) {
56 HInstruction* right = sub->GetRight();
57 return right->IsSub() && right->AsSub()->GetLeft()->IsShl();;
58 }
59
60 } // namespace helpers
61
62 bool TryCombineMultiplyAccumulate(HMul* mul, InstructionSet isa);
63 // For bitwise operations (And/Or/Xor) with a negated input, try to use
64 // a negated bitwise instruction.
65 bool TryMergeNegatedInput(HBinaryOperation* op);
66
67 bool TryExtractArrayAccessAddress(HInstruction* access,
68 HInstruction* array,
69 HInstruction* index,
70 size_t data_offset);
71
72 bool TryExtractVecArrayAccessAddress(HVecMemoryOperation* access, HInstruction* index);
73
74 // Try to replace
75 // Sub(c, Sub(a, b))
76 // with
77 // Add(c, Sub(b, a))
78 bool TryReplaceSubSubWithSubAdd(HSub* last_sub);
79
80 } // namespace art
81
82 #endif // ART_COMPILER_OPTIMIZING_INSTRUCTION_SIMPLIFIER_SHARED_H_
83