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1 /* Copyright 2020 The TensorFlow Authors. All Rights Reserved.
2 
3 Licensed under the Apache License, Version 2.0 (the "License");
4 you may not use this file except in compliance with the License.
5 You may obtain a copy of the License at
6 
7     http://www.apache.org/licenses/LICENSE-2.0
8 
9 Unless required by applicable law or agreed to in writing, software
10 distributed under the License is distributed on an "AS IS" BASIS,
11 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 See the License for the specific language governing permissions and
13 limitations under the License.
14 ==============================================================================*/
15 
16 #include <string>
17 
18 #include "tensorflow/compiler/xla/service/gpu/tests/mlir_gpu_test_base.h"
19 #include "tensorflow/core/lib/core/status_test_util.h"
20 
21 namespace xla {
22 namespace gpu {
23 
24 using ::testing::ElementsAreArray;
25 
26 class GemmTest : public MlirGpuTestBase {
27  public:
Run2x2Gemm(std::vector<float> arg0,std::vector<float> arg1,std::string matmul_options="")28   std::vector<std::vector<uint8_t>> Run2x2Gemm(
29       std::vector<float> arg0, std::vector<float> arg1,
30       std::string matmul_options = "") {
31     std::string mlir_text = absl::StrCat(
32         R"(
33       module attributes {hlo.unique_id = 0 : i32} {
34         func.func @main(%arg0: memref<2x2xf32> {lmhlo.params = 0 : index},
35                    %arg1: memref<2x2xf32> {lmhlo.params = 1 : index},
36                    %arg2: memref<2x2xf32> {lmhlo.output_index = dense<[0]> : tensor<1xindex>}) attributes {
37                        result_xla_shape = "(f32[4]) "
38                    } {
39           "lmhlo_gpu.gemm"(%arg0, %arg1, %arg2) {alpha_imag = 0.000000e+00 : f64, alpha_real = 1.000000e+00 : f64, beta = 0.000000e+00 : f64, batch_size = 1 : i64, lhs_stride = 4 : i64, rhs_stride = 4 : i64, dot_dimension_numbers = #mhlo.dot<lhs_contracting_dimensions = [1], rhs_contracting_dimensions = [0]>)",
40         matmul_options,
41         R"(} : (memref<2x2xf32>, memref<2x2xf32>, memref<2x2xf32>) -> ()
42           "lmhlo.terminator"() : () -> ()
43         }
44       })");
45 
46     return RunMlirTextWithHostBuffers(mlir_text,
47                                       {ToUint8Span(&arg0), ToUint8Span(&arg1)})
48         .value();
49   }
50 };
51 
TEST_F(GemmTest,SimpleCase1)52 TEST_F(GemmTest, SimpleCase1) {
53   std::vector<float> arg0 = {2, 3, 4, 5};
54   std::vector<float> arg1 = {1, 2, 3, 4};
55   auto outputs = Run2x2Gemm(arg0, arg1);
56   ASSERT_EQ(1, outputs.size());
57   EXPECT_THAT(FromUint8Span<float>(outputs[0]),
58               ElementsAreArray<float>({11, 16, 19, 28}));
59 }
60 
TEST_F(GemmTest,GemmPrecisionDefault)61 TEST_F(GemmTest, GemmPrecisionDefault) {
62   std::vector<float> arg0 = {0x1.fffffep+0, 0, 0, 0x1.fffffep+0};
63   std::vector<float> arg1 = {0x1.fffffep+0, 0, 0, 0x1.fffffep+0};
64   auto outputs = Run2x2Gemm(
65       arg0, arg1,
66       R"(, precision_config = [#mhlo<precision DEFAULT>, #mhlo<precision DEFAULT>])");
67   ASSERT_EQ(1, outputs.size());
68   auto stream = BorrowStream();
69   if (stream->GetCudaComputeCapability().IsAtLeast(
70           stream_executor::CudaComputeCapability::AMPERE)) {
71     EXPECT_THAT(FromUint8Span<float>(outputs[0]),
72                 ElementsAreArray<float>({4, 0, 0, 4}));
73   } else {
74     EXPECT_THAT(FromUint8Span<float>(outputs[0]),
75                 ElementsAreArray<float>({0x1.fffffcp+1, 0, 0, 0x1.fffffcp+1}));
76   }
77 }
78 
TEST_F(GemmTest,GemmPrecisionHighest)79 TEST_F(GemmTest, GemmPrecisionHighest) {
80   std::vector<float> arg0 = {0x1.fffffep+0, 0, 0, 0x1.fffffep+0};
81   std::vector<float> arg1 = {0x1.fffffep+0, 0, 0, 0x1.fffffep+0};
82   auto outputs = Run2x2Gemm(
83       arg0, arg1,
84       R"(, precision_config = [#mhlo<precision HIGH>, #mhlo<precision HIGHEST>])");
85   ASSERT_EQ(1, outputs.size());
86   EXPECT_THAT(FromUint8Span<float>(outputs[0]),
87               ElementsAreArray<float>({0x1.fffffcp+1, 0, 0, 0x1.fffffcp+1}));
88 }
89 
90 }  // namespace gpu
91 }  // namespace xla
92