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1 /****************************************************************************
2  ****************************************************************************
3  ***
4  ***   This header was automatically generated from a Linux kernel header
5  ***   of the same name, to make information necessary for userspace to
6  ***   call into the kernel available to libc.  It contains only constants,
7  ***   structures, and macros generated from the original header, and thus,
8  ***   contains no copyrightable information.
9  ***
10  ***   To edit the content of this header, modify the corresponding
11  ***   source file (e.g. under external/kernel-headers/original/) then
12  ***   run bionic/libc/kernel/tools/update_all.py
13  ***
14  ***   Any manual change here will be lost the next time this script will
15  ***   be run. You've been warned!
16  ***
17  ****************************************************************************
18  ****************************************************************************/
19 #ifndef IB_USER_VERBS_H
20 #define IB_USER_VERBS_H
21 #include <linux/types.h>
22 #define IB_USER_VERBS_ABI_VERSION 6
23 #define IB_USER_VERBS_CMD_THRESHOLD 50
24 enum ib_uverbs_write_cmds {
25   IB_USER_VERBS_CMD_GET_CONTEXT,
26   IB_USER_VERBS_CMD_QUERY_DEVICE,
27   IB_USER_VERBS_CMD_QUERY_PORT,
28   IB_USER_VERBS_CMD_ALLOC_PD,
29   IB_USER_VERBS_CMD_DEALLOC_PD,
30   IB_USER_VERBS_CMD_CREATE_AH,
31   IB_USER_VERBS_CMD_MODIFY_AH,
32   IB_USER_VERBS_CMD_QUERY_AH,
33   IB_USER_VERBS_CMD_DESTROY_AH,
34   IB_USER_VERBS_CMD_REG_MR,
35   IB_USER_VERBS_CMD_REG_SMR,
36   IB_USER_VERBS_CMD_REREG_MR,
37   IB_USER_VERBS_CMD_QUERY_MR,
38   IB_USER_VERBS_CMD_DEREG_MR,
39   IB_USER_VERBS_CMD_ALLOC_MW,
40   IB_USER_VERBS_CMD_BIND_MW,
41   IB_USER_VERBS_CMD_DEALLOC_MW,
42   IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL,
43   IB_USER_VERBS_CMD_CREATE_CQ,
44   IB_USER_VERBS_CMD_RESIZE_CQ,
45   IB_USER_VERBS_CMD_DESTROY_CQ,
46   IB_USER_VERBS_CMD_POLL_CQ,
47   IB_USER_VERBS_CMD_PEEK_CQ,
48   IB_USER_VERBS_CMD_REQ_NOTIFY_CQ,
49   IB_USER_VERBS_CMD_CREATE_QP,
50   IB_USER_VERBS_CMD_QUERY_QP,
51   IB_USER_VERBS_CMD_MODIFY_QP,
52   IB_USER_VERBS_CMD_DESTROY_QP,
53   IB_USER_VERBS_CMD_POST_SEND,
54   IB_USER_VERBS_CMD_POST_RECV,
55   IB_USER_VERBS_CMD_ATTACH_MCAST,
56   IB_USER_VERBS_CMD_DETACH_MCAST,
57   IB_USER_VERBS_CMD_CREATE_SRQ,
58   IB_USER_VERBS_CMD_MODIFY_SRQ,
59   IB_USER_VERBS_CMD_QUERY_SRQ,
60   IB_USER_VERBS_CMD_DESTROY_SRQ,
61   IB_USER_VERBS_CMD_POST_SRQ_RECV,
62   IB_USER_VERBS_CMD_OPEN_XRCD,
63   IB_USER_VERBS_CMD_CLOSE_XRCD,
64   IB_USER_VERBS_CMD_CREATE_XSRQ,
65   IB_USER_VERBS_CMD_OPEN_QP,
66 };
67 enum {
68   IB_USER_VERBS_EX_CMD_QUERY_DEVICE = IB_USER_VERBS_CMD_QUERY_DEVICE,
69   IB_USER_VERBS_EX_CMD_CREATE_CQ = IB_USER_VERBS_CMD_CREATE_CQ,
70   IB_USER_VERBS_EX_CMD_CREATE_QP = IB_USER_VERBS_CMD_CREATE_QP,
71   IB_USER_VERBS_EX_CMD_MODIFY_QP = IB_USER_VERBS_CMD_MODIFY_QP,
72   IB_USER_VERBS_EX_CMD_CREATE_FLOW = IB_USER_VERBS_CMD_THRESHOLD,
73   IB_USER_VERBS_EX_CMD_DESTROY_FLOW,
74   IB_USER_VERBS_EX_CMD_CREATE_WQ,
75   IB_USER_VERBS_EX_CMD_MODIFY_WQ,
76   IB_USER_VERBS_EX_CMD_DESTROY_WQ,
77   IB_USER_VERBS_EX_CMD_CREATE_RWQ_IND_TBL,
78   IB_USER_VERBS_EX_CMD_DESTROY_RWQ_IND_TBL,
79   IB_USER_VERBS_EX_CMD_MODIFY_CQ
80 };
81 enum ib_placement_type {
82   IB_FLUSH_GLOBAL = 1U << 0,
83   IB_FLUSH_PERSISTENT = 1U << 1,
84 };
85 enum ib_selectivity_level {
86   IB_FLUSH_RANGE = 0,
87   IB_FLUSH_MR,
88 };
89 struct ib_uverbs_async_event_desc {
90   __aligned_u64 element;
91   __u32 event_type;
92   __u32 reserved;
93 };
94 struct ib_uverbs_comp_event_desc {
95   __aligned_u64 cq_handle;
96 };
97 struct ib_uverbs_cq_moderation_caps {
98   __u16 max_cq_moderation_count;
99   __u16 max_cq_moderation_period;
100   __u32 reserved;
101 };
102 #define IB_USER_VERBS_CMD_COMMAND_MASK 0xff
103 #define IB_USER_VERBS_CMD_FLAG_EXTENDED 0x80000000u
104 struct ib_uverbs_cmd_hdr {
105   __u32 command;
106   __u16 in_words;
107   __u16 out_words;
108 };
109 struct ib_uverbs_ex_cmd_hdr {
110   __aligned_u64 response;
111   __u16 provider_in_words;
112   __u16 provider_out_words;
113   __u32 cmd_hdr_reserved;
114 };
115 struct ib_uverbs_get_context {
116   __aligned_u64 response;
117   __aligned_u64 driver_data[];
118 };
119 struct ib_uverbs_get_context_resp {
120   __u32 async_fd;
121   __u32 num_comp_vectors;
122   __aligned_u64 driver_data[];
123 };
124 struct ib_uverbs_query_device {
125   __aligned_u64 response;
126   __aligned_u64 driver_data[];
127 };
128 struct ib_uverbs_query_device_resp {
129   __aligned_u64 fw_ver;
130   __be64 node_guid;
131   __be64 sys_image_guid;
132   __aligned_u64 max_mr_size;
133   __aligned_u64 page_size_cap;
134   __u32 vendor_id;
135   __u32 vendor_part_id;
136   __u32 hw_ver;
137   __u32 max_qp;
138   __u32 max_qp_wr;
139   __u32 device_cap_flags;
140   __u32 max_sge;
141   __u32 max_sge_rd;
142   __u32 max_cq;
143   __u32 max_cqe;
144   __u32 max_mr;
145   __u32 max_pd;
146   __u32 max_qp_rd_atom;
147   __u32 max_ee_rd_atom;
148   __u32 max_res_rd_atom;
149   __u32 max_qp_init_rd_atom;
150   __u32 max_ee_init_rd_atom;
151   __u32 atomic_cap;
152   __u32 max_ee;
153   __u32 max_rdd;
154   __u32 max_mw;
155   __u32 max_raw_ipv6_qp;
156   __u32 max_raw_ethy_qp;
157   __u32 max_mcast_grp;
158   __u32 max_mcast_qp_attach;
159   __u32 max_total_mcast_qp_attach;
160   __u32 max_ah;
161   __u32 max_fmr;
162   __u32 max_map_per_fmr;
163   __u32 max_srq;
164   __u32 max_srq_wr;
165   __u32 max_srq_sge;
166   __u16 max_pkeys;
167   __u8 local_ca_ack_delay;
168   __u8 phys_port_cnt;
169   __u8 reserved[4];
170 };
171 struct ib_uverbs_ex_query_device {
172   __u32 comp_mask;
173   __u32 reserved;
174 };
175 struct ib_uverbs_odp_caps {
176   __aligned_u64 general_caps;
177   struct {
178     __u32 rc_odp_caps;
179     __u32 uc_odp_caps;
180     __u32 ud_odp_caps;
181   } per_transport_caps;
182   __u32 reserved;
183 };
184 struct ib_uverbs_rss_caps {
185   __u32 supported_qpts;
186   __u32 max_rwq_indirection_tables;
187   __u32 max_rwq_indirection_table_size;
188   __u32 reserved;
189 };
190 struct ib_uverbs_tm_caps {
191   __u32 max_rndv_hdr_size;
192   __u32 max_num_tags;
193   __u32 flags;
194   __u32 max_ops;
195   __u32 max_sge;
196   __u32 reserved;
197 };
198 struct ib_uverbs_ex_query_device_resp {
199   struct ib_uverbs_query_device_resp base;
200   __u32 comp_mask;
201   __u32 response_length;
202   struct ib_uverbs_odp_caps odp_caps;
203   __aligned_u64 timestamp_mask;
204   __aligned_u64 hca_core_clock;
205   __aligned_u64 device_cap_flags_ex;
206   struct ib_uverbs_rss_caps rss_caps;
207   __u32 max_wq_type_rq;
208   __u32 raw_packet_caps;
209   struct ib_uverbs_tm_caps tm_caps;
210   struct ib_uverbs_cq_moderation_caps cq_moderation_caps;
211   __aligned_u64 max_dm_size;
212   __u32 xrc_odp_caps;
213   __u32 reserved;
214 };
215 struct ib_uverbs_query_port {
216   __aligned_u64 response;
217   __u8 port_num;
218   __u8 reserved[7];
219   __aligned_u64 driver_data[];
220 };
221 struct ib_uverbs_query_port_resp {
222   __u32 port_cap_flags;
223   __u32 max_msg_sz;
224   __u32 bad_pkey_cntr;
225   __u32 qkey_viol_cntr;
226   __u32 gid_tbl_len;
227   __u16 pkey_tbl_len;
228   __u16 lid;
229   __u16 sm_lid;
230   __u8 state;
231   __u8 max_mtu;
232   __u8 active_mtu;
233   __u8 lmc;
234   __u8 max_vl_num;
235   __u8 sm_sl;
236   __u8 subnet_timeout;
237   __u8 init_type_reply;
238   __u8 active_width;
239   __u8 active_speed;
240   __u8 phys_state;
241   __u8 link_layer;
242   __u8 flags;
243   __u8 reserved;
244 };
245 struct ib_uverbs_alloc_pd {
246   __aligned_u64 response;
247   __aligned_u64 driver_data[];
248 };
249 struct ib_uverbs_alloc_pd_resp {
250   __u32 pd_handle;
251   __u32 driver_data[];
252 };
253 struct ib_uverbs_dealloc_pd {
254   __u32 pd_handle;
255 };
256 struct ib_uverbs_open_xrcd {
257   __aligned_u64 response;
258   __u32 fd;
259   __u32 oflags;
260   __aligned_u64 driver_data[];
261 };
262 struct ib_uverbs_open_xrcd_resp {
263   __u32 xrcd_handle;
264   __u32 driver_data[];
265 };
266 struct ib_uverbs_close_xrcd {
267   __u32 xrcd_handle;
268 };
269 struct ib_uverbs_reg_mr {
270   __aligned_u64 response;
271   __aligned_u64 start;
272   __aligned_u64 length;
273   __aligned_u64 hca_va;
274   __u32 pd_handle;
275   __u32 access_flags;
276   __aligned_u64 driver_data[];
277 };
278 struct ib_uverbs_reg_mr_resp {
279   __u32 mr_handle;
280   __u32 lkey;
281   __u32 rkey;
282   __u32 driver_data[];
283 };
284 struct ib_uverbs_rereg_mr {
285   __aligned_u64 response;
286   __u32 mr_handle;
287   __u32 flags;
288   __aligned_u64 start;
289   __aligned_u64 length;
290   __aligned_u64 hca_va;
291   __u32 pd_handle;
292   __u32 access_flags;
293   __aligned_u64 driver_data[];
294 };
295 struct ib_uverbs_rereg_mr_resp {
296   __u32 lkey;
297   __u32 rkey;
298   __aligned_u64 driver_data[];
299 };
300 struct ib_uverbs_dereg_mr {
301   __u32 mr_handle;
302 };
303 struct ib_uverbs_alloc_mw {
304   __aligned_u64 response;
305   __u32 pd_handle;
306   __u8 mw_type;
307   __u8 reserved[3];
308   __aligned_u64 driver_data[];
309 };
310 struct ib_uverbs_alloc_mw_resp {
311   __u32 mw_handle;
312   __u32 rkey;
313   __aligned_u64 driver_data[];
314 };
315 struct ib_uverbs_dealloc_mw {
316   __u32 mw_handle;
317 };
318 struct ib_uverbs_create_comp_channel {
319   __aligned_u64 response;
320 };
321 struct ib_uverbs_create_comp_channel_resp {
322   __u32 fd;
323 };
324 struct ib_uverbs_create_cq {
325   __aligned_u64 response;
326   __aligned_u64 user_handle;
327   __u32 cqe;
328   __u32 comp_vector;
329   __s32 comp_channel;
330   __u32 reserved;
331   __aligned_u64 driver_data[];
332 };
333 enum ib_uverbs_ex_create_cq_flags {
334   IB_UVERBS_CQ_FLAGS_TIMESTAMP_COMPLETION = 1 << 0,
335   IB_UVERBS_CQ_FLAGS_IGNORE_OVERRUN = 1 << 1,
336 };
337 struct ib_uverbs_ex_create_cq {
338   __aligned_u64 user_handle;
339   __u32 cqe;
340   __u32 comp_vector;
341   __s32 comp_channel;
342   __u32 comp_mask;
343   __u32 flags;
344   __u32 reserved;
345 };
346 struct ib_uverbs_create_cq_resp {
347   __u32 cq_handle;
348   __u32 cqe;
349   __aligned_u64 driver_data[0];
350 };
351 struct ib_uverbs_ex_create_cq_resp {
352   struct ib_uverbs_create_cq_resp base;
353   __u32 comp_mask;
354   __u32 response_length;
355 };
356 struct ib_uverbs_resize_cq {
357   __aligned_u64 response;
358   __u32 cq_handle;
359   __u32 cqe;
360   __aligned_u64 driver_data[];
361 };
362 struct ib_uverbs_resize_cq_resp {
363   __u32 cqe;
364   __u32 reserved;
365   __aligned_u64 driver_data[];
366 };
367 struct ib_uverbs_poll_cq {
368   __aligned_u64 response;
369   __u32 cq_handle;
370   __u32 ne;
371 };
372 enum ib_uverbs_wc_opcode {
373   IB_UVERBS_WC_SEND = 0,
374   IB_UVERBS_WC_RDMA_WRITE = 1,
375   IB_UVERBS_WC_RDMA_READ = 2,
376   IB_UVERBS_WC_COMP_SWAP = 3,
377   IB_UVERBS_WC_FETCH_ADD = 4,
378   IB_UVERBS_WC_BIND_MW = 5,
379   IB_UVERBS_WC_LOCAL_INV = 6,
380   IB_UVERBS_WC_TSO = 7,
381   IB_UVERBS_WC_FLUSH = 8,
382   IB_UVERBS_WC_ATOMIC_WRITE = 9,
383 };
384 struct ib_uverbs_wc {
385   __aligned_u64 wr_id;
386   __u32 status;
387   __u32 opcode;
388   __u32 vendor_err;
389   __u32 byte_len;
390   union {
391     __be32 imm_data;
392     __u32 invalidate_rkey;
393   } ex;
394   __u32 qp_num;
395   __u32 src_qp;
396   __u32 wc_flags;
397   __u16 pkey_index;
398   __u16 slid;
399   __u8 sl;
400   __u8 dlid_path_bits;
401   __u8 port_num;
402   __u8 reserved;
403 };
404 struct ib_uverbs_poll_cq_resp {
405   __u32 count;
406   __u32 reserved;
407   struct ib_uverbs_wc wc[];
408 };
409 struct ib_uverbs_req_notify_cq {
410   __u32 cq_handle;
411   __u32 solicited_only;
412 };
413 struct ib_uverbs_destroy_cq {
414   __aligned_u64 response;
415   __u32 cq_handle;
416   __u32 reserved;
417 };
418 struct ib_uverbs_destroy_cq_resp {
419   __u32 comp_events_reported;
420   __u32 async_events_reported;
421 };
422 struct ib_uverbs_global_route {
423   __u8 dgid[16];
424   __u32 flow_label;
425   __u8 sgid_index;
426   __u8 hop_limit;
427   __u8 traffic_class;
428   __u8 reserved;
429 };
430 struct ib_uverbs_ah_attr {
431   struct ib_uverbs_global_route grh;
432   __u16 dlid;
433   __u8 sl;
434   __u8 src_path_bits;
435   __u8 static_rate;
436   __u8 is_global;
437   __u8 port_num;
438   __u8 reserved;
439 };
440 struct ib_uverbs_qp_attr {
441   __u32 qp_attr_mask;
442   __u32 qp_state;
443   __u32 cur_qp_state;
444   __u32 path_mtu;
445   __u32 path_mig_state;
446   __u32 qkey;
447   __u32 rq_psn;
448   __u32 sq_psn;
449   __u32 dest_qp_num;
450   __u32 qp_access_flags;
451   struct ib_uverbs_ah_attr ah_attr;
452   struct ib_uverbs_ah_attr alt_ah_attr;
453   __u32 max_send_wr;
454   __u32 max_recv_wr;
455   __u32 max_send_sge;
456   __u32 max_recv_sge;
457   __u32 max_inline_data;
458   __u16 pkey_index;
459   __u16 alt_pkey_index;
460   __u8 en_sqd_async_notify;
461   __u8 sq_draining;
462   __u8 max_rd_atomic;
463   __u8 max_dest_rd_atomic;
464   __u8 min_rnr_timer;
465   __u8 port_num;
466   __u8 timeout;
467   __u8 retry_cnt;
468   __u8 rnr_retry;
469   __u8 alt_port_num;
470   __u8 alt_timeout;
471   __u8 reserved[5];
472 };
473 struct ib_uverbs_create_qp {
474   __aligned_u64 response;
475   __aligned_u64 user_handle;
476   __u32 pd_handle;
477   __u32 send_cq_handle;
478   __u32 recv_cq_handle;
479   __u32 srq_handle;
480   __u32 max_send_wr;
481   __u32 max_recv_wr;
482   __u32 max_send_sge;
483   __u32 max_recv_sge;
484   __u32 max_inline_data;
485   __u8 sq_sig_all;
486   __u8 qp_type;
487   __u8 is_srq;
488   __u8 reserved;
489   __aligned_u64 driver_data[];
490 };
491 enum ib_uverbs_create_qp_mask {
492   IB_UVERBS_CREATE_QP_MASK_IND_TABLE = 1UL << 0,
493 };
494 enum {
495   IB_UVERBS_CREATE_QP_SUP_COMP_MASK = IB_UVERBS_CREATE_QP_MASK_IND_TABLE,
496 };
497 struct ib_uverbs_ex_create_qp {
498   __aligned_u64 user_handle;
499   __u32 pd_handle;
500   __u32 send_cq_handle;
501   __u32 recv_cq_handle;
502   __u32 srq_handle;
503   __u32 max_send_wr;
504   __u32 max_recv_wr;
505   __u32 max_send_sge;
506   __u32 max_recv_sge;
507   __u32 max_inline_data;
508   __u8 sq_sig_all;
509   __u8 qp_type;
510   __u8 is_srq;
511   __u8 reserved;
512   __u32 comp_mask;
513   __u32 create_flags;
514   __u32 rwq_ind_tbl_handle;
515   __u32 source_qpn;
516 };
517 struct ib_uverbs_open_qp {
518   __aligned_u64 response;
519   __aligned_u64 user_handle;
520   __u32 pd_handle;
521   __u32 qpn;
522   __u8 qp_type;
523   __u8 reserved[7];
524   __aligned_u64 driver_data[];
525 };
526 struct ib_uverbs_create_qp_resp {
527   __u32 qp_handle;
528   __u32 qpn;
529   __u32 max_send_wr;
530   __u32 max_recv_wr;
531   __u32 max_send_sge;
532   __u32 max_recv_sge;
533   __u32 max_inline_data;
534   __u32 reserved;
535   __u32 driver_data[0];
536 };
537 struct ib_uverbs_ex_create_qp_resp {
538   struct ib_uverbs_create_qp_resp base;
539   __u32 comp_mask;
540   __u32 response_length;
541 };
542 struct ib_uverbs_qp_dest {
543   __u8 dgid[16];
544   __u32 flow_label;
545   __u16 dlid;
546   __u16 reserved;
547   __u8 sgid_index;
548   __u8 hop_limit;
549   __u8 traffic_class;
550   __u8 sl;
551   __u8 src_path_bits;
552   __u8 static_rate;
553   __u8 is_global;
554   __u8 port_num;
555 };
556 struct ib_uverbs_query_qp {
557   __aligned_u64 response;
558   __u32 qp_handle;
559   __u32 attr_mask;
560   __aligned_u64 driver_data[];
561 };
562 struct ib_uverbs_query_qp_resp {
563   struct ib_uverbs_qp_dest dest;
564   struct ib_uverbs_qp_dest alt_dest;
565   __u32 max_send_wr;
566   __u32 max_recv_wr;
567   __u32 max_send_sge;
568   __u32 max_recv_sge;
569   __u32 max_inline_data;
570   __u32 qkey;
571   __u32 rq_psn;
572   __u32 sq_psn;
573   __u32 dest_qp_num;
574   __u32 qp_access_flags;
575   __u16 pkey_index;
576   __u16 alt_pkey_index;
577   __u8 qp_state;
578   __u8 cur_qp_state;
579   __u8 path_mtu;
580   __u8 path_mig_state;
581   __u8 sq_draining;
582   __u8 max_rd_atomic;
583   __u8 max_dest_rd_atomic;
584   __u8 min_rnr_timer;
585   __u8 port_num;
586   __u8 timeout;
587   __u8 retry_cnt;
588   __u8 rnr_retry;
589   __u8 alt_port_num;
590   __u8 alt_timeout;
591   __u8 sq_sig_all;
592   __u8 reserved[5];
593   __aligned_u64 driver_data[];
594 };
595 struct ib_uverbs_modify_qp {
596   struct ib_uverbs_qp_dest dest;
597   struct ib_uverbs_qp_dest alt_dest;
598   __u32 qp_handle;
599   __u32 attr_mask;
600   __u32 qkey;
601   __u32 rq_psn;
602   __u32 sq_psn;
603   __u32 dest_qp_num;
604   __u32 qp_access_flags;
605   __u16 pkey_index;
606   __u16 alt_pkey_index;
607   __u8 qp_state;
608   __u8 cur_qp_state;
609   __u8 path_mtu;
610   __u8 path_mig_state;
611   __u8 en_sqd_async_notify;
612   __u8 max_rd_atomic;
613   __u8 max_dest_rd_atomic;
614   __u8 min_rnr_timer;
615   __u8 port_num;
616   __u8 timeout;
617   __u8 retry_cnt;
618   __u8 rnr_retry;
619   __u8 alt_port_num;
620   __u8 alt_timeout;
621   __u8 reserved[2];
622   __aligned_u64 driver_data[0];
623 };
624 struct ib_uverbs_ex_modify_qp {
625   struct ib_uverbs_modify_qp base;
626   __u32 rate_limit;
627   __u32 reserved;
628 };
629 struct ib_uverbs_ex_modify_qp_resp {
630   __u32 comp_mask;
631   __u32 response_length;
632 };
633 struct ib_uverbs_destroy_qp {
634   __aligned_u64 response;
635   __u32 qp_handle;
636   __u32 reserved;
637 };
638 struct ib_uverbs_destroy_qp_resp {
639   __u32 events_reported;
640 };
641 struct ib_uverbs_sge {
642   __aligned_u64 addr;
643   __u32 length;
644   __u32 lkey;
645 };
646 enum ib_uverbs_wr_opcode {
647   IB_UVERBS_WR_RDMA_WRITE = 0,
648   IB_UVERBS_WR_RDMA_WRITE_WITH_IMM = 1,
649   IB_UVERBS_WR_SEND = 2,
650   IB_UVERBS_WR_SEND_WITH_IMM = 3,
651   IB_UVERBS_WR_RDMA_READ = 4,
652   IB_UVERBS_WR_ATOMIC_CMP_AND_SWP = 5,
653   IB_UVERBS_WR_ATOMIC_FETCH_AND_ADD = 6,
654   IB_UVERBS_WR_LOCAL_INV = 7,
655   IB_UVERBS_WR_BIND_MW = 8,
656   IB_UVERBS_WR_SEND_WITH_INV = 9,
657   IB_UVERBS_WR_TSO = 10,
658   IB_UVERBS_WR_RDMA_READ_WITH_INV = 11,
659   IB_UVERBS_WR_MASKED_ATOMIC_CMP_AND_SWP = 12,
660   IB_UVERBS_WR_MASKED_ATOMIC_FETCH_AND_ADD = 13,
661   IB_UVERBS_WR_FLUSH = 14,
662   IB_UVERBS_WR_ATOMIC_WRITE = 15,
663 };
664 struct ib_uverbs_send_wr {
665   __aligned_u64 wr_id;
666   __u32 num_sge;
667   __u32 opcode;
668   __u32 send_flags;
669   union {
670     __be32 imm_data;
671     __u32 invalidate_rkey;
672   } ex;
673   union {
674     struct {
675       __aligned_u64 remote_addr;
676       __u32 rkey;
677       __u32 reserved;
678     } rdma;
679     struct {
680       __aligned_u64 remote_addr;
681       __aligned_u64 compare_add;
682       __aligned_u64 swap;
683       __u32 rkey;
684       __u32 reserved;
685     } atomic;
686     struct {
687       __u32 ah;
688       __u32 remote_qpn;
689       __u32 remote_qkey;
690       __u32 reserved;
691     } ud;
692   } wr;
693 };
694 struct ib_uverbs_post_send {
695   __aligned_u64 response;
696   __u32 qp_handle;
697   __u32 wr_count;
698   __u32 sge_count;
699   __u32 wqe_size;
700   struct ib_uverbs_send_wr send_wr[];
701 };
702 struct ib_uverbs_post_send_resp {
703   __u32 bad_wr;
704 };
705 struct ib_uverbs_recv_wr {
706   __aligned_u64 wr_id;
707   __u32 num_sge;
708   __u32 reserved;
709 };
710 struct ib_uverbs_post_recv {
711   __aligned_u64 response;
712   __u32 qp_handle;
713   __u32 wr_count;
714   __u32 sge_count;
715   __u32 wqe_size;
716   struct ib_uverbs_recv_wr recv_wr[];
717 };
718 struct ib_uverbs_post_recv_resp {
719   __u32 bad_wr;
720 };
721 struct ib_uverbs_post_srq_recv {
722   __aligned_u64 response;
723   __u32 srq_handle;
724   __u32 wr_count;
725   __u32 sge_count;
726   __u32 wqe_size;
727   struct ib_uverbs_recv_wr recv[];
728 };
729 struct ib_uverbs_post_srq_recv_resp {
730   __u32 bad_wr;
731 };
732 struct ib_uverbs_create_ah {
733   __aligned_u64 response;
734   __aligned_u64 user_handle;
735   __u32 pd_handle;
736   __u32 reserved;
737   struct ib_uverbs_ah_attr attr;
738   __aligned_u64 driver_data[];
739 };
740 struct ib_uverbs_create_ah_resp {
741   __u32 ah_handle;
742   __u32 driver_data[];
743 };
744 struct ib_uverbs_destroy_ah {
745   __u32 ah_handle;
746 };
747 struct ib_uverbs_attach_mcast {
748   __u8 gid[16];
749   __u32 qp_handle;
750   __u16 mlid;
751   __u16 reserved;
752   __aligned_u64 driver_data[];
753 };
754 struct ib_uverbs_detach_mcast {
755   __u8 gid[16];
756   __u32 qp_handle;
757   __u16 mlid;
758   __u16 reserved;
759   __aligned_u64 driver_data[];
760 };
761 struct ib_uverbs_flow_spec_hdr {
762   __u32 type;
763   __u16 size;
764   __u16 reserved;
765   __aligned_u64 flow_spec_data[0];
766 };
767 struct ib_uverbs_flow_eth_filter {
768   __u8 dst_mac[6];
769   __u8 src_mac[6];
770   __be16 ether_type;
771   __be16 vlan_tag;
772 };
773 struct ib_uverbs_flow_spec_eth {
774   union {
775     struct ib_uverbs_flow_spec_hdr hdr;
776     struct {
777       __u32 type;
778       __u16 size;
779       __u16 reserved;
780     };
781   };
782   struct ib_uverbs_flow_eth_filter val;
783   struct ib_uverbs_flow_eth_filter mask;
784 };
785 struct ib_uverbs_flow_ipv4_filter {
786   __be32 src_ip;
787   __be32 dst_ip;
788   __u8 proto;
789   __u8 tos;
790   __u8 ttl;
791   __u8 flags;
792 };
793 struct ib_uverbs_flow_spec_ipv4 {
794   union {
795     struct ib_uverbs_flow_spec_hdr hdr;
796     struct {
797       __u32 type;
798       __u16 size;
799       __u16 reserved;
800     };
801   };
802   struct ib_uverbs_flow_ipv4_filter val;
803   struct ib_uverbs_flow_ipv4_filter mask;
804 };
805 struct ib_uverbs_flow_tcp_udp_filter {
806   __be16 dst_port;
807   __be16 src_port;
808 };
809 struct ib_uverbs_flow_spec_tcp_udp {
810   union {
811     struct ib_uverbs_flow_spec_hdr hdr;
812     struct {
813       __u32 type;
814       __u16 size;
815       __u16 reserved;
816     };
817   };
818   struct ib_uverbs_flow_tcp_udp_filter val;
819   struct ib_uverbs_flow_tcp_udp_filter mask;
820 };
821 struct ib_uverbs_flow_ipv6_filter {
822   __u8 src_ip[16];
823   __u8 dst_ip[16];
824   __be32 flow_label;
825   __u8 next_hdr;
826   __u8 traffic_class;
827   __u8 hop_limit;
828   __u8 reserved;
829 };
830 struct ib_uverbs_flow_spec_ipv6 {
831   union {
832     struct ib_uverbs_flow_spec_hdr hdr;
833     struct {
834       __u32 type;
835       __u16 size;
836       __u16 reserved;
837     };
838   };
839   struct ib_uverbs_flow_ipv6_filter val;
840   struct ib_uverbs_flow_ipv6_filter mask;
841 };
842 struct ib_uverbs_flow_spec_action_tag {
843   union {
844     struct ib_uverbs_flow_spec_hdr hdr;
845     struct {
846       __u32 type;
847       __u16 size;
848       __u16 reserved;
849     };
850   };
851   __u32 tag_id;
852   __u32 reserved1;
853 };
854 struct ib_uverbs_flow_spec_action_drop {
855   union {
856     struct ib_uverbs_flow_spec_hdr hdr;
857     struct {
858       __u32 type;
859       __u16 size;
860       __u16 reserved;
861     };
862   };
863 };
864 struct ib_uverbs_flow_spec_action_handle {
865   union {
866     struct ib_uverbs_flow_spec_hdr hdr;
867     struct {
868       __u32 type;
869       __u16 size;
870       __u16 reserved;
871     };
872   };
873   __u32 handle;
874   __u32 reserved1;
875 };
876 struct ib_uverbs_flow_spec_action_count {
877   union {
878     struct ib_uverbs_flow_spec_hdr hdr;
879     struct {
880       __u32 type;
881       __u16 size;
882       __u16 reserved;
883     };
884   };
885   __u32 handle;
886   __u32 reserved1;
887 };
888 struct ib_uverbs_flow_tunnel_filter {
889   __be32 tunnel_id;
890 };
891 struct ib_uverbs_flow_spec_tunnel {
892   union {
893     struct ib_uverbs_flow_spec_hdr hdr;
894     struct {
895       __u32 type;
896       __u16 size;
897       __u16 reserved;
898     };
899   };
900   struct ib_uverbs_flow_tunnel_filter val;
901   struct ib_uverbs_flow_tunnel_filter mask;
902 };
903 struct ib_uverbs_flow_spec_esp_filter {
904   __u32 spi;
905   __u32 seq;
906 };
907 struct ib_uverbs_flow_spec_esp {
908   union {
909     struct ib_uverbs_flow_spec_hdr hdr;
910     struct {
911       __u32 type;
912       __u16 size;
913       __u16 reserved;
914     };
915   };
916   struct ib_uverbs_flow_spec_esp_filter val;
917   struct ib_uverbs_flow_spec_esp_filter mask;
918 };
919 struct ib_uverbs_flow_gre_filter {
920   __be16 c_ks_res0_ver;
921   __be16 protocol;
922   __be32 key;
923 };
924 struct ib_uverbs_flow_spec_gre {
925   union {
926     struct ib_uverbs_flow_spec_hdr hdr;
927     struct {
928       __u32 type;
929       __u16 size;
930       __u16 reserved;
931     };
932   };
933   struct ib_uverbs_flow_gre_filter val;
934   struct ib_uverbs_flow_gre_filter mask;
935 };
936 struct ib_uverbs_flow_mpls_filter {
937   __be32 label;
938 };
939 struct ib_uverbs_flow_spec_mpls {
940   union {
941     struct ib_uverbs_flow_spec_hdr hdr;
942     struct {
943       __u32 type;
944       __u16 size;
945       __u16 reserved;
946     };
947   };
948   struct ib_uverbs_flow_mpls_filter val;
949   struct ib_uverbs_flow_mpls_filter mask;
950 };
951 struct ib_uverbs_flow_attr {
952   __u32 type;
953   __u16 size;
954   __u16 priority;
955   __u8 num_of_specs;
956   __u8 reserved[2];
957   __u8 port;
958   __u32 flags;
959   struct ib_uverbs_flow_spec_hdr flow_specs[];
960 };
961 struct ib_uverbs_create_flow {
962   __u32 comp_mask;
963   __u32 qp_handle;
964   struct ib_uverbs_flow_attr flow_attr;
965 };
966 struct ib_uverbs_create_flow_resp {
967   __u32 comp_mask;
968   __u32 flow_handle;
969 };
970 struct ib_uverbs_destroy_flow {
971   __u32 comp_mask;
972   __u32 flow_handle;
973 };
974 struct ib_uverbs_create_srq {
975   __aligned_u64 response;
976   __aligned_u64 user_handle;
977   __u32 pd_handle;
978   __u32 max_wr;
979   __u32 max_sge;
980   __u32 srq_limit;
981   __aligned_u64 driver_data[];
982 };
983 struct ib_uverbs_create_xsrq {
984   __aligned_u64 response;
985   __aligned_u64 user_handle;
986   __u32 srq_type;
987   __u32 pd_handle;
988   __u32 max_wr;
989   __u32 max_sge;
990   __u32 srq_limit;
991   __u32 max_num_tags;
992   __u32 xrcd_handle;
993   __u32 cq_handle;
994   __aligned_u64 driver_data[];
995 };
996 struct ib_uverbs_create_srq_resp {
997   __u32 srq_handle;
998   __u32 max_wr;
999   __u32 max_sge;
1000   __u32 srqn;
1001   __u32 driver_data[];
1002 };
1003 struct ib_uverbs_modify_srq {
1004   __u32 srq_handle;
1005   __u32 attr_mask;
1006   __u32 max_wr;
1007   __u32 srq_limit;
1008   __aligned_u64 driver_data[];
1009 };
1010 struct ib_uverbs_query_srq {
1011   __aligned_u64 response;
1012   __u32 srq_handle;
1013   __u32 reserved;
1014   __aligned_u64 driver_data[];
1015 };
1016 struct ib_uverbs_query_srq_resp {
1017   __u32 max_wr;
1018   __u32 max_sge;
1019   __u32 srq_limit;
1020   __u32 reserved;
1021 };
1022 struct ib_uverbs_destroy_srq {
1023   __aligned_u64 response;
1024   __u32 srq_handle;
1025   __u32 reserved;
1026 };
1027 struct ib_uverbs_destroy_srq_resp {
1028   __u32 events_reported;
1029 };
1030 struct ib_uverbs_ex_create_wq {
1031   __u32 comp_mask;
1032   __u32 wq_type;
1033   __aligned_u64 user_handle;
1034   __u32 pd_handle;
1035   __u32 cq_handle;
1036   __u32 max_wr;
1037   __u32 max_sge;
1038   __u32 create_flags;
1039   __u32 reserved;
1040 };
1041 struct ib_uverbs_ex_create_wq_resp {
1042   __u32 comp_mask;
1043   __u32 response_length;
1044   __u32 wq_handle;
1045   __u32 max_wr;
1046   __u32 max_sge;
1047   __u32 wqn;
1048 };
1049 struct ib_uverbs_ex_destroy_wq {
1050   __u32 comp_mask;
1051   __u32 wq_handle;
1052 };
1053 struct ib_uverbs_ex_destroy_wq_resp {
1054   __u32 comp_mask;
1055   __u32 response_length;
1056   __u32 events_reported;
1057   __u32 reserved;
1058 };
1059 struct ib_uverbs_ex_modify_wq {
1060   __u32 attr_mask;
1061   __u32 wq_handle;
1062   __u32 wq_state;
1063   __u32 curr_wq_state;
1064   __u32 flags;
1065   __u32 flags_mask;
1066 };
1067 #define IB_USER_VERBS_MAX_LOG_IND_TBL_SIZE 0x0d
1068 struct ib_uverbs_ex_create_rwq_ind_table {
1069   __u32 comp_mask;
1070   __u32 log_ind_tbl_size;
1071   __u32 wq_handles[];
1072 };
1073 struct ib_uverbs_ex_create_rwq_ind_table_resp {
1074   __u32 comp_mask;
1075   __u32 response_length;
1076   __u32 ind_tbl_handle;
1077   __u32 ind_tbl_num;
1078 };
1079 struct ib_uverbs_ex_destroy_rwq_ind_table {
1080   __u32 comp_mask;
1081   __u32 ind_tbl_handle;
1082 };
1083 struct ib_uverbs_cq_moderation {
1084   __u16 cq_count;
1085   __u16 cq_period;
1086 };
1087 struct ib_uverbs_ex_modify_cq {
1088   __u32 cq_handle;
1089   __u32 attr_mask;
1090   struct ib_uverbs_cq_moderation attr;
1091   __u32 reserved;
1092 };
1093 #define IB_DEVICE_NAME_MAX 64
1094 enum ib_uverbs_device_cap_flags {
1095   IB_UVERBS_DEVICE_RESIZE_MAX_WR = 1 << 0,
1096   IB_UVERBS_DEVICE_BAD_PKEY_CNTR = 1 << 1,
1097   IB_UVERBS_DEVICE_BAD_QKEY_CNTR = 1 << 2,
1098   IB_UVERBS_DEVICE_RAW_MULTI = 1 << 3,
1099   IB_UVERBS_DEVICE_AUTO_PATH_MIG = 1 << 4,
1100   IB_UVERBS_DEVICE_CHANGE_PHY_PORT = 1 << 5,
1101   IB_UVERBS_DEVICE_UD_AV_PORT_ENFORCE = 1 << 6,
1102   IB_UVERBS_DEVICE_CURR_QP_STATE_MOD = 1 << 7,
1103   IB_UVERBS_DEVICE_SHUTDOWN_PORT = 1 << 8,
1104   IB_UVERBS_DEVICE_PORT_ACTIVE_EVENT = 1 << 10,
1105   IB_UVERBS_DEVICE_SYS_IMAGE_GUID = 1 << 11,
1106   IB_UVERBS_DEVICE_RC_RNR_NAK_GEN = 1 << 12,
1107   IB_UVERBS_DEVICE_SRQ_RESIZE = 1 << 13,
1108   IB_UVERBS_DEVICE_N_NOTIFY_CQ = 1 << 14,
1109   IB_UVERBS_DEVICE_MEM_WINDOW = 1 << 17,
1110   IB_UVERBS_DEVICE_UD_IP_CSUM = 1 << 18,
1111   IB_UVERBS_DEVICE_XRC = 1 << 20,
1112   IB_UVERBS_DEVICE_MEM_MGT_EXTENSIONS = 1 << 21,
1113   IB_UVERBS_DEVICE_MEM_WINDOW_TYPE_2A = 1 << 23,
1114   IB_UVERBS_DEVICE_MEM_WINDOW_TYPE_2B = 1 << 24,
1115   IB_UVERBS_DEVICE_RC_IP_CSUM = 1 << 25,
1116   IB_UVERBS_DEVICE_RAW_IP_CSUM = 1 << 26,
1117   IB_UVERBS_DEVICE_MANAGED_FLOW_STEERING = 1 << 29,
1118   IB_UVERBS_DEVICE_RAW_SCATTER_FCS = 1ULL << 34,
1119   IB_UVERBS_DEVICE_PCI_WRITE_END_PADDING = 1ULL << 36,
1120   IB_UVERBS_DEVICE_FLUSH_GLOBAL = 1ULL << 38,
1121   IB_UVERBS_DEVICE_FLUSH_PERSISTENT = 1ULL << 39,
1122   IB_UVERBS_DEVICE_ATOMIC_WRITE = 1ULL << 40,
1123 };
1124 enum ib_uverbs_raw_packet_caps {
1125   IB_UVERBS_RAW_PACKET_CAP_CVLAN_STRIPPING = 1 << 0,
1126   IB_UVERBS_RAW_PACKET_CAP_SCATTER_FCS = 1 << 1,
1127   IB_UVERBS_RAW_PACKET_CAP_IP_CSUM = 1 << 2,
1128   IB_UVERBS_RAW_PACKET_CAP_DELAY_DROP = 1 << 3,
1129 };
1130 #endif
1131