1 #include <stdint.h>
2
3 #include <arm/linux/api.h>
4 #include <cpuinfo/log.h>
5
6
cpuinfo_arm64_linux_decode_isa_from_proc_cpuinfo(uint32_t features,uint32_t features2,uint32_t midr,const struct cpuinfo_arm_chipset chipset[restrict static1],struct cpuinfo_arm_isa isa[restrict static1])7 void cpuinfo_arm64_linux_decode_isa_from_proc_cpuinfo(
8 uint32_t features,
9 uint32_t features2,
10 uint32_t midr,
11 const struct cpuinfo_arm_chipset chipset[restrict static 1],
12 struct cpuinfo_arm_isa isa[restrict static 1])
13 {
14 if (features & CPUINFO_ARM_LINUX_FEATURE_AES) {
15 isa->aes = true;
16 }
17 if (features & CPUINFO_ARM_LINUX_FEATURE_PMULL) {
18 isa->pmull = true;
19 }
20 if (features & CPUINFO_ARM_LINUX_FEATURE_SHA1) {
21 isa->sha1 = true;
22 }
23 if (features & CPUINFO_ARM_LINUX_FEATURE_SHA2) {
24 isa->sha2 = true;
25 }
26 if (features & CPUINFO_ARM_LINUX_FEATURE_CRC32) {
27 isa->crc32 = true;
28 }
29 if (features & CPUINFO_ARM_LINUX_FEATURE_ATOMICS) {
30 isa->atomics = true;
31 }
32
33 /*
34 * Some phones ship with an old kernel configuration that doesn't report NEON FP16 compute extension and SQRDMLAH/SQRDMLSH/UQRDMLAH/UQRDMLSH instructions.
35 * Use a MIDR-based heuristic to whitelist processors known to support it:
36 * - Processors with Cortex-A55 cores
37 * - Processors with Cortex-A65 cores
38 * - Processors with Cortex-A75 cores
39 * - Processors with Cortex-A76 cores
40 * - Processors with Cortex-A77 cores
41 * - Processors with Exynos M4 cores
42 * - Processors with Exynos M5 cores
43 * - Neoverse N1 cores
44 * - Neoverse V1 cores
45 * - Neoverse N2 cores
46 */
47 if (chipset->series == cpuinfo_arm_chipset_series_samsung_exynos && chipset->model == 9810) {
48 /* Exynos 9810 reports that it supports FP16 compute, but in fact only little cores do */
49 cpuinfo_log_warning("FP16 arithmetics and RDM disabled: only little cores in Exynos 9810 support these extensions");
50 } else {
51 const uint32_t fp16arith_mask = CPUINFO_ARM_LINUX_FEATURE_FPHP | CPUINFO_ARM_LINUX_FEATURE_ASIMDHP;
52 switch (midr & (CPUINFO_ARM_MIDR_IMPLEMENTER_MASK | CPUINFO_ARM_MIDR_PART_MASK)) {
53 case UINT32_C(0x4100D050): /* Cortex-A55 */
54 case UINT32_C(0x4100D060): /* Cortex-A65 */
55 case UINT32_C(0x4100D0B0): /* Cortex-A76 */
56 case UINT32_C(0x4100D0C0): /* Neoverse N1 */
57 case UINT32_C(0x4100D0D0): /* Cortex-A77 */
58 case UINT32_C(0x4100D0E0): /* Cortex-A76AE */
59 case UINT32_C(0x4100D400): /* Neoverse V1 */
60 case UINT32_C(0x4100D490): /* Neoverse N2 */
61 case UINT32_C(0x4800D400): /* Cortex-A76 (HiSilicon) */
62 case UINT32_C(0x51008020): /* Kryo 385 Gold (Cortex-A75) */
63 case UINT32_C(0x51008030): /* Kryo 385 Silver (Cortex-A55) */
64 case UINT32_C(0x51008040): /* Kryo 485 Gold (Cortex-A76) */
65 case UINT32_C(0x51008050): /* Kryo 485 Silver (Cortex-A55) */
66 case UINT32_C(0x53000030): /* Exynos M4 */
67 case UINT32_C(0x53000040): /* Exynos M5 */
68 isa->fp16arith = true;
69 isa->rdm = true;
70 break;
71 default:
72 if ((features & fp16arith_mask) == fp16arith_mask) {
73 isa->fp16arith = true;
74 } else if (features & CPUINFO_ARM_LINUX_FEATURE_FPHP) {
75 cpuinfo_log_warning("FP16 arithmetics disabled: detected support only for scalar operations");
76 } else if (features & CPUINFO_ARM_LINUX_FEATURE_ASIMDHP) {
77 cpuinfo_log_warning("FP16 arithmetics disabled: detected support only for SIMD operations");
78 }
79 if (features & CPUINFO_ARM_LINUX_FEATURE_ASIMDRDM) {
80 isa->rdm = true;
81 }
82 break;
83 }
84 }
85 if (features2 & CPUINFO_ARM_LINUX_FEATURE2_I8MM) {
86 isa->i8mm = true;
87 }
88
89 /*
90 * Many phones ship with an old kernel configuration that doesn't report UDOT/SDOT instructions.
91 * Use a MIDR-based heuristic to whitelist processors known to support it.
92 */
93 switch (midr & (CPUINFO_ARM_MIDR_IMPLEMENTER_MASK | CPUINFO_ARM_MIDR_PART_MASK)) {
94 case UINT32_C(0x4100D060): /* Cortex-A65 */
95 case UINT32_C(0x4100D0B0): /* Cortex-A76 */
96 case UINT32_C(0x4100D0C0): /* Neoverse N1 */
97 case UINT32_C(0x4100D0D0): /* Cortex-A77 */
98 case UINT32_C(0x4100D0E0): /* Cortex-A76AE */
99 case UINT32_C(0x4100D400): /* Neoverse V1 */
100 case UINT32_C(0x4100D490): /* Neoverse N2 */
101 case UINT32_C(0x4100D4A0): /* Neoverse E1 */
102 case UINT32_C(0x4800D400): /* Cortex-A76 (HiSilicon) */
103 case UINT32_C(0x51008040): /* Kryo 485 Gold (Cortex-A76) */
104 case UINT32_C(0x51008050): /* Kryo 485 Silver (Cortex-A55) */
105 case UINT32_C(0x53000030): /* Exynos-M4 */
106 case UINT32_C(0x53000040): /* Exynos-M5 */
107 isa->dot = true;
108 break;
109 case UINT32_C(0x4100D050): /* Cortex A55: revision 1 or later only */
110 isa->dot = !!(midr_get_variant(midr) >= 1);
111 break;
112 case UINT32_C(0x4100D0A0): /* Cortex A75: revision 2 or later only */
113 isa->dot = !!(midr_get_variant(midr) >= 2);
114 break;
115 default:
116 if (features & CPUINFO_ARM_LINUX_FEATURE_ASIMDDP) {
117 isa->dot = true;
118 }
119 break;
120 }
121 if (features & CPUINFO_ARM_LINUX_FEATURE_JSCVT) {
122 isa->jscvt = true;
123 }
124 if (features & CPUINFO_ARM_LINUX_FEATURE_JSCVT) {
125 isa->jscvt = true;
126 }
127 if (features & CPUINFO_ARM_LINUX_FEATURE_FCMA) {
128 isa->fcma = true;
129 }
130 if (features & CPUINFO_ARM_LINUX_FEATURE_SVE) {
131 isa->sve = true;
132 }
133 if (features2 & CPUINFO_ARM_LINUX_FEATURE2_SVE2) {
134 isa->sve2 = true;
135 }
136 // SVEBF16 is set iff SVE and BF16 are both supported, but the SVEBF16 feature flag
137 // was added in Linux kernel before the BF16 feature flag, so we check for either.
138 if (features2 & (CPUINFO_ARM_LINUX_FEATURE2_BF16 | CPUINFO_ARM_LINUX_FEATURE2_SVEBF16)) {
139 isa->bf16 = true;
140 }
141 if (features & CPUINFO_ARM_LINUX_FEATURE_ASIMDFHM) {
142 isa->fhm = true;
143 }
144 }
145
146