1 /*
2 * Copyright (c) 2022 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24 #ifdef ARM_COMPUTE_ENABLE_SVE
25
26 #include <cstddef>
27
28 namespace arm_gemm {
29
sve_ffinterleaved_fp16_mla_8x3VL(const __fp16 * Apanel,const __fp16 * Bpanel,size_t B_stride,__fp16 * Cpanel,int ablocks,size_t N,int K)30 void sve_ffinterleaved_fp16_mla_8x3VL(
31 const __fp16 *Apanel,
32 const __fp16 *Bpanel,
33 size_t B_stride,
34 __fp16 *Cpanel,
35 int ablocks,
36 size_t N,
37 int K) {
38
39 struct KernelArgs {
40 size_t K = {};
41 const __fp16 *Bpanel = {};
42 size_t N = {};
43 size_t B_stride = {};
44 const __fp16 *cur_B_ptr = {};
45 } ka;
46
47 ka.K = (K/1) - 1;
48 ka.Bpanel = Bpanel;
49 ka.N = N;
50 ka.B_stride = B_stride;
51
52 __asm__ __volatile__(
53 "ptrue p0.b\n"
54 "1:" // Height loop
55 "ldr x25, [%x[args_ptr], %[offsetof_Bpanel]]\n"
56 "ldr x24, [%x[args_ptr], %[offsetof_N]]\n"
57 "str x25, [%x[args_ptr], %[offsetof_cur_B_ptr]]\n"
58 "mov x23, %x[Apanel]\n"
59 "2:" // Width loop
60 "ldr x25, [%x[args_ptr], %[offsetof_cur_B_ptr]]\n"
61 "ldr x19, [%x[args_ptr], %[offsetof_B_stride]]\n"
62 "cnth x22, ALL, MUL #2\n"
63 "add x21, x25, x19, LSL #1\n"
64 "add x20, x21, x19, LSL #1\n"
65 "add x19, x20, x19, LSL #1\n"
66 "cmp x24, x22\n"
67 "str x19, [%x[args_ptr], %[offsetof_cur_B_ptr]]\n"
68 "mov %x[Apanel], x23\n"
69 "bgt 3f\n"
70 "dech x22\n"
71 "cmp x24, x22\n"
72 "mov x20, x25\n"
73 "bgt 3f\n"
74 "mov x21, x25\n"
75 "3:" // B setup done
76 "ldr x19, [%x[args_ptr], %[offsetof_K]]\n"
77 "cmp x19, #0x2\n"
78 "mov z8.b, #0x0\n"
79 "mov z9.b, #0x0\n"
80 "mov z10.b, #0x0\n"
81 "ld1rqh { z0.h }, p0/Z, [%x[Apanel]]\n"
82 "mov z11.b, #0x0\n"
83 "mov z12.b, #0x0\n"
84 "ld1h { z2.h }, p0/Z, [x25]\n"
85 "mov z13.b, #0x0\n"
86 "mov z14.b, #0x0\n"
87 "ld1h { z3.h }, p0/Z, [x21]\n"
88 "mov z15.b, #0x0\n"
89 "mov z16.b, #0x0\n"
90 "ld1h { z4.h }, p0/Z, [x20]\n"
91 "mov z17.b, #0x0\n"
92 "mov z18.b, #0x0\n"
93 "mov z19.b, #0x0\n"
94 "mov z20.b, #0x0\n"
95 "mov z21.b, #0x0\n"
96 "mov z22.b, #0x0\n"
97 "mov z23.b, #0x0\n"
98 "mov z24.b, #0x0\n"
99 "mov z25.b, #0x0\n"
100 "mov z26.b, #0x0\n"
101 "mov z27.b, #0x0\n"
102 "mov z28.b, #0x0\n"
103 "mov z29.b, #0x0\n"
104 "mov z30.b, #0x0\n"
105 "mov z31.b, #0x0\n"
106 "blt 5f\n"
107 "4:" // main loop head
108 "fmla z8.h, z2.h, z0.h[0]\n"
109 "fmla z11.h, z2.h, z0.h[1]\n"
110 "ld1rqh { z1.h }, p0/Z, [%x[Apanel], #16]\n"
111 "fmla z14.h, z2.h, z0.h[2]\n"
112 "fmla z17.h, z2.h, z0.h[3]\n"
113 "ld1h { z5.h }, p0/Z, [x25, #1, MUL VL]\n"
114 "fmla z20.h, z2.h, z0.h[4]\n"
115 "fmla z23.h, z2.h, z0.h[5]\n"
116 "ld1h { z6.h }, p0/Z, [x21, #1, MUL VL]\n"
117 "fmla z26.h, z2.h, z0.h[6]\n"
118 "fmla z29.h, z2.h, z0.h[7]\n"
119 "ld1h { z7.h }, p0/Z, [x20, #1, MUL VL]\n"
120 "fmla z9.h, z3.h, z0.h[0]\n"
121 "fmla z12.h, z3.h, z0.h[1]\n"
122 "addvl x25, x25, #2\n"
123 "fmla z15.h, z3.h, z0.h[2]\n"
124 "fmla z18.h, z3.h, z0.h[3]\n"
125 "addvl x21, x21, #2\n"
126 "fmla z21.h, z3.h, z0.h[4]\n"
127 "fmla z24.h, z3.h, z0.h[5]\n"
128 "addvl x20, x20, #2\n"
129 "fmla z27.h, z3.h, z0.h[6]\n"
130 "fmla z30.h, z3.h, z0.h[7]\n"
131 "sub x19, x19, #0x2\n"
132 "fmla z10.h, z4.h, z0.h[0]\n"
133 "fmla z13.h, z4.h, z0.h[1]\n"
134 "cmp x19, #0x2\n"
135 "fmla z16.h, z4.h, z0.h[2]\n"
136 "fmla z19.h, z4.h, z0.h[3]\n"
137 "add %x[Apanel], %x[Apanel], #0x20\n"
138 "fmla z22.h, z4.h, z0.h[4]\n"
139 "fmla z25.h, z4.h, z0.h[5]\n"
140 "ld1h { z2.h }, p0/Z, [x25]\n"
141 "fmla z28.h, z4.h, z0.h[6]\n"
142 "fmla z31.h, z4.h, z0.h[7]\n"
143 "ld1rqh { z0.h }, p0/Z, [%x[Apanel]]\n"
144 "fmla z8.h, z5.h, z1.h[0]\n"
145 "fmla z11.h, z5.h, z1.h[1]\n"
146 "ld1h { z3.h }, p0/Z, [x21]\n"
147 "fmla z14.h, z5.h, z1.h[2]\n"
148 "fmla z17.h, z5.h, z1.h[3]\n"
149 "ld1h { z4.h }, p0/Z, [x20]\n"
150 "fmla z20.h, z5.h, z1.h[4]\n"
151 "fmla z23.h, z5.h, z1.h[5]\n"
152 "fmla z26.h, z5.h, z1.h[6]\n"
153 "fmla z29.h, z5.h, z1.h[7]\n"
154 "fmla z9.h, z6.h, z1.h[0]\n"
155 "fmla z12.h, z6.h, z1.h[1]\n"
156 "fmla z15.h, z6.h, z1.h[2]\n"
157 "fmla z18.h, z6.h, z1.h[3]\n"
158 "fmla z21.h, z6.h, z1.h[4]\n"
159 "fmla z24.h, z6.h, z1.h[5]\n"
160 "fmla z27.h, z6.h, z1.h[6]\n"
161 "fmla z30.h, z6.h, z1.h[7]\n"
162 "fmla z10.h, z7.h, z1.h[0]\n"
163 "fmla z13.h, z7.h, z1.h[1]\n"
164 "fmla z16.h, z7.h, z1.h[2]\n"
165 "fmla z19.h, z7.h, z1.h[3]\n"
166 "fmla z22.h, z7.h, z1.h[4]\n"
167 "fmla z25.h, z7.h, z1.h[5]\n"
168 "fmla z28.h, z7.h, z1.h[6]\n"
169 "fmla z31.h, z7.h, z1.h[7]\n"
170 "bge 4b\n"
171 "5:" // main loop skip
172 "fmla z8.h, z2.h, z0.h[0]\n"
173 "fmla z11.h, z2.h, z0.h[1]\n"
174 "add %x[Apanel], %x[Apanel], #0x10\n"
175 "fmla z14.h, z2.h, z0.h[2]\n"
176 "fmla z17.h, z2.h, z0.h[3]\n"
177 "addvl x25, x25, #1\n"
178 "fmla z20.h, z2.h, z0.h[4]\n"
179 "fmla z23.h, z2.h, z0.h[5]\n"
180 "addvl x21, x21, #1\n"
181 "fmla z26.h, z2.h, z0.h[6]\n"
182 "fmla z29.h, z2.h, z0.h[7]\n"
183 "addvl x20, x20, #1\n"
184 "fmla z9.h, z3.h, z0.h[0]\n"
185 "fmla z12.h, z3.h, z0.h[1]\n"
186 "fmla z15.h, z3.h, z0.h[2]\n"
187 "fmla z18.h, z3.h, z0.h[3]\n"
188 "fmla z21.h, z3.h, z0.h[4]\n"
189 "fmla z24.h, z3.h, z0.h[5]\n"
190 "fmla z27.h, z3.h, z0.h[6]\n"
191 "fmla z30.h, z3.h, z0.h[7]\n"
192 "fmla z10.h, z4.h, z0.h[0]\n"
193 "fmla z13.h, z4.h, z0.h[1]\n"
194 "fmla z16.h, z4.h, z0.h[2]\n"
195 "fmla z19.h, z4.h, z0.h[3]\n"
196 "fmla z22.h, z4.h, z0.h[4]\n"
197 "fmla z25.h, z4.h, z0.h[5]\n"
198 "fmla z28.h, z4.h, z0.h[6]\n"
199 "fmla z31.h, z4.h, z0.h[7]\n"
200 "cbz x19, 6f\n"
201 "ld1rqh { z0.h }, p0/Z, [%x[Apanel]]\n"
202 "ld1h { z5.h }, p0/Z, [x25]\n"
203 "fmla z8.h, z5.h, z0.h[0]\n"
204 "ld1h { z6.h }, p0/Z, [x21]\n"
205 "ld1h { z7.h }, p0/Z, [x20]\n"
206 "fmla z11.h, z5.h, z0.h[1]\n"
207 "fmla z14.h, z5.h, z0.h[2]\n"
208 "fmla z17.h, z5.h, z0.h[3]\n"
209 "add %x[Apanel], %x[Apanel], #0x10\n"
210 "fmla z20.h, z5.h, z0.h[4]\n"
211 "fmla z23.h, z5.h, z0.h[5]\n"
212 "fmla z26.h, z5.h, z0.h[6]\n"
213 "fmla z29.h, z5.h, z0.h[7]\n"
214 "fmla z9.h, z6.h, z0.h[0]\n"
215 "fmla z12.h, z6.h, z0.h[1]\n"
216 "fmla z15.h, z6.h, z0.h[2]\n"
217 "fmla z18.h, z6.h, z0.h[3]\n"
218 "fmla z21.h, z6.h, z0.h[4]\n"
219 "fmla z24.h, z6.h, z0.h[5]\n"
220 "fmla z27.h, z6.h, z0.h[6]\n"
221 "fmla z30.h, z6.h, z0.h[7]\n"
222 "fmla z10.h, z7.h, z0.h[0]\n"
223 "fmla z13.h, z7.h, z0.h[1]\n"
224 "fmla z16.h, z7.h, z0.h[2]\n"
225 "fmla z19.h, z7.h, z0.h[3]\n"
226 "fmla z22.h, z7.h, z0.h[4]\n"
227 "fmla z25.h, z7.h, z0.h[5]\n"
228 "fmla z28.h, z7.h, z0.h[6]\n"
229 "fmla z31.h, z7.h, z0.h[7]\n"
230 "6:" // multiply loop done
231 "dech x24, ALL, MUL #3\n"
232 "st1h { z8.h }, p0, [%x[Cpanel]]\n"
233 "cmp x24, XZR\n"
234 "st1h { z9.h }, p0, [%x[Cpanel], #1, MUL VL]\n"
235 "st1h { z10.h }, p0, [%x[Cpanel], #2, MUL VL]\n"
236 "st1h { z11.h }, p0, [%x[Cpanel], #3, MUL VL]\n"
237 "st1h { z12.h }, p0, [%x[Cpanel], #4, MUL VL]\n"
238 "st1h { z13.h }, p0, [%x[Cpanel], #5, MUL VL]\n"
239 "st1h { z14.h }, p0, [%x[Cpanel], #6, MUL VL]\n"
240 "st1h { z15.h }, p0, [%x[Cpanel], #7, MUL VL]\n"
241 "addvl %x[Cpanel], %x[Cpanel], #16\n"
242 "st1h { z16.h }, p0, [%x[Cpanel], #-8, MUL VL]\n"
243 "st1h { z17.h }, p0, [%x[Cpanel], #-7, MUL VL]\n"
244 "st1h { z18.h }, p0, [%x[Cpanel], #-6, MUL VL]\n"
245 "st1h { z19.h }, p0, [%x[Cpanel], #-5, MUL VL]\n"
246 "st1h { z20.h }, p0, [%x[Cpanel], #-4, MUL VL]\n"
247 "st1h { z21.h }, p0, [%x[Cpanel], #-3, MUL VL]\n"
248 "st1h { z22.h }, p0, [%x[Cpanel], #-2, MUL VL]\n"
249 "st1h { z23.h }, p0, [%x[Cpanel], #-1, MUL VL]\n"
250 "st1h { z24.h }, p0, [%x[Cpanel]]\n"
251 "st1h { z25.h }, p0, [%x[Cpanel], #1, MUL VL]\n"
252 "st1h { z26.h }, p0, [%x[Cpanel], #2, MUL VL]\n"
253 "st1h { z27.h }, p0, [%x[Cpanel], #3, MUL VL]\n"
254 "st1h { z28.h }, p0, [%x[Cpanel], #4, MUL VL]\n"
255 "st1h { z29.h }, p0, [%x[Cpanel], #5, MUL VL]\n"
256 "st1h { z30.h }, p0, [%x[Cpanel], #6, MUL VL]\n"
257 "st1h { z31.h }, p0, [%x[Cpanel], #7, MUL VL]\n"
258 "addvl %x[Cpanel], %x[Cpanel], #8\n"
259 "bgt 2b\n"
260 "subs %x[ablocks], %x[ablocks], #0x1\n"
261 "bne 1b\n"
262 : [Apanel] "+&r" (Apanel), [Cpanel] "+&r" (Cpanel), [ablocks] "+&r" (ablocks)
263 : [args_ptr] "r" (&ka), [offsetof_B_stride] "I" (offsetof(KernelArgs, B_stride)), [offsetof_Bpanel] "I" (offsetof(KernelArgs, Bpanel)), [offsetof_K] "I" (offsetof(KernelArgs, K)), [offsetof_N] "I" (offsetof(KernelArgs, N)), [offsetof_cur_B_ptr] "I" (offsetof(KernelArgs, cur_B_ptr))
264 : "cc", "memory", "p0", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
265 );
266 }
267
268 } // namespace arm_gemm
269 #endif // ARM_COMPUTE_ENABLE_SVE
270