1 /* 2 * Copyright (c) 2022 Arm Limited. 3 * 4 * SPDX-License-Identifier: MIT 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to 8 * deal in the Software without restriction, including without limitation the 9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 10 * sell copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in all 14 * copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 */ 24 #ifndef ARM_COMPUTE_CL_INDIRECT_CONV2D_H 25 #define ARM_COMPUTE_CL_INDIRECT_CONV2D_H 26 27 #include "arm_compute/core/TensorInfo.h" 28 #include "arm_compute/runtime/CL/CLTensor.h" 29 #include "arm_compute/runtime/CL/CLTypes.h" 30 31 #include "src/gpu/cl/ClCompileContext.h" 32 #include "src/gpu/cl/IClKernel.h" 33 #include "src/gpu/cl/IClOperator.h" 34 35 #include <memory> 36 37 namespace arm_compute 38 { 39 // Forward declaration 40 struct DirectConvComputeKernelInfo; 41 42 namespace opencl 43 { 44 /** Basic function to execute indirect convolution on OpenCL. This function calls the following OpenCL kernels: 45 * 46 * -# @ref kernels::ClIndirectConv2dAddressPrecalculationKernel 47 * -# @ref kernels::ClIndirectConv2dKernel 48 */ 49 class ClIndirectConv2d : public IClOperator 50 { 51 public: 52 ClIndirectConv2d() = default; 53 /** Initialise the kernel's inputs and output 54 * 55 * Valid data layouts: 56 * - NHWC 57 * 58 * Valid data type configurations: 59 * |src0 |src1 |src2 |dst | 60 * |:------------|:-----------|:---------|:--------------| 61 * |F32 |F32 |F32 |F32 | 62 * |F16 |F16 |F16 |F16 | 63 * 64 * @note All tensors must have the same data type. 65 * 66 * @param[in] compile_context The compile context to be used. 67 * @param[in] src Source tensor. 3 lower dimensions represent a single src, 68 * while every optional dimension from 4 and above represent a batch of sources. 69 * Data types supported: F16/F32. 70 * @param[in] weights Weights tensor. Weights are 4D tensor with dimensions. Data type supported:Same as @p src. 71 * @param[in] biases Biases tensor. Shared biases supported. Biases are 1D tensor with dimensions [OFM]. 72 * Data type supported: Should match @p src data type. 73 * @param[out] dst Destination tensor. 3 lower dimensions represent a single dst, while the rest represent batch of destinations. 74 * Data types supported: Same as @p src. 75 * @param[in] conv_info Contains padding and stride information described in @ref PadStrideInfo. 76 * @param[in] act_info (Optional) Activation layer information in case of a fused activation. 77 * 78 */ 79 void configure(const CLCompileContext &compile_context, ITensorInfo *src, ITensorInfo *weights, ITensorInfo *biases, ITensorInfo *dst, const PadStrideInfo &conv_info, 80 const ActivationLayerInfo &act_info = ActivationLayerInfo()); 81 /** Static function to check if given info will lead to a valid configuration 82 * 83 * Similar to ClIndirectConv2d::configure() 84 * 85 * @return a status 86 */ 87 static Status validate(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *dst, const PadStrideInfo &conv_info, 88 const ActivationLayerInfo &act_info = ActivationLayerInfo()); 89 90 // Inherited methods overridden: 91 void run(ITensorPack &tensors) override; 92 void prepare(ITensorPack &constants) override; 93 experimental::MemoryRequirements workspace() const override; 94 95 private: 96 enum AuxTensorIdx 97 { 98 IndirectBuffer = 0, 99 Count 100 }; 101 102 std::unique_ptr<IClKernel> _indirect_conv_kernel{ nullptr }; 103 std::unique_ptr<IClKernel> _addr_precalculation_kernel{ nullptr }; 104 TensorInfo _indirect_buffer{}; 105 bool _is_prepared{ false }; 106 experimental::MemoryRequirements _aux_mem{ Count }; 107 }; 108 } // namespace opencl 109 } // namespace arm_compute 110 #endif /* ARM_COMPUTE_CL_INDIRECT_CONV2D_H */ 111